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ADC12J4000

Other Parts Discussed in Thread: ADC12J4000

XC7VX690T   FPGA  接收ADC12J4000数据,模式DDC BYPASS  模式,SYNC一直是低,但FPGA端 GTH端口收不到K28.5,采样率3.2G   3.6G  4.0G都试过,还是收不到。这是怎么回事? SYSREF=15.625M