JTAG ID= 0x0b9a702f. This is a K2L device, version variant = 0
DEVSTAT= 0x0e000ee1. little endian, no boot or I2C slave boot, boot master is ARM core, PLL configuration implies the input clock for core is 122.88MHz
SmartReflex VID= 46, required core voltage= 0.995V.
Die ID= 0x0400500a, 0x0c00ea81, 0x00000000, 0x5f260020
DSP speed grade = 1200MHz, ARM speed grade= 1200MHz
Enable IRQ and FIQ.
Enable Exception handling...
Initialize main core clock = 100.00MHz/1x12 = 1200MHz
Initialize ARM clock = 100.00MHz/1x12 = 1200MHz
DDR3A initialization
Initialize DDR data rate = 100.000/1*16/4*4= 1600.0 MTS, bus width = 64 bits.
DDR PHY status PGSR0=0xb0000fff.

SPI port 0 internal loopback test at 66MHz...
SPI loopback test passed with data pattern 0x0. Throughput= 30Mbps
SPI loopback test passed with data pattern 0xffff. Throughput= 30Mbps
SPI loopback test passed with data pattern 0x5555. Throughput= 30Mbps
SPI0 interrupt test: manually generate RX overrun error...
SPI0 receive buffer overrun interrupt happened at 40591956

SPI port 1 internal loopback test at 66MHz...
SPI loopback test passed with data pattern 0x0. Throughput= 30Mbps
SPI loopback test passed with data pattern 0xffff. Throughput= 30Mbps
SPI loopback test passed with data pattern 0x5555. Throughput= 30Mbps
SPI1 interrupt test: manually generate RX overrun error...
SPI1 receive buffer overrun interrupt happened at 193823446

SPI port 2 internal loopback test at 66MHz...
SPI loopback test passed with data pattern 0x0. Throughput= 30Mbps
SPI loopback test passed with data pattern 0xffff. Throughput= 30Mbps
SPI loopback test passed with data pattern 0x5555. Throughput= 30Mbps
SPI2 interrupt test: manually generate RX overrun error...
SPI2 receive buffer overrun interrupt happened at 347054364

SPI port 0 EDMA test at 66MHz...
SPI0 EDMA loopback test passed. Throughput= 46Mbps

SPI port 1 EDMA test at 66MHz...
SPI1 EDMA loopback test passed. Throughput= 46Mbps

SPI port 2 EDMA test at 66MHz...
SPI2 EDMA loopback test passed. Throughput= 46Mbps

SPI port 0 NOR_FLASH test at 54MHz...
Read SPI NOR FLASH ID = 0x20 0xbb 0x18
Save data from 0xf80000 to 0xfc0000.
Passed SPI_NOR_FLASH Fill Test from 0xf80000 to 0xfc0000 with pattern 0x       0
Passed SPI_NOR_FLASH Fill Test from 0xf80000 to 0xfc0000 with pattern 0xaaaaaaaa
Passed SPI_NOR_FLASH Address Test from 0xf80000 to 0xfc0000
Restore data from 0xf80000 to 0xfc0000.
Save data from 0xfc0000 to 0x1000000.
Passed SPI_NOR_FLASH Fill Test from 0xfc0000 to 0x1000000 with pattern 0x       0
Passed SPI_NOR_FLASH Fill Test from 0xfc0000 to 0x1000000 with pattern 0xaaaaaaaa
Passed SPI_NOR_FLASH Address Test from 0xfc0000 to 0x1000000
Restore data from 0xfc0000 to 0x1000000.
SPI test complete at 34885873330 cycle
