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Defines
INTC Symbols Defined
INTC

## Defines
#define | CSL_CPU_IVPD_MASK 0xFFFFFF00
#define | CSL_CPU_IVPD_SHIFT 8
#define | IRQ_INT_CNT (32u)
#define | IRQ_EVENT_CNT (32u)
#define | CSL_INTC_NUM_PIN (32u)
#define | CSL_INTC_BIT_SET (1u)
#define | CSL_INTC_BIT_RESET (0)
#define | CSL_INTC_IFR_RESET (0xFFFFu)
#define | RESET_EVENT 0
| Events Numbers correspond to the bit position in IFR and IER Registers For event numbers (27 -31), IER1 and IFR1 bits are reserved.
#define | NMI_EVENT 1
#define | INT0_EVENT 2
#define | INT1_EVENT 3
#define | TINT_EVENT 4
#define | PROG0_EVENT 5
#define | UART_EVENT 6
#define | PROG1_EVENT 7
#define | DMA_EVENT 8
#define | PROG2_EVENT 9
#define | CoProc_EVENT 10
#define | PROG3_EVENT 11
#define | LCD_EVENT 12
#define | SAR_EVENT 13
#define | XMT2_EVENT 14
#define | RCV2_EVENT 15
#define | XMT3_EVENT 16
#define | RCV3_EVENT 17
#define | RTC_EVENT 18
#define | SPI_EVENT 19
#define | USB_EVENT 20
#define | GPIO_EVENT 21
#define | EMIF_EVENT 22
#define | I2C_EVENT 23
#define | BERR_EVENT 24
#define | DLOG_EVENT 25
#define | RTOS_EVENT 26
#define | RTDXRCV_EVENT 27
#define | RTDXXMT_EVENT 28
#define | EMUINT_EVENT 29
#define | SINT30_EVENT 30
#define | SINT31_EVENT 31
#define | IRQ_MASK32(x) ((Uint32)(0x1ul<<x))
#define | IRQ_MASK16(x) ((Uint16)(0x1ul<<x))
#define | ALGEBRAIC 1
#define | INV ((void*)(-1))

## Define Documentation

#define ALGEBRAIC 1

For Assembler

#define BERR_EVENT 24

Bus Error Interrupt

#define CoProc_EVENT 10

CoProcessor Interrupt

#define CSL_CPU_IVPD_MASK 0xFFFFFF00

Interrupt Vector Pointer Mask value

Referenced by IRQ_setVecs().

#define CSL_CPU_IVPD_SHIFT 8

Interrupt Vector Pointer Shift value

Referenced by IRQ_setVecs().

#define CSL_INTC_BIT_RESET (0)

Reset the single bit

Referenced by IRQ_disable().

#define CSL_INTC_BIT_SET (1u)

Set the single bit

Referenced by IRQ_clear(), and IRQ_enable().

#define CSL_INTC_IFR_RESET (0xFFFFu)

Reset value for the interrupt flag register

Referenced by IRQ_clearAll().

#define CSL_INTC_NUM_PIN (32u)

Number of INTC pins

#define DLOG_EVENT 25

Emulation Interrupt DLOG

#define DMA_EVENT 8

DMA Interrupt

#define EMIF_EVENT 22

EMIF Interrupt

#define EMUINT_EVENT 29

Emulation monitor mode

#define GPIO_EVENT 21

GPIO Interrupt

#define I2C_EVENT 23

I2C Interrupt

#define INT0_EVENT 2

External User Interrupt 0

#define INT1_EVENT 3

External User Interrupt 1

#define INV ((void*)(-1))

invalid pointer

Referenced by IRQ_init().

#define IRQ_EVENT_CNT (32u)

Number of Interrupt events

Referenced by IRQ_init().

#define IRQ_INT_CNT (32u)

Number of physical interrupts

#define IRQ_MASK16 | ( |  | x | ) | ((Uint16)(0x1ul<<x))

Allows to mask the bit "x" of IFR or IER registers

#define IRQ_MASK32 | ( |  | x | ) | ((Uint32)(0x1ul<<x))

Allows to mask the bit "x" for eventId

Referenced by IRQ_init(), and IRQ_map().

#define LCD_EVENT 12

LCD Interrupt

#define NMI_EVENT 1

Non Maskable Interrupt

#define PROG0_EVENT 5

Programmable transmit Interrupt 0 (I2S0 Tx or MMC/SD0 Interrupt)

#define PROG1_EVENT 7

Programmable Receive Interrupt 0 (I2S0 Rx or MMC/SD0 SDIO Interrupt)

#define PROG2_EVENT 9

Programmable transmit Interrupt 1 (I2S1 Tx or MMC/SD1 Interrupt)

#define PROG3_EVENT 11

Programmable Receive Interrupt 1 (I2S1 Rx or MMC/SD1 SDIO Interrupt)

#define RCV2_EVENT 15

I2S2 Receive Interrupt

Referenced by IRQ_clear(), IRQ_disable(), IRQ_enable(), IRQ_restore(), and IRQ_test().

#define RCV3_EVENT 17

I2S3 Receive Interrupt

#define RESET_EVENT 0

Events Numbers correspond to the bit position in IFR and IER Registers For event numbers (27 -31), IER1 and IFR1 bits are reserved.

Reset Interrupt

#define RTC_EVENT 18

Wakeup or RTC Interrupt

#define RTDXRCV_EVENT 27

These event bits (27-31) are reserved in IFR and IER Register Emulation Interrupt RTDX Receive

#define RTDXXMT_EVENT 28

Emulation Interrupt RTDX Transmit

#define RTOS_EVENT 26

Emulation Interrupt RTOS

#define SAR_EVENT 13

SAR Interrupt

#define SINT30_EVENT 30

Software Interrupt 30

#define SINT31_EVENT 31

Software Interrupt 31

Referenced by IRQ_clear(), IRQ_config(), IRQ_disable(), IRQ_enable(), IRQ_getArg(), IRQ_getConfig(), IRQ_map(), IRQ_restore(), IRQ_setArg(), and IRQ_test().

#define SPI_EVENT 19

SPI Interrupt

#define TINT_EVENT 4

TIMER Interrupt

#define UART_EVENT 6

UART Interrupt

#define USB_EVENT 20

USB Interrupt

#define XMT2_EVENT 14

I2S2 Transmit Interrupt

#define XMT3_EVENT 16

I2S3 Transmit Interrupt

Referenced by IRQ_clear(), IRQ_disable(), IRQ_enable(), IRQ_restore(), and IRQ_test().