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Enumerations
DMA Enumerated Data Types
DMA

## Enumerations
enum | CSL_DMAEngineId { CSL_DMA_ENGINE0 = 0, CSL_DMA_ENGINE1, CSL_DMA_ENGINE2, CSL_DMA_ENGINE3, CSL_DMA_ENGINEINV }
| DMA engine number. More...
enum | CSL_DMAChanNum { CSL_DMA_CHAN0 = 0, CSL_DMA_CHAN1, CSL_DMA_CHAN2, CSL_DMA_CHAN3, CSL_DMA_CHAN4, CSL_DMA_CHAN5, CSL_DMA_CHAN6, CSL_DMA_CHAN7, CSL_DMA_CHAN8, CSL_DMA_CHAN9, CSL_DMA_CHAN10, CSL_DMA_CHAN11, CSL_DMA_CHAN12, CSL_DMA_CHAN13, CSL_DMA_CHAN14, CSL_DMA_CHAN15, CSL_DMA_CHAN_INV }
| DMA channel number. More...
enum | CSL_DMAAutoReloadMode { CSL_DMA_AUTORELOAD_DISABLE, CSL_DMA_AUTORELOAD_ENABLE }
| DMA Auto reload bit. More...
enum | CSL_DMATxBurstLen { CSL_DMA_TXBURST_1WORD, CSL_DMA_TXBURST_2WORD, CSL_DMA_TXBURST_4WORD, CSL_DMA_TXBURST_8WORD, CSL_DMA_TXBURST_16WORD }
| DMA burst mode bit. More...
enum | CSL_DMATransferStatus { CSL_DMA_TRANSFER_COMPLETE, CSL_DMA_TRANSFER_ERROR }
| DMA transfer status parameter. More...
enum | CSL_DMAEvtType { CSL_DMA_EVT_NONE = 0, CSL_DMA_EVT_I2S0_TX = 1, CSL_DMA_EVT_I2S0_RX = 2, CSL_DMA_EVT_I2S1_TX = 1, CSL_DMA_EVT_I2S1_RX = 2, CSL_DMA_EVT_I2S2_TX = 1, CSL_DMA_EVT_I2S2_RX = 2, CSL_DMA_EVT_I2S3_TX = 4, CSL_DMA_EVT_I2S3_RX = 5, CSL_DMA_EVT_MMC_SD0_TX = 5, CSL_DMA_EVT_MMC_SD0_RX = 6, CSL_DMA_EVT_MMC_SD1_TX = 7, CSL_DMA_EVT_MMC_SD1_RX = 8, CSL_DMA_EVT_TIMER0 = 12, CSL_DMA_EVT_TIMER1 = 13, CSL_DMA_EVT_TIMER2 = 14, CSL_DMA_EVT_UART_TX = 5, CSL_DMA_EVT_UART_RX = 6, CSL_DMA_EVT_I2C_TX = 1, CSL_DMA_EVT_I2C_RX = 2, CSL_DMA_EVT_SAR_AD = 3, CSL_DMA_EVT_INVALID }
| DMA event Id. More...
enum | CSL_DMAChanDir { CSL_DMA_READ, CSL_DMA_WRITE }
| DMA channel direction. More...
enum | CSL_DMATransferType { CSL_DMA_TRANSFER_IO_MEMORY, CSL_DMA_TRANSFER_MEMORY }
| DMA data transfer type. More...
enum | CSL_DMATriggerType { CSL_DMA_SOFTWARE_TRIGGER, CSL_DMA_EVENT_TRIGGER }
| Type of the DMA triggering. More...
enum | CSL_DMAInterruptState { CSL_DMA_INTERRUPT_DISABLE, CSL_DMA_INTERRUPT_ENABLE }
| State of the DMA Interrupt. More...
enum | CSL_DMAPingPongMode { CSL_DMA_PING_PONG_DISABLE, CSL_DMA_PING_PONG_ENABLE }
| Enum to enable or disable Ping-Pong Mode. More...

## Enumeration Type Documentation

enum CSL_DMAAutoReloadMode

DMA Auto reload bit.

If this bit is enabled, DMA auto reloads source and destination addresses and restarts the data transfer.

Enumerator:

  CSL_DMA_AUTORELOAD_DISABLE | Auto reload mode is disabled
  CSL_DMA_AUTORELOAD_ENABLE | Auto reload mode is enabled

enum CSL_DMAChanDir

DMA channel direction.

This is provided to the application to give information about DMA operation. DMA read or DMA write.

Enumerator:

  CSL_DMA_READ | Reading data from a device
  CSL_DMA_WRITE | Writing data to a device

enum CSL_DMAChanNum

DMA channel number.

Enumeration for the total channels DMA is having.

Enumerator:

  CSL_DMA_CHAN0 | DMA channel number 0
  CSL_DMA_CHAN1 | DMA channel number 1
  CSL_DMA_CHAN2 | DMA channel number 2
  CSL_DMA_CHAN3 | DMA channel number 3
  CSL_DMA_CHAN4 | DMA channel number 4
  CSL_DMA_CHAN5 | DMA channel number 5
  CSL_DMA_CHAN6 | DMA channel number 6
  CSL_DMA_CHAN7 | DMA channel number 7
  CSL_DMA_CHAN8 | DMA channel number 8
  CSL_DMA_CHAN9 | DMA channel number 9
  CSL_DMA_CHAN10 | DMA channel number 10
  CSL_DMA_CHAN11 | DMA channel number 11
  CSL_DMA_CHAN12 | DMA channel number 12
  CSL_DMA_CHAN13 | DMA channel number 13
  CSL_DMA_CHAN14 | DMA channel number 14
  CSL_DMA_CHAN15 | DMA channel number 15
  CSL_DMA_CHAN_INV | DMA Invalid channel

enum CSL_DMAEngineId

DMA engine number.

Enumeration for the DMA engine numbers.

Enumerator:

  CSL_DMA_ENGINE0 | DMA engine instance 0
  CSL_DMA_ENGINE1 | DMA engine instance 1
  CSL_DMA_ENGINE2 | DMA engine instance 2
  CSL_DMA_ENGINE3 | DMA engine instance 3
  CSL_DMA_ENGINEINV | Invalid DMA engine Instance

enum CSL_DMAEvtType

DMA event Id.

This represents the event by which DMA transfer is being triggered.

Enumerator:

  CSL_DMA_EVT_NONE | No DMA event(SW trig./mem to mem)
  CSL_DMA_EVT_I2S0_TX | Tx of I2S0 data event triggers DMA
  CSL_DMA_EVT_I2S0_RX | Rx of I2S0 data event triggers DMA
  CSL_DMA_EVT_I2S1_TX | Tx of I2S1 data event triggers DMA
  CSL_DMA_EVT_I2S1_RX | Rx of I2S1 data event triggers DMA
  CSL_DMA_EVT_I2S2_TX | Tx of I2S2 data event triggers DMA
  CSL_DMA_EVT_I2S2_RX | Rx of I2S2 data event triggers DMA
  CSL_DMA_EVT_I2S3_TX | Tx of I2S3 data event triggers DMA
  CSL_DMA_EVT_I2S3_RX | Rx of I2S3 data event triggers DMA
  CSL_DMA_EVT_MMC_SD0_TX | MMC/SD0 TX event triggers DMA
  CSL_DMA_EVT_MMC_SD0_RX | MMC/SD0 RX event triggers DMA
  CSL_DMA_EVT_MMC_SD1_TX | MMC/SD1 TX event triggers DMA
  CSL_DMA_EVT_MMC_SD1_RX | MMC/SD1 RX event triggers DMA
  CSL_DMA_EVT_TIMER0 | timer0 event triggers DMA
  CSL_DMA_EVT_TIMER1 | timer1 event triggers DMA
  CSL_DMA_EVT_TIMER2 | timer2 event triggers DMA
  CSL_DMA_EVT_UART_TX | Tx of UART data event triggers DMA
  CSL_DMA_EVT_UART_RX | Rx of UART data event triggers DMA
  CSL_DMA_EVT_I2C_TX | Tx of I2C data event triggers DMA
  CSL_DMA_EVT_I2C_RX | Rx of I2C data event triggers DMA
  CSL_DMA_EVT_SAR_AD | SAR A/D event triggers DMA
  CSL_DMA_EVT_INVALID | Invalid event Id for error checking

enum CSL_DMAInterruptState

State of the DMA Interrupt.

This provides the information about DMA Interrupt. After completion of data transfer will be served by interrupt.

Enumerator:

  CSL_DMA_INTERRUPT_DISABLE | Interrupt Disable
  CSL_DMA_INTERRUPT_ENABLE | Interrupt Enable

enum CSL_DMAPingPongMode

Enum to enable or disable Ping-Pong Mode.

This Enum provides the option for the application programs to choose enabling/disabling of Ping-Pong Mode

Enumerator:

  CSL_DMA_PING_PONG_DISABLE | Disables the Ping-Pong Mode
  CSL_DMA_PING_PONG_ENABLE | Enables the Ping-Pong Mode

enum CSL_DMATransferStatus

DMA transfer status parameter.

Gives the status of the data transfer. This is passed to the application after completing the data transfer through callback.

Enumerator:

  CSL_DMA_TRANSFER_COMPLETE | Transfer is completed successfully
  CSL_DMA_TRANSFER_ERROR | Error in data transfer

enum CSL_DMATransferType

DMA data transfer type.

This is provided to the application to give information about DMA transfer type is between IO and memory, or memory and memory.

Enumerator:

  CSL_DMA_TRANSFER_IO_MEMORY | Data transfer is b/w IO & memory
  CSL_DMA_TRANSFER_MEMORY | Data transfer is b/w memory to memory

enum CSL_DMATriggerType

Type of the DMA triggering.

This provides the information about DMA triggering. DMA transfer can be triggered by software or hardware event.

Enumerator:

  CSL_DMA_SOFTWARE_TRIGGER | Triggering by software instruction
  CSL_DMA_EVENT_TRIGGER | Triggering by hardware event

enum CSL_DMATxBurstLen

DMA burst mode bit.

This represents the number of words to be transferred by a channel before giving the DMA FIFO to next channel.

Enumerator:

  CSL_DMA_TXBURST_1WORD | One 32-bit transfer:1-word burst
  CSL_DMA_TXBURST_2WORD | Two 32-bit transfer:2-word burst
  CSL_DMA_TXBURST_4WORD | Four 32-bit transfer:4-word burst
  CSL_DMA_TXBURST_8WORD | Eight 32-bit transfer:8-word burst
  CSL_DMA_TXBURST_16WORD | Sixteen 32-bit transfer:16-word burst