csl_dat.h
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00001 /*  ===========================================================================
00002  *   Copyright (c) Texas Instruments Inc 2002, 2003, 2004, 2005, 2008
00003  *
00004  *   Use of this software is controlled by the terms and conditions found in
00005  *   the license agreement under which this software has been supplied.
00006  *  ===========================================================================
00007  */
00008 
00016 /* ============================================================================
00017  * Revision History
00018  * ================
00019  * 16-Sept-2008 Added DAT of CSL.
00020  * ============================================================================
00021  */
00022 
00038 #ifndef _CSL_DAT_H_
00039 #define _CSL_DAT_H_
00040 
00041 #ifdef __cplusplus
00042 extern "C" {
00043 #endif
00044 
00045 #include <soc.h>
00046 #include <tistdtypes.h>
00047 #include <cslr_sysctrl.h>
00048 #include <csl_types.h>
00049 #include <csl_error.h>
00050 #include <csl_general.h>
00051 
00077 /*****************************************************************************\
00078           DAT global macro declarations
00079 \*****************************************************************************/
00080 
00085 #define CSL_DAT_TIME_OUT                (0xFFF)
00086 
00087 #define CSL_DAT_CHANNEL_BUSY            (0x1)
00088 
00089 #define CSL_DAT_CHANNEL_FREE            (0)
00090 
00091 #define CSL_DAT_TXBURST_WORD_LENGTH     (0x0)
00092 
00093 #define CSL_DAT_CHANNEL_ENABLE          (Uint16)1
00094 
00095 #define CSL_DAT_CHANNEL_DISABLE        (Uint16)0
00096 
00097 #define CSL_DAT_CHAN_MAX               (16)
00098 
00099 #define CSL_DAT_CHAN_PRIORITY_HIGH     (0xF)
00100 
00101 #define CSL_DAT_CHAN_PRIORITY_LOW      (0x0)
00102 
00103 #ifndef _CSL_DMA_H_
00104 
00105 #define CSL_DMA_MIN_TX_SIZE             (4)
00106 
00107 #define CSL_DMA_UINT16_MASK             (0xFFFF)
00108 
00109 #define CSL_DMA_UINT16_NUMBER_BITS      (0x0010)
00110 
00111 #define CSL_DMA_ADDR_SHIFT              (0x01)
00112 
00113 #define CSL_DMA_ADDR_MODE_FIXED         (0x02)
00114 
00115 #define CSL_DMA_ADDR_MODE_INCREMENT     (0x00)
00116 
00117 #define CSL_DMA_DARAM_START_ADDR        (0x00060)
00118 
00119 #define CSL_DMA_DARAM_END_ADDR          (0x07FFF)
00120 
00121 #define CSL_DMA_SARAM_START_ADDR        (0x08000)
00122 
00123 #define CSL_DMA_SARAM_END_ADDR          (0x27FFF)
00124 
00125 #define CSL_DMA_DARAM_ADDR_OFFSET       (0x010000)
00126 
00127 #define CSL_DMA_SARAM_ADDR_OFFSET       (0x080000)
00128 #endif
00129 
00132 /**************************************************************************\
00133 * DAT global typedef declarations                                         *
00134 \**************************************************************************/
00135 
00143 typedef enum
00144 {
00145     CSL_DAT_1D2D,   
00146     CSL_DAT_2D1D,   
00147     CSL_DAT_2D2D    
00148 } CSL_DAT_TxType;
00149 
00155 typedef enum
00156 {
00157     CSL_DAT_ENGINE0 = 0,                    
00158     CSL_DAT_ENGINE1,                        
00159     CSL_DAT_ENGINE2,                        
00160     CSL_DAT_ENGINE3,                        
00161     CSL_DAT_ENGINE_INV                      
00162 } CSL_DATEngineId;
00163 
00169 typedef enum
00170 {
00171     CSL_DAT_CHAN0 = 0,                      
00172     CSL_DAT_CHAN1,                          
00173     CSL_DAT_CHAN2,                          
00174     CSL_DAT_CHAN3,                          
00175     CSL_DAT_CHAN4,                          
00176     CSL_DAT_CHAN5,                          
00177     CSL_DAT_CHAN6,                          
00178     CSL_DAT_CHAN7,                          
00179     CSL_DAT_CHAN8,                          
00180     CSL_DAT_CHAN9,                          
00181     CSL_DAT_CHAN10,                         
00182     CSL_DAT_CHAN11,                         
00183     CSL_DAT_CHAN12,                         
00184     CSL_DAT_CHAN13,                         
00185     CSL_DAT_CHAN14,                         
00186     CSL_DAT_CHAN15,                         
00187     CSL_DAT_CHAN_INV                        
00188 } CSL_DATChanNum;
00201 typedef struct
00202 {
00203     CSL_DmaRegsOvly        dmaRegs;    
00204     CSL_DATChanNum         chanNum;    
00205     CSL_DATEngineId        datInstNum; 
00206     Uint16                 chanPrio;   
00207     Bool                  isChanFree;  
00208 } CSL_DAT_ChannelObj;
00209 
00214 typedef CSL_DAT_ChannelObj  *CSL_DAT_Handle;
00215 
00220 /******************************************************************************
00221  * DAT function declarations
00222  *****************************************************************************/
00223 
00275 CSL_DAT_Handle DAT_open (
00276     CSL_DATChanNum      chanNum,
00277     Uint16              chanPriority,
00278     CSL_DAT_ChannelObj  *pDatChanObj,
00279     CSL_Status          *status
00280 );
00281 
00320 CSL_Status DAT_close (
00321     CSL_DAT_Handle         hDAT
00322 );
00323 
00383 CSL_Status DAT_copy (
00384     CSL_DAT_Handle            hDAT,
00385     Uint32                    srcAddr,
00386     Uint32                    destAddr,
00387     Uint16                    dataLength
00388 );
00389 
00451 CSL_Status DAT_fill (
00452     CSL_DAT_Handle            hDAT,
00453     Uint32                    destAddr,
00454     Uint16                    dataLength,
00455     Uint32                    *pdataValue
00456 );
00457 
00512 CSL_Status DAT_wait (
00513     CSL_DAT_Handle         hDAT
00514 );
00515 
00519 #ifdef __cplusplus
00520 }
00521 #endif
00522 
00523 #endif /* _CSL_DMA_H_ */
00524