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00016 #ifndef _CSL_ERROR_H_
00017 #define _CSL_ERROR_H_
00018
00019
00020 #define CSL_SOK (0)
00021 #define CSL_ESYS_FAIL (-1)
00022 #define CSL_ESYS_INUSE (-2)
00023 #define CSL_ESYS_XIO (-3)
00024 #define CSL_ESYS_OVFL (-4)
00025 #define CSL_ESYS_BADHANDLE (-5)
00026 #define CSL_ESYS_INVPARAMS (-6)
00027 #define CSL_ESYS_INVCMD (-7)
00028 #define CSL_ESYS_INVQUERY (-8)
00029 #define CSL_ESYS_NOTSUPPORTED (-9)
00030 #define CSL_EMMCSD_TIMEOUT (-10)
00031 #define CSL_ESYS_BADMEDIA (-11)
00032 #define CSL_ESYS_MEDIA_NOTPRESENT (-12)
00033 #define CSL_EMMCSD_READ_ERROR (-13)
00034 #define CSL_EMMCSD_WRITE_ERROR (-14)
00035 #define CSL_EMMCSD_CRCERR (-15)
00036 #define CSL_ESDIO_TIMEOUT (-16)
00037 #define CSL_ESDIO_CRCERR (-17)
00038
00039
00040
00041 #define CSL_DAT_ID (1)
00042 #define CSL_DMA_ID (2)
00043 #define CSL_GPIO_ID (3)
00044 #define CSL_GPT_ID (4)
00045 #define CSL_I2C_ID (5)
00046 #define CSL_I2S_ID (6)
00047 #define CSL_INTC_ID (7)
00048 #define CSL_LCD_ID (8)
00049 #define CSL_MMCSD_ID (9)
00050 #define CSL_NAND_ID (10)
00051 #define CSL_PLL_ID (11)
00052 #define CSL_PWR_ID (12)
00053 #define CSL_RTC_ID (13)
00054 #define CSL_SAR_ID (14)
00055 #define CSL_SPI_ID (15)
00056 #define CSL_UART_ID (16)
00057 #define CSL_USB_ID (17)
00058 #define CSL_WDTIM_ID (18)
00059
00060
00061
00062
00064 #define CSL_EUART_INVALID_INST_ID (CSL_EUART_FIRST -1)
00065
00066 #define CSL_EUART_INVALID_ISR_MASK (CSL_EUART_FIRST -2)
00067
00068 #define CSL_EUART_TIMEOUT (CSL_UART_ID -3)
00069
00070 #define CSL_EUART_INVALID_BUFSIZE (CSL_UART_ID -3)
00071
00072 #define CSL_EUART_INVALID_WORDLENGTH (CSL_UART_ID -4)
00073
00074 #define CSL_EUART_INVALID_PARITYSEL (CSL_UART_ID -5)
00075
00076
00077
00078
00079
00080 #define CSL_EDAT_FIRST -( ((CSL_DAT_ID + 1) << 5 ) + 1 )
00081 #define CSL_EDAT_LAST -( (CSL_DAT_ID + 1) << 6 )
00082
00083 #define CSL_EDMA_FIRST -( ((CSL_DMA_ID + 1) << 5 ) + 1 )
00084 #define CSL_EDMA_LAST -( (CSL_DMA_ID + 1) << 6 )
00085
00086 #define CSL_EGPIO_FIRST -( ((CSL_GPIO_ID + 1) << 5 ) + 1 )
00087 #define CSL_EGPIO_LAST -( (CSL_GPIO_ID + 1) << 6 )
00088
00089 #define CSL_EGPT_FIRST -( ((CSL_GPT_ID + 1) << 5 ) + 1 )
00090 #define CSL_EGPT_LAST -( (CSL_GPT_ID + 1) << 6 )
00091
00092 #define CSL_EI2C_FIRST -( ((CSL_I2C_ID + 1) << 5 ) + 1 )
00093 #define CSL_EI2C_LAST -( (CSL_I2C_ID + 1) << 6 )
00094
00095 #define CSL_EI2S_FIRST -( ((CSL_I2S_ID + 1) << 5 ) + 1 )
00096 #define CSL_EI2S_LAST -( (CSL_I2S_ID + 1) << 6 )
00097
00098 #define CSL_EINTC_FIRST -( ((CSL_INTC_ID + 1) << 5 ) + 1 )
00099 #define CSL_EINTC_LAST -( (CSL_INTC_ID + 1) << 6 )
00100
00101 #define CSL_ELCD_FIRST -( ((CSL_LCD_ID + 1) << 5 ) + 1 )
00102 #define CSL_ELCD_LAST -( (CSL_LCD_ID + 1) << 6 )
00103
00104 #define CSL_EMMCSD_FIRST -( ((CSL_MMCSD_ID + 1) << 5 ) + 1 )
00105 #define CSL_EMMCSD_LAST -( (CSL_MMCSD_ID + 1) << 6 )
00106
00107 #define CSL_ENAND_FIRST -( ((CSL_NAND_ID + 1) << 5 ) + 1 )
00108 #define CSL_ENAND_LAST -( (CSL_NAND_ID + 1) << 6 )
00109
00110 #define CSL_EPLL_FIRST -( ((CSL_PLL_ID + 1) << 5 ) + 1 )
00111 #define CSL_EPLL_LAST -( (CSL_PLL_ID + 1) << 6 )
00112
00113 #define CSL_EPWR_FIRST -( ((CSL_PWR_ID + 1) << 5 ) + 1 )
00114 #define CSL_EPWR_LAST -( (CSL_PWR_ID + 1) << 6 )
00115
00116 #define CSL_ERTC_FIRST -( ((CSL_RTC_ID + 1) << 5 ) + 1 )
00117 #define CSL_ERTC_LAST -( (CSL_RTC_ID + 1) << 6 )
00118
00119 #define CSL_ESAR_FIRST -( ((CSL_SAR_ID + 1) << 5 ) + 1 )
00120 #define CSL_ESAR_LAST -( (CSL_SAR_ID + 1) << 6 )
00121
00122 #define CSL_ESPI_FIRST -( ((CSL_SPI_ID + 1) << 5 ) + 1 )
00123 #define CSL_ESPI_LAST -( (CSL_SPI_ID + 1) << 6 )
00124
00125 #define CSL_EUART_FIRST -( ((CSL_UART_ID + 1) << 5 ) + 1 )
00126 #define CSL_EUART_LAST -( (CSL_UART_ID + 1) << 6 )
00127
00128 #define CSL_EUSB_FIRST -( ((CSL_USB_ID + 1) << 5 ) + 1 )
00129 #define CSL_EUSB_LAST -( (CSL_USB_ID + 1) << 6 )
00130
00131 #define CSL_EWDTIM_FIRST -( ((CSL_WDTIM_ID + 1) << 5 ) + 1 )
00132 #define CSL_EWDTIM_LAST -( (CSL_WDTIM_ID + 1) << 6 )
00133
00134
00135 #endif