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00038 #ifndef _CSL_GPIO_H_
00039 #define _CSL_GPIO_H_
00040
00041 #ifdef __cplusplus
00042 extern "C" {
00043 #endif
00044
00045 #include <cslr.h>
00046 #include <soc.h>
00047 #include <cslr_gpio.h>
00048 #include <csl_error.h>
00049 #include <csl_types.h>
00050 #include <csl_general.h>
00051
00052
00074
00075
00076
00077
00079 #define CSL_GPIO_NUM_PIN 32
00080
00082 #define CSL_GPIO_BIT_SET 1
00083
00085 #define CSL_GPIO_BIT_RESET 0
00086
00088 #define GPIO_DRIVE_HIGH 1
00089
00090 #define GPIO_DRIVE_LOW 0
00091
00095
00096
00097
00098
00105 typedef enum {
00107 CSL_GPIO_PIN0 = 0,
00109 CSL_GPIO_PIN1 =1,
00111 CSL_GPIO_PIN2 = 2,
00113 CSL_GPIO_PIN3 = 3,
00115 CSL_GPIO_PIN4 = 4,
00117 CSL_GPIO_PIN5 = 5,
00119 CSL_GPIO_PIN6 = 6,
00121 CSL_GPIO_PIN7 = 7,
00123 CSL_GPIO_PIN8 = 8,
00125 CSL_GPIO_PIN9 = 9,
00127 CSL_GPIO_PIN10 = 10,
00129 CSL_GPIO_PIN11 = 11,
00131 CSL_GPIO_PIN12 = 12,
00133 CSL_GPIO_PIN13 = 13,
00135 CSL_GPIO_PIN14 = 14,
00137 CSL_GPIO_PIN15 = 15,
00139 CSL_GPIO_PIN16 = 16,
00141 CSL_GPIO_PIN17 = 17,
00143 CSL_GPIO_PIN18 = 18,
00145 CSL_GPIO_PIN19 = 19,
00147 CSL_GPIO_PIN20 = 20,
00149 CSL_GPIO_PIN21 = 21,
00151 CSL_GPIO_PIN22 = 22,
00153 CSL_GPIO_PIN23 = 23,
00155 CSL_GPIO_PIN24 = 24,
00157 CSL_GPIO_PIN25 = 25,
00159 CSL_GPIO_PIN26 = 26,
00161 CSL_GPIO_PIN27 = 27,
00163 CSL_GPIO_PIN28 = 28,
00165 CSL_GPIO_PIN29 = 29,
00167 CSL_GPIO_PIN30 = 30,
00169 CSL_GPIO_PIN31 = 31
00170 } CSL_GpioPinNum;
00171
00172
00176 typedef enum {
00177
00179 CSL_GPIO_TRIG_RISING_EDGE = 0,
00180
00182 CSL_GPIO_TRIG_FALLING_EDGE = 1,
00183
00185 CSL_GPIO_TRIG_CLEAR_EDGE = 2
00186
00187 } CSL_GpioTriggerType;
00188
00189
00191 typedef enum {
00192
00194 CSL_GPIO_DIR_INPUT = 0,
00196 CSL_GPIO_DIR_OUTPUT = 1
00197
00198 } CSL_GpioDirection;
00199
00200
00202 typedef enum {
00203
00206 CSL_GPIO_CMD_CONFIG_BIT = 0,
00208 CSL_GPIO_CMD_INT_DISABLE = 1,
00210 CSL_GPIO_CMD_INT_ENABLE = 2,
00213 CSL_GPIO_CMD_CLEAR_INT_FLAG = 3
00214
00215 } CSL_GpioConfigCmd;
00216
00231 typedef struct {
00232
00234 volatile Uint16 GPIODIRL;
00236 volatile Uint16 GPIODIRH;
00237
00239 volatile Uint16 GPIOINTTRIGL;
00241 volatile Uint16 GPIOINTTRIGH;
00242
00244 volatile Uint16 GPIOINTENAL;
00246 volatile Uint16 GPIOINTENAH;
00247
00248 }CSL_GpioConfig;
00249
00250
00255 typedef struct {
00256
00258 CSL_GpioPinNum pinNum;
00259
00261 CSL_GpioDirection direction;
00262
00264 CSL_GpioTriggerType trigger;
00265
00266 } CSL_GpioPinConfig;
00267
00271 typedef struct{
00272
00274 CSL_GpioRegsOvly baseAddr;
00275
00279 Uint8 numPins;
00280
00281 }CSL_GpioObj;
00282
00286 typedef CSL_GpioObj* GPIO_Handle;
00287
00291
00292
00293
00294
00339 GPIO_Handle GPIO_open (
00340 CSL_GpioObj *GPIOobj,
00341 CSL_Status *status
00342 );
00343
00377 CSL_Status GPIO_close (
00378 GPIO_Handle hGPIO
00379 );
00380
00381
00432 CSL_Status GPIO_config (
00433 GPIO_Handle GPIOHandle,
00434 CSL_GpioConfig *config
00435 );
00436
00437
00438
00484 CSL_Status GPIO_getConfig(
00485 GPIO_Handle hGpio,
00486 CSL_GpioConfig *config
00487 );
00488
00541 CSL_Status GPIO_read (
00542 GPIO_Handle hGPIO,
00543 CSL_GpioPinNum pinNum,
00544 Uint16 *buffer
00545 );
00546
00598 CSL_Status GPIO_write (
00599 GPIO_Handle hGPIO,
00600 CSL_GpioPinNum pinNum,
00601 Uint16 buffer
00602 );
00603
00648 CSL_Status GPIO_reset (
00649 GPIO_Handle hGPIO
00650 );
00651
00652
00701 CSL_Status GPIO_configBit (
00702 GPIO_Handle hGpio,
00703 CSL_GpioPinConfig *config
00704 );
00705
00752 CSL_Status GPIO_disableInt (
00753 GPIO_Handle hGpio,
00754 CSL_GpioPinNum pin
00755 );
00756
00757
00806 CSL_Status GPIO_enableInt (
00807 GPIO_Handle hGpio,
00808 CSL_GpioPinNum pin
00809 );
00810
00811
00863 CSL_Status GPIO_clearInt (
00864 GPIO_Handle hGpio,
00865 CSL_GpioPinNum pin
00866 );
00867
00868
00919 int GPIO_statusBit (
00920 GPIO_Handle hGpio,
00921 CSL_GpioPinNum pin,
00922 CSL_Status *status
00923 );
00927 #ifdef __cplusplus
00928 }
00929 #endif
00930
00931 #endif
00932