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00047 #ifndef _CSL_I2C_H_
00048 #define _CSL_I2C_H_
00049
00050 #ifdef __cplusplus
00051 extern "C" {
00052 #endif
00053
00054 #include "cslr.h"
00055 #include "csl_error.h"
00056 #include "csl_types.h"
00057 #include "cslr_i2c.h"
00058 #include "soc.h"
00059 #include "csl_general.h"
00060
00061
00080
00081
00082
00089 #define CSL_I2C0 (0)
00090
00092 #define CSL_I2C_INT_EVTID (23)
00093
00094 #define CSL_I2C_EVT_COUNT (7)
00095
00096 #define CSL_I2C_RESET_COUNT_VAL (0x20)
00097
00098 #define CSL_I2C_RESET_DELAY (500)
00099
00101 #define CSL_I2C_MODULE_CLOCK_FREQ (12)
00102
00104 #define CSL_I2C_CLK_MULT (1000)
00105
00107 #define CSL_I2C_PSC0 (0)
00108
00109 #define CSL_I2C_PSC1 (1)
00110
00111 #define CSL_I2C_PSC_ADJUST_VAL (1)
00112
00114 #define CSL_I2C_PSC0_DVAL (7)
00115
00116 #define CSL_I2C_PSC1_DVAL (6)
00117
00118 #define CSL_I2C_PSC2TOFF_DVAL (5)
00119
00124 #define CSL_I2C_ERROR_BASE (CSL_EI2C_FIRST)
00125
00126 #define CSL_I2C_BUS_BUSY_ERR (CSL_I2C_ERROR_BASE - 1)
00127
00128 #define CSL_I2C_ARBITRATION_LOSS_ERR (CSL_I2C_ERROR_BASE - 2)
00129
00130 #define CSL_I2C_NACK_ERR (CSL_I2C_ERROR_BASE - 3)
00131
00132 #define CSL_I2C_TRANSMIT_UNDERFLOW_ERR (CSL_I2C_ERROR_BASE - 4)
00133
00134 #define CSL_I2C_RECEIVE_OVERFLOW_ERR (CSL_I2C_ERROR_BASE - 5)
00135
00136 #define CSL_I2C_CANCEL_IO_ERROR (CSL_I2C_ERROR_BASE - 6)
00137
00138 #define CSL_I2C_TIMEOUT_ERROR (CSL_I2C_ERROR_BASE - 7)
00139
00144 #define CSL_I2C_READ (0x1)
00145
00146 #define CSL_I2C_WRITE (0x2)
00147
00148 #define CSL_I2C_ADDR_FORMAT_10_BIT (0x10)
00149
00150 #define CSL_I2C_START (0x100)
00151
00152 #define CSL_I2C_STOP (0x200)
00153
00154 #define CSL_I2C_RESTART (0x400)
00155
00156 #define CSL_I2C_START_BYTE (0x800)
00157
00158 #define CSL_I2C_FREE_DATA_FORMAT (0x1000)
00159
00160 #define CSL_I2C_REPEAT (0x2000)
00161
00162 #define CSL_I2C_IGNORE_BUS_BUSY (0x20000)
00163
00165 #define CSL_I2C_DEFAULT_STTSTP (CSL_I2C_START | CSL_I2C_STOP)
00166
00168 #define CSL_I2C_MAX_TIMEOUT (0xFFFF)
00169
00171 #define CSL_I2C_ICOAR_DEFVAL (0x2F)
00172
00173 #define CSL_I2C_ICIMR_DEFVAL (0x0000)
00174
00175 #define CSL_I2C_ICSAR_DEFVAL (0x50)
00176
00177 #define CSL_I2C_ICPSC_DEFVAL (0x07)
00178
00179 #define CSL_I2C_ICCLK_DEFVAL (0x026C)
00180
00181 #define CSL_I2C_ICMDR_WRITE_DEFVAL (0x0E20)
00182
00183 #define CSL_I2C_ICMDR_READ_DEFVAL (0x0C20)
00184
00185 #define CSL_I2C_ICEMDR_DEFVAL (0x0000)
00186
00187 #define CSL_I2C_ICSTR_RESET_VALUE (0xFFFF)
00188
00190 typedef void (*CSL_I2C_EVENT_ISR)(void);
00191
00199 #define CSL_I2C0_READREG(reg,val) (val = CSL_I2C_0_REGS->##reg)
00200
00202 #define CSL_I2C0_WRITEREG(reg,val) (CSL_I2C_0_REGS->##reg = val)
00203
00205 #define CSL_I2C_SETSTART() \
00206 CSL_FINST(CSL_I2C_0_REGS->ICMDR, I2C_ICMDR_STT, SET);
00207
00209 #define CSL_I2C_RESETSTART() \
00210 CSL_FINST(CSL_I2C_0_REGS->ICMDR, I2C_ICMDR_STT, CLEAR);
00211
00213 #define CSL_I2C_SETSTOP() \
00214 CSL_FINST(CSL_I2C_0_REGS->ICMDR, I2C_ICMDR_STP, SET);
00215
00217 #define CSL_I2C_RESETSTOP() \
00218 CSL_FINST(CSL_I2C_0_REGS->ICMDR, I2C_ICMDR_STP, CLEAR);
00219
00223
00224
00225
00226
00233 typedef enum CSL_I2cEvent {
00235 CSL_I2C_EVENT_AL,
00237 CSL_I2C_EVENT_NACK,
00239 CSL_I2C_EVENT_ARDY,
00241 CSL_I2C_EVENT_ICRRDY,
00243 CSL_I2C_EVENT_ICXRDY,
00245 CSL_I2C_EVENT_SCD,
00247 CSL_I2C_EVENT_AAS
00248 } CSL_I2cEvent;
00249
00253 typedef enum CSL_I2cAddrMode {
00255 CSL_I2C_ADDR_7BIT = 0,
00257 CSL_I2C_ADDR_10BIT
00258 } CSL_I2cAddrMode;
00259
00263 typedef enum CSL_I2cBitCount {
00265 CSL_I2C_BC_8BITS = 0,
00267 CSL_I2C_BC_RSVD,
00269 CSL_I2C_BC_2BITS,
00271 CSL_I2C_BC_3BITS,
00273 CSL_I2C_BC_4BITS,
00275 CSL_I2C_BC_5BITS,
00277 CSL_I2C_BC_6BITS,
00279 CSL_I2C_BC_7BITS
00280 } CSL_I2cBitCount;
00281
00285 typedef enum CSL_I2cLoopback {
00287 CSL_I2C_LOOPBACK_DISABLE = 0,
00289 CSL_I2C_LOOPBACK_ENABLE
00290 } CSL_I2cLoopback;
00291
00295 typedef enum CSL_I2cFreeMode {
00297 CSL_I2C_FREEMODE_DISABLE = 0,
00299 CSL_I2C_FREEMODE_ENABLE
00300 } CSL_I2cFreeMode;
00301
00305 typedef enum CSL_I2cMasterMode {
00307 CSL_I2C_MASTERMODE_DISABLE = 0,
00309 CSL_I2C_MASTERMODE_ENABLE
00310 } CSL_I2cMasterMode;
00311
00315 typedef enum CSL_I2cRepeatMode {
00317 CSL_I2C_REPEATMODE_DISABLE = 0,
00319 CSL_I2C_REPEATMODE_ENABLE
00320 } CSL_I2cRepeatMode;
00321
00325
00326
00327
00328
00338 typedef struct CSL_I2cIsrAddr {
00340 CSL_I2C_EVENT_ISR alAddr;
00342 CSL_I2C_EVENT_ISR nackAddr;
00344 CSL_I2C_EVENT_ISR ardyAddr;
00346 CSL_I2C_EVENT_ISR rrdyAddr;
00348 CSL_I2C_EVENT_ISR xrdyAddr;
00350 CSL_I2C_EVENT_ISR scdAddr;
00352 CSL_I2C_EVENT_ISR aasAddr;
00353 } CSL_I2cIsrAddr;
00354
00361 typedef struct CSL_I2cConfig {
00363 Uint16 icoar;
00365 Uint16 icimr;
00367 Uint16 icclkl;
00369 Uint16 icclkh;
00371 Uint16 iccnt;
00373 Uint16 icsar;
00375 Uint16 icmdr;
00377 Uint16 icemdr;
00379 Uint16 icpsc;
00380 } CSL_I2cConfig;
00381
00388 typedef struct CSL_I2cSetup {
00390 CSL_I2cAddrMode addrMode;
00392 CSL_I2cBitCount bitCount;
00394 CSL_I2cLoopback loopBack;
00396 CSL_I2cFreeMode freeMode;
00398 CSL_I2cRepeatMode repeatMode;
00400 Uint16 ownAddr;
00402 Uint32 sysInputClk;
00404 Uint32 i2cBusFreq;
00405 } CSL_I2cSetup;
00406
00412 typedef struct CSL_I2cObj {
00414 CSL_I2cRegsOvly i2cRegs;
00416 CSL_SysRegsOvly sysCtrlRegs;
00418 CSL_I2C_EVENT_ISR I2C_isrDispatchTable[CSL_I2C_EVT_COUNT];
00419 } CSL_I2cObj;
00420
00422 typedef CSL_I2cObj *pI2cHandle;
00423
00428
00429
00430
00431
00466 CSL_Status I2C_init(Uint16 instanceNum);
00467
00468
00515 CSL_Status I2C_config(CSL_I2cConfig *i2cConfig);
00516
00517
00567 CSL_Status I2C_getConfig(CSL_I2cConfig *i2cgetConfig);
00568
00569
00620 CSL_Status I2C_setup(CSL_I2cSetup *i2cSetup);
00621
00622
00686 CSL_Status I2C_write(Uint16 *i2cWrBuf,
00687 Uint16 dataLength,
00688 Uint16 slaveAddr,
00689 Bool masterMode,
00690 Uint16 startStopFlag,
00691 Uint16 timeout);
00692
00693
00758 CSL_Status I2C_read(Uint16 *i2cRdBuf,
00759 Uint16 dataLength,
00760 Uint16 slaveAddr,
00761 Bool masterMode,
00762 Uint16 startStopFlag,
00763 Uint16 timeout,
00764 Bool checkBus);
00765
00766
00804 CSL_Status I2C_eventEnable(CSL_I2cEvent i2cEvent);
00805
00806
00847 CSL_Status I2C_eventDisable(CSL_I2cEvent i2cEvent);
00848
00849
00901 CSL_Status I2C_setCallback(CSL_I2cIsrAddr *i2cIsrAddr);
00902
00903
00936 Int16 I2C_getEventId(void);
00937
00938
00944 #ifdef __cplusplus
00945 }
00946 #endif
00947
00948 #endif //_CSL_I2C_H_
00949