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00001 /* ============================================================================ 00002 * Copyright (c) Texas Instruments Inc 2002, 2003, 2004, 2005, 2008 00003 * 00004 * Use of this software is controlled by the terms and conditions found in the 00005 * license agreement under which this software has been supplied. 00006 * ============================================================================ 00007 */ 00008 00016 /* ============================================================================ 00017 * Revision History 00018 * ================ 00019 * 22-Sept-2008 - File created for CSL 00020 * ============================================================================ 00021 */ 00022 00037 #ifndef _CSL_INTC_H_ 00038 #define _CSL_INTC_H_ 00039 00040 #ifdef __cplusplus 00041 extern "C" { 00042 #endif 00043 00044 #include <cslr.h> 00045 #include <soc.h> 00046 #include <csl_error.h> 00047 #include <csl_types.h> 00048 #include <csl_general.h> 00049 00072 /*****************************************************************************\ 00073 INTC global macro declarations 00074 \*****************************************************************************/ 00075 00077 #define CSL_CPU_IVPD_MASK 0xFFFFFF00 00078 00079 #define CSL_CPU_IVPD_SHIFT 8 00080 00082 #define IRQ_INT_CNT (32u) 00083 00085 #define IRQ_EVENT_CNT (32u) 00086 00088 #define CSL_INTC_NUM_PIN (32u) 00089 00091 #define CSL_INTC_BIT_SET (1u) 00092 00094 #define CSL_INTC_BIT_RESET (0) 00095 00097 #define CSL_INTC_IFR_RESET (0xFFFFu) 00098 00104 #define RESET_EVENT 0 00105 00106 #define NMI_EVENT 1 00107 00108 #define INT0_EVENT 2 00109 00110 #define INT1_EVENT 3 00111 00112 #define TINT_EVENT 4 00113 00114 #define PROG0_EVENT 5 00115 00116 #define UART_EVENT 6 00117 00118 #define PROG1_EVENT 7 00119 00120 #define DMA_EVENT 8 00121 00122 #define PROG2_EVENT 9 00123 00124 #define CoProc_EVENT 10 00125 00126 #define PROG3_EVENT 11 00127 00128 #define LCD_EVENT 12 00129 00130 #define SAR_EVENT 13 00131 00132 #define XMT2_EVENT 14 00133 00134 #define RCV2_EVENT 15 00135 00136 #define XMT3_EVENT 16 00137 00138 #define RCV3_EVENT 17 00139 00140 #define RTC_EVENT 18 00141 00142 #define SPI_EVENT 19 00143 00144 #define USB_EVENT 20 00145 00146 #define GPIO_EVENT 21 00147 00148 #define EMIF_EVENT 22 00149 00150 #define I2C_EVENT 23 00151 00152 #define BERR_EVENT 24 00153 00154 #define DLOG_EVENT 25 00155 00156 #define RTOS_EVENT 26 00157 00159 #define RTDXRCV_EVENT 27 00160 00161 #define RTDXXMT_EVENT 28 00162 00163 #define EMUINT_EVENT 29 00164 00165 #define SINT30_EVENT 30 00166 00167 #define SINT31_EVENT 31 00168 00169 00170 00172 #define IRQ_MASK32(x) ((Uint32)(0x1ul<<x)) 00173 00174 #define IRQ_MASK16(x) ((Uint16)(0x1ul<<x)) 00175 00177 #define ALGEBRAIC 1 00178 00180 #define INV ((void*)(-1)) 00181 00185 /**************************************************************************\ 00186 * INTC global typedef declarations * 00187 \**************************************************************************/ 00188 00203 typedef void (*IRQ_IsrPtr)(void); 00204 00207 typedef struct { 00209 IRQ_IsrPtr funcAddr; 00211 Uint32 funcArg; 00213 Uint32 ierMask; 00215 Uint32 cacheCtrl; 00216 } CSL_IRQ_Config; 00217 00218 00221 typedef struct { 00223 IRQ_IsrPtr funcAddr; 00225 Uint32 funcArg; 00227 Uint32 ierMask; 00229 Uint32 cacheCtrl; 00230 } CSL_IRQ_Dispatch; 00231 00234 typedef struct { 00236 CSL_IRQ_Dispatch *IrqDispatchTable; 00238 Uint32 IrqIntTable[IRQ_INT_CNT]; 00240 Uint32 IrqEventTable[IRQ_EVENT_CNT]; 00242 Uint16 biosPresent; 00243 } CSL_IrqDataObj; 00244 00247 static CSL_IrqDataObj CSL_IRQ_DATA; 00248 00252 typedef CSL_IrqDataObj *IRQ_Handle; 00253 00257 /******************************************************************************* 00258 * INTC function declarations 00259 ******************************************************************************/ 00260 00310 int IRQ_plug(Uint16 EventId, IRQ_IsrPtr funcAddr); 00311 00357 int _IRQ_plug(Uint16 EventId, IRQ_IsrPtr funcAddr); 00358 00359 00401 CSL_Status IRQ_init ( 00402 CSL_IRQ_Dispatch *dispatchTable, 00403 Uint16 biosPresent 00404 ); 00405 00443 CSL_Status IRQ_clear ( 00444 Uint16 EventId 00445 ); 00446 00476 void IRQ_clearAll(void); 00477 00526 CSL_Status IRQ_config ( 00527 Uint16 EventId, 00528 CSL_IRQ_Config *config 00529 ); 00530 00531 00532 00577 CSL_Status IRQ_getConfig ( 00578 Uint16 EventId, 00579 CSL_IRQ_Config *config 00580 ); 00581 00617 int IRQ_disable ( 00618 Uint16 EventId 00619 ); 00620 00653 void IRQ_disableAll (void); 00654 00689 int IRQ_enable ( 00690 Uint16 EventId 00691 ); 00692 00693 00729 CSL_Status IRQ_restore( 00730 Uint16 EventId, 00731 int value 00732 ); 00733 00734 00735 00772 CSL_Status IRQ_getArg( 00773 Uint16 EventId, 00774 Uint32 *arg 00775 ); 00776 00777 00814 CSL_Status IRQ_map( 00815 Uint16 EventId 00816 ); 00817 00855 CSL_Status IRQ_setArg( 00856 Uint16 EventId, 00857 Uint32 val 00858 ); 00859 00860 00895 CSL_Status IRQ_setVecs( 00896 Uint32 Ivpd 00897 ); 00898 00899 00900 00939 CSL_Status IRQ_test( 00940 Uint16 EventId, 00941 Bool *IntStatus 00942 ); 00943 00944 00945 00977 Bool IRQ_globalDisable (); 00978 00979 00980 00981 01013 Bool IRQ_globalEnable (); 01014 01015 01045 void IRQ_globalRestore (Bool val); 01046 01047 01048 01052 #ifdef __cplusplus 01053 } 01054 #endif 01055 01056 #endif /* _CSL_INTC_H_ */ 01057
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