csl_lcdcAux.h
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00001 /*  ============================================================================
00002  *   Copyright (c) Texas Instruments Inc 2002, 2003, 2004, 2005, 2008
00003  *
00004  *   Use of this software is controlled by the terms and conditions found in the
00005  *   license agreement under which this software has been supplied.
00006  *  ============================================================================
00007  */
00008 
00016 /* ============================================================================
00017  * Revision History
00018  * ================
00019  * 05-Sept-2008 Added LCDC of CSL.
00020  * 06-May-2009 Removed the Raster mode support for C5505 PG1.4
00021  * 26-May-2009 Modified based on the review comments
00022  * ============================================================================
00023  */
00024 
00025 #ifndef _CSL_LCDCAUX_H_
00026 #define _CSL_LCDCAUX_H_
00027 
00028 #ifdef __cplusplus
00029 extern "C" {
00030 #endif
00031 
00032 #include <csl_lcdc.h>
00033 
00034 /*****************************************************************************\
00035         CSL LCDC  mandatory inline functions
00036 \*****************************************************************************/
00037 
00077 static inline
00078 void CSL_lcdcEnableLiddDMA (
00082     CSL_LcdcHandle        hLcdc
00083 )
00084 {
00085     CSL_FINST(hLcdc->regs->LCDLIDDCR, LCDC_LCDLIDDCR_LIDD_DMA_EN, ENABLE);
00086 }
00087 
00088 
00123 static inline
00124 void CSL_lcdcDisableLiddDMA (
00128     CSL_LcdcHandle        hLcdc
00129 )
00130 {
00131     CSL_FINST(hLcdc->regs->LCDLIDDCR, LCDC_LCDLIDDCR_LIDD_DMA_EN, DISABLE);
00132 }
00133 
00168 static inline
00169 void CSL_lcdcLiddWriteCsAddr (
00173     CSL_LcdcHandle        hLcdc,
00174     CSL_LcdcChipSelect    cs0cs1,
00175     Uint32                arg
00176 )
00177 {
00178     if (CSL_LCDC_LIDD_CS0 == cs0cs1 )
00179     {
00180         CSL_FINS (hLcdc->regs->LCDLIDDCS0ADDR,
00181                                LCDC_LCDLIDDCS0ADDR_ADR_INDX, arg);
00182     }
00183     else
00184     {
00185         CSL_FINS (hLcdc->regs->LCDLIDDCS1ADDR,
00186                                LCDC_LCDLIDDCS1ADDR_ADR_INDX, arg);
00187     }
00188 }
00189 
00190 
00225 static inline
00226 void CSL_lcdcLiddWriteCsData (
00230     CSL_LcdcHandle        hLcdc,
00231     CSL_LcdcChipSelect    cs0cs1,
00232     Uint16                arg
00233 )
00234 {
00235     if (CSL_LCDC_LIDD_CS0 == cs0cs1 )
00236     {
00237         CSL_FINS (hLcdc->regs->LCDLIDDCS0DATA,
00238                                LCDC_LCDLIDDCS0DATA_DATA, arg);
00239     }
00240     else
00241     {
00242         CSL_FINS (hLcdc->regs->LCDLIDDCS1DATA,
00243                                LCDC_LCDLIDDCS1DATA_DATA, arg);
00244     }
00245 }
00246 
00282 static inline
00283 Uint16 CSL_lcdcGetLiddCsData (
00287     CSL_LcdcHandle        hLcdc,
00288     CSL_LcdcChipSelect    cs0cs1
00289 )
00290 {
00291     if (CSL_LCDC_LIDD_CS0 == cs0cs1 )
00292     {
00293         return (hLcdc->regs->LCDLIDDCS0DATA);
00294     }
00295     else
00296     {
00297         return (hLcdc->regs->LCDLIDDCS1DATA);
00298     }
00299 }
00300 
00301 
00337 static inline
00338 Uint16 CSL_lcdcGetLiddCsAddr (
00342     CSL_LcdcHandle        hLcdc,
00343     CSL_LcdcChipSelect    cs0cs1
00344 )
00345 {
00346     if (CSL_LCDC_LIDD_CS0 == cs0cs1 )
00347     {
00348         return (hLcdc->regs->LCDLIDDCS0ADDR);
00349     }
00350     else
00351     {
00352         return (hLcdc->regs->LCDLIDDCS1ADDR);
00353     }
00354 }
00355 
00390 static inline
00391 void CSL_lcdcGetVersion (
00395     CSL_LcdcHandle        hLcdc,
00397     void                 *responseMinor,
00398     void                 *responseMajor
00399 )
00400 {
00401     *(Uint16*)responseMinor = CSL_LCDC_REGS->LCDREVMIN;
00402     *(Uint16*)responseMajor = CSL_LCDC_REGS->LCDREVMAJ;
00403 }
00404 
00446 static inline
00447 CSL_Status LCD_getSetup (
00448                CSL_LcdcHandle         hLcdc,
00449                CSL_LcdcHwSetup*       getSetup  )
00450 {
00451     Uint16    tempVar;
00452 
00453     if((hLcdc !=  NULL) && (getSetup != NULL))
00454     {
00455         /* passed parameters are ok */
00456     }
00457     else
00458     {
00459         if(hLcdc ==  NULL)
00460         {
00461             return CSL_ESYS_BADHANDLE;
00462         }
00463         else
00464         {
00465             return CSL_ESYS_INVPARAMS;
00466         }
00467     }
00468 
00469     /* Get configured information  for LIDD controller */
00470     (getSetup->config).fdoneIntEn = (CSL_LcdcFdoneCtl)
00471        CSL_FEXT (hLcdc->regs->LCDLIDDCR, LCDC_LCDLIDDCR_DONE_INT_EN);
00472 
00473     (getSetup->config).modeSel = (CSL_LcdcLiddMode)
00474        CSL_FEXT (hLcdc->regs->LCDLIDDCR, LCDC_LCDLIDDCR_LIDD_MODE_SEL);
00475 
00476     (getSetup->config).clkDiv =
00477        CSL_FEXT (hLcdc->regs->LCDCR, LCDC_LCDCR_CLKDIV);
00478 
00479     (getSetup->config).dmaCs0Cs1 = (CSL_LcdcChipSelect)
00480        CSL_FEXT (hLcdc->regs->LCDLIDDCR, LCDC_LCDLIDDCR_DMA_CS0_CS1);
00481 
00482     tempVar = (hLcdc->regs->LCDLIDDCR) &
00483                          CSL_LCD_LCDLIDDCR_POLARITY_CONTROL_MASK;
00484     tempVar = tempVar >> CSL_LCDC_LCDLIDDCR_ALEPOL_SHIFT;
00485     (getSetup->config).polControl = tempVar;
00486 
00487     (getSetup->config).dmaEnable = (CSL_LcdcDmaCtl)
00488        CSL_FEXT (hLcdc->regs->LCDLIDDCR, LCDC_LCDLIDDCR_LIDD_DMA_EN);
00489 
00490     /* Get configured LIDD chip selct configuration register Fields */
00491     if(CSL_LCDC_LIDD_NOT_USE_CS1 == (getSetup->useCs1))
00492     {
00493         /* Get configured LIDD CS0 configuration register fields*/
00494         (getSetup->timingCs0).rStrobe =
00495                        CSL_FEXT (hLcdc->regs->LCDLIDDCS0CONFIG0,
00496                                         LCDC_LCDLIDDCS0CONFIG0_R_STROBE);
00497 
00498         (getSetup->timingCs0).rHold =
00499                        CSL_FEXT (hLcdc->regs->LCDLIDDCS0CONFIG0,
00500                                         LCDC_LCDLIDDCS0CONFIG0_R_HOLD);
00501 
00502         (getSetup->timingCs0).ta =
00503                       CSL_FEXT (hLcdc->regs->LCDLIDDCS0CONFIG0,
00504                                         LCDC_LCDLIDDCS0CONFIG0_TA);
00505 
00506         tempVar = CSL_FEXT (hLcdc->regs->LCDLIDDCS0CONFIG1,
00507                                  LCDC_LCDLIDDCS0CONFIG1_R_SU1);
00508         (getSetup->timingCs0).rSu = (tempVar << 4) +
00509                              CSL_FEXT (hLcdc->regs->LCDLIDDCS0CONFIG0,
00510                                            LCDC_LCDLIDDCS0CONFIG0_R_SU0);
00511 
00512         (getSetup->timingCs0).wSu =
00513                            CSL_FEXT (hLcdc->regs->LCDLIDDCS0CONFIG1,
00514                                            LCDC_LCDLIDDCS0CONFIG1_W_SU);
00515 
00516         (getSetup->timingCs0).wStrobe =
00517                            CSL_FEXT (hLcdc->regs->LCDLIDDCS0CONFIG1,
00518                                        LCDC_LCDLIDDCS0CONFIG1_W_STROBE);
00519 
00520         (getSetup->timingCs0).wHold =
00521                            CSL_FEXT (hLcdc->regs->LCDLIDDCS0CONFIG1,
00522                                          LCDC_LCDLIDDCS0CONFIG1_W_HOLD);
00523     }
00524     else
00525     {
00526         /* Get configured LIDD CS1 configuration register Fields */
00527         (getSetup->timingCs1).rStrobe =
00528                            CSL_FEXT (hLcdc->regs->LCDLIDDCS1CONFIG0,
00529                                         LCDC_LCDLIDDCS1CONFIG0_R_STROBE);
00530 
00531         (getSetup->timingCs1).rHold =
00532                            CSL_FEXT (hLcdc->regs->LCDLIDDCS1CONFIG0,
00533                                         LCDC_LCDLIDDCS1CONFIG0_R_HOLD);
00534 
00535         (getSetup->timingCs1).ta =
00536                           CSL_FEXT (hLcdc->regs->LCDLIDDCS1CONFIG0,
00537                                             LCDC_LCDLIDDCS1CONFIG0_TA);
00538 
00539         tempVar = CSL_FEXT (hLcdc->regs->LCDLIDDCS1CONFIG1,
00540                                 LCDC_LCDLIDDCS1CONFIG1_R_SU1);
00541         (getSetup->timingCs1).rSu = (tempVar << 4) +
00542                            CSL_FEXT (hLcdc->regs->LCDLIDDCS1CONFIG0,
00543                                           LCDC_LCDLIDDCS1CONFIG0_R_SU0);
00544 
00545         (getSetup->timingCs1).wSu =
00546                            CSL_FEXT (hLcdc->regs->LCDLIDDCS1CONFIG1,
00547                                           LCDC_LCDLIDDCS1CONFIG1_W_SU);
00548 
00549         (getSetup->timingCs1).wStrobe =
00550                            CSL_FEXT (hLcdc->regs->LCDLIDDCS1CONFIG1,
00551                                       LCDC_LCDLIDDCS1CONFIG1_W_STROBE);
00552 
00553         (getSetup->timingCs1).wHold =
00554                            CSL_FEXT (hLcdc->regs->LCDLIDDCS1CONFIG1,
00555                                       LCDC_LCDLIDDCS1CONFIG1_W_HOLD);
00556     }
00557 
00558     return CSL_SOK;
00559 }
00560 
00602 static inline
00603 CSL_Status LCD_getConfigDMA (
00604                CSL_LcdcHandle         hLcdc,
00605                CSL_LcdcConfigDma*     pgetConfigDma )
00606 {
00607     Uint32      tmpAddr;
00608     Uint16      tmpAddrLSB;
00609     Uint16      tmpAddrMSB;
00610 
00611     if((hLcdc !=  NULL) && (pgetConfigDma != NULL))
00612     {
00613         /* passed parameters are ok */
00614     }
00615     else
00616     {
00617         if(hLcdc ==  NULL)
00618         {
00619             return CSL_ESYS_BADHANDLE;
00620         }
00621         else
00622         {
00623             return CSL_ESYS_INVPARAMS;
00624         }
00625     }
00626 
00627     pgetConfigDma->burstSize = (CSL_LcdcDmaBurst)
00628               CSL_FEXT (hLcdc->regs->LCDDMACR, LCDC_LCDDMACR_BURST_SIZE);
00629 
00630     pgetConfigDma->eofIntEn = (CSL_LcdcEofIntCtl)
00631               CSL_FEXT (hLcdc->regs->LCDDMACR, LCDC_LCDDMACR_EOF_INTEN);
00632 
00633     pgetConfigDma->bigEndian = (CSL_LcdcEndianess)
00634               CSL_FEXT (hLcdc->regs->LCDDMACR, LCDC_LCDDMACR_BIGENDIAN);
00635 
00636     pgetConfigDma->frameMode = (CSL_LcdcFrameMode)
00637               CSL_FEXT (hLcdc->regs->LCDDMACR, LCDC_LCDDMACR_FRAME_MODE);
00638 
00639     /* DMA frame buffer 0 Base Address Set */
00640     tmpAddrLSB = hLcdc->regs->LCDDMAFB0BAR0;
00641     tmpAddrMSB = hLcdc->regs->LCDDMAFB0BAR1;
00642     tmpAddr = tmpAddrMSB;
00643     tmpAddr = tmpAddr << CSL_LCD_UINT16_NUMBER_BITS;
00644     tmpAddr |= tmpAddrLSB;
00645     tmpAddr  = ((tmpAddr - CSL_LCD_SARAM_DMA_ADDR_OFFSET) >> CSL_LCD_DMA_SHIFT);
00646     pgetConfigDma->fb0Base = tmpAddr;
00647 
00648     /* DMA frame buffer 0 Ceil Address Set*/
00649     tmpAddrLSB = hLcdc->regs->LCDDMAFB0CAR0;
00650     tmpAddrMSB = hLcdc->regs->LCDDMAFB0CAR1;
00651     tmpAddr = tmpAddrMSB;
00652     tmpAddr = tmpAddr << CSL_LCD_UINT16_NUMBER_BITS;
00653     tmpAddr |= tmpAddrLSB;
00654     tmpAddr  = ((tmpAddr - CSL_LCD_SARAM_DMA_ADDR_OFFSET) >> CSL_LCD_DMA_SHIFT);
00655     pgetConfigDma->fb0Ceil = tmpAddr;
00656 
00657     /* DMA frame buffer 1 Base Address Set */
00658     tmpAddrLSB = hLcdc->regs->LCDDMAFB1BAR0;
00659     tmpAddrMSB = hLcdc->regs->LCDDMAFB1BAR1;
00660     tmpAddr = tmpAddrMSB;
00661     tmpAddr = tmpAddr << CSL_LCD_UINT16_NUMBER_BITS;
00662     tmpAddr |= tmpAddrLSB;
00663     tmpAddr  = ((tmpAddr - CSL_LCD_SARAM_DMA_ADDR_OFFSET) >> CSL_LCD_DMA_SHIFT);
00664     pgetConfigDma->fb1Base = tmpAddr;
00665 
00666     /* DMA frame buffer 1 Ceil Address Set*/
00667     tmpAddrLSB = hLcdc->regs->LCDDMAFB1CAR0;
00668     tmpAddrMSB = hLcdc->regs->LCDDMAFB1CAR1;
00669     tmpAddr = tmpAddrMSB;
00670     tmpAddr = tmpAddr << CSL_LCD_UINT16_NUMBER_BITS;
00671     tmpAddr |= tmpAddrLSB;
00672     tmpAddr  = ((tmpAddr - CSL_LCD_SARAM_DMA_ADDR_OFFSET) >> CSL_LCD_DMA_SHIFT);
00673     pgetConfigDma->fb1Ceil = tmpAddr;
00674 
00675     return CSL_SOK;
00676 }
00677 
00681 #endif    //_CSL_LCDCAUX_H_
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