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00039 #ifndef _CSL_SDIO_H_
00040 #define _CSL_SDIO_H_
00041
00042 #ifdef __cplusplus
00043 extern "C" {
00044 #endif
00045
00046 #include <soc.h>
00047 #include <csl_types.h>
00048 #include <csl_error.h>
00049 #include <tistdtypes.h>
00050
00079
00080
00081
00082
00087 #define CSL_SDIO_STUFF_BITS (0x0000)
00088
00089 #define CSL_SDIO_RESET (0x1u)
00090
00091 #define CSL_SDIO_RESET_COUNT (0x20u)
00092
00093 #define CSL_SDIO_DELAY_TIME (100u)
00094
00095 #define CSL_SDIO_RESPONSE_TIMEOUT (0xFFFFu)
00096
00097 #define CSL_SDIO_INIT_TIMEOUT (0xFFFFu)
00098
00099 #define CSL_SDIO_DATA_RW_TIMEOUT (0xFFFFu)
00100
00102 #define CSL_SDIO_CMD_RETRY_COUNT (500u)
00103
00105 #define CSL_SDIO_CLK_DIV_INIT (70u)
00106
00107 #define CSL_SDIO_BUSY_STATE (0x01u)
00108
00109 #define CSL_SDIO_FIFO_EMPTY (0x20u)
00110
00111 #define CSL_SDIO_RESP_DONE (0x04u)
00112
00113 #define CSL_SDIO_READ_READY (0x0400u)
00114
00115 #define CSL_SDIO_WRITE_READY (0x0200u)
00116
00118 #define CSL_SDIO_CARD_DESELECT_RCA (0)
00119
00121 #define CSL_SDIO_NULL (0)
00122
00124 #define CSL_SDIO_CMD_0 (0x0000u)
00125
00126 #define CSL_SDIO_CMD_2 (0x0402u)
00127
00128 #define CSL_SDIO_CMD_3 (0x0203u)
00129
00130 #define CSL_SDIO_CMD_5 (0x0605u)
00131
00132 #define CSL_SDIO_CMD_7 (0x0307u)
00133
00134 #define CSL_SDIO_CMD_8 (0x0208u)
00135
00136 #define CSL_SDIO_CMD_41 (0x0629u)
00137
00138 #define CSL_SDIO_CMD_55 (0x0237u)
00139
00140 #define CSL_SDIO_CMD_53_READ (0x2235u)
00141
00142 #define CSL_SDIO_CMD_53_WRITE (0x2A35u)
00143
00144 #define CSL_SDIO_CMD_52 (0x0234u)
00145
00147 #define CSL_SDIO_CMD_8_ARG (0x1AAu)
00148
00149 #define CSL_SDIO_CMD_41_ARG (0x00ff8000)
00150
00151 #define CSL_SDIO_CMD_41_HCS_ARG (0x40ff8000)
00152
00154 #define CSL_SDIO_CMD41_RESP (0x80FF8000u)
00155
00156 #define CSL_SDIO_SDHC_RESP (0x40000000u)
00157
00159 #define CSL_ESDIO_IO_NOTREADY (0x101u)
00160
00161 #define CSL_ESDIO_MEM_NOTREADY (0x102u)
00162
00164 #define CSL_SDIO_READ_FIFO_LEVEL (32u)
00165
00166 #define CSL_SDIO_WRITE_FIFO_LEVEL (32u)
00167
00169 #define CSL_SDIO_SHIFT_WORD (16u)
00170
00171 #define CSL_SDIO_MASK_WORD (0xFFFFu)
00172
00174 #define CSL_SDIO_SHIFT_BYTE (8u)
00175
00176 #define CSL_SDIO_MASK_BYTE (0xFFu)
00177
00179 #define CSL_SDIO_MMCIM_REG_MASK (0x1FFFu)
00180
00182 #define CSL_SDIO_MAX_BYTE_COUNT (512u)
00183
00184 #define CSL_SDIO_MAX_FUNCTION_COUNT (7u)
00185
00186 #define CSL_SDIO_MAX_BLOCK_SIZE (2048u)
00187
00188 #define CSL_SDIO_MAX_BLOCK_COUNT (511u)
00189
00191 #define CSL_SDIO_MAX_CLKRATE (0xFFu)
00192
00194 #define CSL_SDIO_LSHIFT(val, shift) ((Uint32)val << shift)
00195
00196 #define CSL_SDIO_RSHIFT(val, shift) (val >> shift)
00197
00199 #define CSL_SDIO_REGADDR(regAddr) CSL_SDIO_LSHIFT(regAddr, 9)
00200
00201 #define CSL_SDIO_RAWFLAG(rawFlag) CSL_SDIO_LSHIFT(rawFlag, 27)
00202
00203 #define CSL_SDIO_FUNNUM(funNum) CSL_SDIO_LSHIFT(funNum, 28)
00204
00205 #define CSL_SDIO_RWFLAG(rwFlag) CSL_SDIO_LSHIFT(rwFlag, 31)
00206
00207 #define CSL_SDIO_OPCODE(opCode) CSL_SDIO_LSHIFT(opCode, 26)
00208
00209 #define CSL_SDIO_BLKMODE(blkMode) CSL_SDIO_LSHIFT(blkMode, 27)
00210
00212 #define CSL_SDIO_MAKE_CMD52_WRITE_ARG(wrData, regAddr, rawFlag, funNum, rwFlag)\
00213 (wrData | \
00214 CSL_SDIO_REGADDR(regAddr) | \
00215 CSL_SDIO_RAWFLAG(rawFlag) | \
00216 CSL_SDIO_FUNNUM(funNum) | \
00217 CSL_SDIO_RWFLAG(rwFlag))
00218
00220 #define CSL_SDIO_MAKE_CMD52_READ_ARG(regAddr, rawFlag, funNum, rwFlag) \
00221 (CSL_SDIO_REGADDR(regAddr) | \
00222 CSL_SDIO_RAWFLAG(rawFlag) | \
00223 CSL_SDIO_FUNNUM(funNum) | \
00224 CSL_SDIO_RWFLAG(rwFlag))
00225
00227 #define CSL_SDIO_MAKE_CMD53_ARG(count, regAddr, opCode, blkMode, funNum, rwFlag)\
00228 (count | \
00229 CSL_SDIO_REGADDR(regAddr) | \
00230 CSL_SDIO_OPCODE(opCode) | \
00231 CSL_SDIO_BLKMODE(blkMode) | \
00232 CSL_SDIO_FUNNUM(funNum) | \
00233 CSL_SDIO_RWFLAG(rwFlag))
00234
00236 #define CSL_SDIO_GET_OCR(resp) (resp & 0xFFFFFF)
00237
00238 #define CSL_SDIO_GET_MEM(resp) (CSL_SDIO_RSHIFT(resp, 27) & 0x01)
00239
00240 #define CSL_SDIO_GET_FUNCNT(resp) (CSL_SDIO_RSHIFT(resp, 28) & 0x07)
00241
00242 #define CSL_SDIO_GET_C(resp) (CSL_SDIO_RSHIFT(resp, 31) & 0x01)
00243
00247
00248
00249
00250
00257 typedef enum {
00258 CSL_SDIO_INST0,
00259 CSL_SDIO_INST1,
00260 CSL_SDIO_INST_INV
00261 } CSL_SdioInstId;
00262
00269 typedef enum {
00270 CSL_SDIO_RESPTYPE_NO,
00271 CSL_SDIO_RESPTYPE_R1,
00272 CSL_SDIO_RESPTYPE_R2,
00273 CSL_SDIO_RESPTYPE_R3,
00274 CSL_SDIO_RESPTYPE_R4,
00275 CSL_SDIO_RESPTYPE_R5,
00276 CSL_SDIO_RESPTYPE_R6
00277 } CSL_SdioRespType;
00278
00282 typedef enum {
00283 CSL_SDIO_RESPBUSY_NO,
00284 CSL_SDIO_RESPBUSY_YES
00285 } CSL_SdioRespBusy;
00286
00291 typedef enum
00292 {
00293 CSL_SDIO_CARD_NONE = 0,
00295 CSL_SDIO_IO_CARD,
00297 CSL_SDIO_COMBO_CARD,
00299 CSL_SDIO_INVALID_CARD
00301 } CSL_SdioCardType;
00302
00307 typedef enum {
00308 CSL_SDIO_EVENT_EOFCMD = (1U << 2U),
00312 CSL_SDIO_EVENT_READ = (1U << 10U),
00314 CSL_SDIO_EVENT_WRITE = (1U << 9U),
00316 CSL_SDIO_EVENT_ERROR_CMDCRC = (1U << 7U),
00319 CSL_SDIO_EVENT_ERROR_DATACRC = ((1U << 6U)|(1 << 5U)),
00321 CSL_SDIO_EVENT_ERROR_CMDTIMEOUT = ((1U) << (4U)),
00323 CSL_SDIO_EVENT_ERROR_DATATIMEOUT = ((1U) << (3U)),
00325 CSL_SDIO_EVENT_CARD_EXITBUSY = ((1U) << (1U)),
00327 CSL_SDIO_EVENT_BLOCK_XFERRED = 1U
00329 } CSL_SdioCardRespEvent;
00330
00335 typedef enum
00336 {
00337 CSL_SDIO_EDATDNE_INTERRUPT,
00339 CSL_SDIO_EBSYDNE_INTERRUPT,
00341 CSL_SDIO_ERSPDNE_INTERRUPT,
00343 CSL_SDIO_ETOUTRD_INTERRUPT,
00345 CSL_SDIO_ETOUTRS_INTERRUPT,
00347 CSL_SDIO_ECRCWR_INTERRUPT,
00349 CSL_SDIO_ECRCRD_INTERRUPT,
00351 CSL_SDIO_ECRCRS_INTERRUPT,
00353 CSL_SDIO_RSV_BIT,
00355 CSL_SDIO_EDXRDY_INTERRUPT,
00357 CSL_SDIO_EDRRDY_INTERRUPT,
00359 CSL_SDIO_EDATED_INTERRUPT,
00361 CSL_SDIO_ETRNDNE_INTERRUPT,
00363 CSL_SDIO_MMCIM_ALL_INTERRUPT,
00365 CSL_SDIO_READWAIT_INTERRUPT,
00367 CSL_SDIO_CARD_INTERRUPT,
00369 CSL_SDIO_SDIOIEN_ALL_INTERRUPT
00371 } CSL_SdioEventType;
00372
00377 typedef enum
00378 {
00379 CSL_SDIO_READWAIT_INTR_ENABLE,
00381 CSL_SDIO_READWAIT_INTR_DISABLE,
00383 CSL_SDIO_CARD_INTR_ENABLE,
00385 CSL_SDIO_CARD_INTR_DISABLE,
00387 CSL_SDIO_ALL_INTR_ENABLE,
00389 CSL_SDIO_ALL_INTR_DISABLE
00391 } CSL_SdioIntrStatus;
00392
00398 typedef enum {
00399 CSL_SDIO_ENDIAN_LITTLE = 0U,
00400 CSL_SDIO_ENDIAN_BIG = 1U
00401 } CSL_SdioEndianMode;
00402
00406 #define CSL_SDIO_EVENT_ERROR (CSL_SDIO_EVENT_ERROR_CMDCRC | \
00407 CSL_SDIO_EVENT_ERROR_DATACRC | \
00408 CSL_SDIO_EVENT_ERROR_CMDTIMEOUT | \
00409 CSL_SDIO_EVENT_ERROR_DATATIMEOUT)
00410
00414 #define CSL_SDIO_CMD_TOUT_CRC_ERROR (CSL_SDIO_EVENT_ERROR_CMDCRC | \
00415 CSL_SDIO_EVENT_ERROR_CMDTIMEOUT)
00416
00420 #define CSL_SDIO_DATA_TOUT_CRC_ERROR (CSL_SDIO_EVENT_ERROR_DATACRC | \
00421 CSL_SDIO_EVENT_ERROR_DATATIMEOUT)
00422
00435 typedef struct {
00436 Uint16 respBuf[8];
00447 } CSL_SdioResponse;
00448
00453 typedef struct {
00454 Uint16 mmcctl;
00455 Uint16 mmcclk;
00456 Uint16 mmcim;
00457 Uint16 mmctor;
00458 Uint16 mmctod;
00459 Uint16 mmcblen;
00460 Uint16 mmcnblk;
00461 Uint16 mmcfifoctl;
00462 Uint16 sdioctl;
00463 Uint16 sdioien;
00464 } CSL_SdioConfig;
00465
00470 typedef struct {
00471 Uint16 rca;
00472 Uint32 ocr;
00473 Uint8 funCount;
00474 Bool cardReady;
00475 Bool cardActive;
00476 Bool sdHcDetected;
00477 CSL_SdioCardType sdioCardType;
00478 } CSL_SdioCardObj;
00479
00484 typedef struct {
00485 CSL_MmcsdRegsOvly sdioRegs;
00486 CSL_SdioCardObj *pSdioCardObj;
00487 CSL_SdioEndianMode readEndianMode;
00488 CSL_SdioEndianMode writeEndianMode;
00489 Bool cmd8Resp;
00490 } CSL_SdioControllerObj;
00491
00496 typedef CSL_SdioControllerObj *CSL_SdioHandle;
00497
00501
00502
00503
00546 CSL_Status SDIO_init (void);
00547
00599 CSL_SdioHandle SDIO_open (CSL_SdioControllerObj *pSdioContObj,
00600 CSL_SdioInstId instId,
00601 CSL_Status *status);
00602
00644 CSL_Status SDIO_close(CSL_SdioHandle hSdio);
00645
00699 CSL_Status SDIO_config(CSL_SdioHandle hSdio,
00700 CSL_SdioConfig *pSdioConfig);
00701
00761 CSL_Status SDIO_detectCard(CSL_SdioHandle hSdio,
00762 CSL_SdioCardObj *pSdioCardObj);
00763
00825 CSL_Status SDIO_initCard(CSL_SdioHandle hSdio,
00826 Uint32 OpCondReg,
00827 Bool initMem);
00828
00875 CSL_Status SDIO_resetCard(CSL_SdioHandle hSdio);
00876
00931 CSL_Status SDIO_getRca(CSL_SdioHandle hSdio,
00932 Uint16 *pRCardAddr);
00933
00987 CSL_Status SDIO_deselectCard(CSL_SdioHandle hSdio);
00988
01048 CSL_Status SDIO_selectCard(CSL_SdioHandle hSdio,
01049 Uint16 rca);
01050
01112 CSL_Status SDIO_sendCommand(CSL_SdioHandle hSdio,
01113 Uint32 cmd,
01114 Uint32 arg,
01115 Uint16 respTimeout);
01116
01191 CSL_Status SDIO_getResponse(CSL_SdioHandle hSdio,
01192 CSL_SdioRespType respType,
01193 CSL_SdioResponse *pResponse);
01194
01237 CSL_Status SDIO_clearResponse(CSL_SdioHandle hSdio);
01238
01286 Uint32 SDIO_getStatus(CSL_SdioHandle hSdio,
01287 Uint32 maskValue,
01288 CSL_Status *pStatus);
01289
01337 Uint32 SDIO_getSdioStatus(CSL_SdioHandle hSdio,
01338 Uint32 maskValue,
01339 CSL_Status *pStatus);
01340
01385 CSL_Status SDIO_eventEnable(CSL_SdioHandle hSdio,
01386 CSL_SdioEventType sdioEvent);
01387
01432 CSL_Status SDIO_eventDisable(CSL_SdioHandle hSdio,
01433 CSL_SdioEventType sdioEvent);
01434
01477 CSL_Status SDIO_readWaitEnable(CSL_SdioHandle hSdio);
01478
01521 CSL_Status SDIO_readWaitDisable(CSL_SdioHandle hSdio);
01522
01585 CSL_Status SDIO_readSingleByte(CSL_SdioHandle hSdio,
01586 Uint32 readAddr,
01587 Uint8 funNum,
01588 Uint8 *pReadData);
01589
01653 CSL_Status SDIO_writeSingleByte(CSL_SdioHandle hSdio,
01654 Uint32 writeAddr,
01655 Uint8 funNum,
01656 Uint8 writeData);
01657
01741 CSL_Status SDIO_readBytes(CSL_SdioHandle hSdio,
01742 Uint32 readAddr,
01743 Uint8 funNum,
01744 Bool opCode,
01745 Uint16 noOfBytes,
01746 Uint16 *pReadBuf);
01747
01829 CSL_Status SDIO_writeBytes(CSL_SdioHandle hSdio,
01830 Uint32 writeAddr,
01831 Uint8 funNum,
01832 Bool opCode,
01833 Uint16 noOfBytes,
01834 Uint16 *pWriteBuf);
01835
01918 CSL_Status SDIO_readBlocks(CSL_SdioHandle hSdio,
01919 Uint32 readAddr,
01920 Uint8 funNum,
01921 Bool opCode,
01922 Uint16 noOfBlocks,
01923 Uint16 blockSize,
01924 Uint16 *pReadBuf);
01925
02008 CSL_Status SDIO_writeBlocks(CSL_SdioHandle hSdio,
02009 Uint32 writeAddr,
02010 Uint8 funNum,
02011 Bool opCode,
02012 Uint16 noOfBlocks,
02013 Uint16 blockSize,
02014 Uint16 *pWriteBuf);
02015
02068 CSL_Status SDIO_setEndianMode (CSL_SdioHandle hSdio,
02069 CSL_SdioEndianMode writeEndianMode,
02070 CSL_SdioEndianMode readEndianMode);
02071
02117 CSL_Status SDIO_setClock (CSL_SdioHandle hSdio,
02118 Uint16 clockRate);
02119
02123 #ifdef __cplusplus
02124 }
02125 #endif
02126 #endif
02127
1.7.4