C55XX CSL Version 2.50: csl_uart.h Source File

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00001  /*  ============================================================================
00002  *   Copyright (c) Texas Instruments Inc 2002, 2003, 2004, 2005, 2008
00003  *
00004  *   Use of this software is controlled by the terms and conditions found in the
00005  *   license agreement under which this software has been supplied.
00006  *  ============================================================================
00007  */
00008 
00016 /* ============================================================================
00017  * Revision History
00018  * ================
00019  * 8-Sep-2008 Created
00020  * ============================================================================
00021  */
00022 
00036 #ifndef _CSL_UART_H_
00037 #define _CSL_UART_H_
00038 
00039 #ifdef __cplusplus
00040 extern "C" {
00041 #endif
00042 
00043 #include "cslr.h"
00044 #include "csl_error.h"
00045 #include "csl_types.h"
00046 #include "cslr_uart.h"
00047 #include "soc.h"
00048 #include "csl_intc.h"
00049 #include "csl_general.h"
00050 
00075 /*****************************************************************************\
00076           UART global macro declarations                                      *
00077 \*****************************************************************************/
00079 #define RBR THR
00080 
00081 #define IIR FCR
00082 
00085 #define CSL_UART_BAUD_MULTIPLIER        (16u)
00086 
00087 #define CSL_UART_CLK_DIVIDER( baud )  ( Uint32 ) ( (Uint32)CSL_UART_BAUD_MULTIPLIER * (Uint32) ( baud) )
00088 
00089 #define    UART_EVT_TBEI_IID   0x01
00090 
00091 #define    UART_EVT_RBI_IID   0x02
00092 
00093 #define    UART_EVT_LSI_IID    0x03
00094 
00095 #define    UART_EVT_CTOI_IID   0x06
00096 
00098 #define   CSL_UART_WORD5            0x05
00099 
00100 #define   CSL_UART_WORD6            0x06
00101 
00102 #define   CSL_UART_WORD7            0x07
00103 
00104 #define   CSL_UART_WORD8            0x08
00105 
00116 #define   CSL_UART_DISABLE_PARITY   (0x00u)
00117 
00118 #define   CSL_UART_ODD_PARITY       (0x01u)
00119 
00120 #define   CSL_UART_EVEN_PARITY      (0x02u)
00121 
00123 #define   CSL_UART_MARK_PARITY      (0x03u)
00124 
00126 #define   CSL_UART_SPACE_PARITY     (0x04u)
00127 
00129 #define   CSL_UART_FIFO_DISABLE     CSL_FMKT(UART_FCR_FIFOEN,DISABLE)
00130 
00132 #define   CSL_UART_FIFO_DMA1_DISABLE_TRIG01   CSL_FMKT(UART_FCR_FIFOEN,ENABLE)|\
00133                     CSL_FMKT(UART_FCR_RXCLR,CLR)|CSL_FMKT(UART_FCR_TXCLR,CLR)|\
00134                     CSL_FMKT(UART_FCR_DMAMODE1,DISABLE)|CSL_FMKT(UART_FCR_RXFIFTL,CHAR1)
00135 
00137 #define   CSL_UART_FIFO_DMA1_DISABLE_TRIG04   CSL_FMKT(UART_FCR_FIFOEN,ENABLE)|\
00138                     CSL_FMKT(UART_FCR_RXCLR,CLR)|CSL_FMKT(UART_FCR_TXCLR,CLR)|\
00139                     CSL_FMKT(UART_FCR_DMAMODE1,DISABLE)|CSL_FMKT(UART_FCR_RXFIFTL,CHAR4)
00140 
00142 #define   CSL_UART_FIFO_DMA1_DISABLE_TRIG08   CSL_FMKT(UART_FCR_FIFOEN,ENABLE)|\
00143                     CSL_FMKT(UART_FCR_RXCLR,CLR)|CSL_FMKT(UART_FCR_TXCLR,CLR)|\
00144                     CSL_FMKT(UART_FCR_DMAMODE1,DISABLE)|CSL_FMKT(UART_FCR_RXFIFTL,CHAR8)
00145 
00147 #define   CSL_UART_FIFO_DMA1_DISABLE_TRIG14   CSL_FMKT(UART_FCR_FIFOEN,ENABLE)|\
00148                     CSL_FMKT(UART_FCR_RXCLR,CLR)|CSL_FMKT(UART_FCR_TXCLR,CLR)|\
00149                     CSL_FMKT(UART_FCR_DMAMODE1,DISABLE)|CSL_FMKT(UART_FCR_RXFIFTL,CHAR14)
00150 
00152 #define   CSL_UART_FIFO_DMA1_ENABLE_TRIG01   CSL_FMKT(UART_FCR_FIFOEN,ENABLE)|\
00153                     CSL_FMKT(UART_FCR_RXCLR,CLR)|CSL_FMKT(UART_FCR_TXCLR,CLR)|\
00154                     CSL_FMKT(UART_FCR_DMAMODE1,ENABLE)|CSL_FMKT(UART_FCR_RXFIFTL,CHAR1)
00155 
00157 #define   CSL_UART_FIFO_DMA1_ENABLE_TRIG04   CSL_FMKT(UART_FCR_FIFOEN,ENABLE)|\
00158                     CSL_FMKT(UART_FCR_RXCLR,CLR)|CSL_FMKT(UART_FCR_TXCLR,CLR)|\
00159                     CSL_FMKT(UART_FCR_DMAMODE1,ENABLE)|CSL_FMKT(UART_FCR_RXFIFTL,CHAR4)
00160 
00162 #define   CSL_UART_FIFO_DMA1_ENABLE_TRIG08   CSL_FMKT(UART_FCR_FIFOEN,ENABLE)|\
00163                     CSL_FMKT(UART_FCR_RXCLR,CLR)|CSL_FMKT(UART_FCR_TXCLR,CLR)|\
00164                     CSL_FMKT(UART_FCR_DMAMODE1,ENABLE)|CSL_FMKT(UART_FCR_RXFIFTL,CHAR8)
00165 
00167 #define   CSL_UART_FIFO_DMA1_ENABLE_TRIG14   CSL_FMKT(UART_FCR_FIFOEN,ENABLE)|\
00168                     CSL_FMKT(UART_FCR_RXCLR,CLR)|CSL_FMKT(UART_FCR_TXCLR,CLR)|\
00169                     CSL_FMKT(UART_FCR_DMAMODE1,ENABLE)|CSL_FMKT(UART_FCR_RXFIFTL,CHAR14)
00170 
00173 #define   CSL_UART_NO_LOOPBACK    (0x00u)
00174 
00177 #define   CSL_UART_LOOPBACK       (0x01u)
00178 
00181 #define   CSL_UART_NO_AFE    (0x00u)
00182 
00185 #define   CSL_UART_AFE       (0x01u)
00186 
00189 #define   CSL_UART_NO_RTS    (0x00u)
00190 
00193 #define   CSL_UART_RTS       (0x01u)
00194 
00205 typedef enum
00206 {
00208     CSL_UART_INST_0 = (0u),
00210     CSL_UART_INST_INVALID = (1u)
00211 } CSL_UartInsId;
00217 typedef enum
00218 {
00219     UART_POLLED=0,              
00220     UART_INTERRUPT,             
00221     UART_OPMODE_OTHER           
00222 }CSL_UartOpmode;
00223 
00224 
00228 typedef enum {
00230     CSL_UART_FIFO_MODE = 0,
00232     CSL_UART_NON_FIFO_MODE = 1,
00234     CSL_UART_MODE_UNDEFINED = 2
00235 
00236 } CSL_UartXferMode;
00237 
00244 typedef enum CSL_UartEventType
00245 {
00247     CSL_UART_RECVOR_REG_DATA_INTERRUPT,
00249     CSL_UART_XMITOR_REG_EMPTY_INTERRUPT,
00251     CSL_UART_RECVOR_LINE_STATUS_INTERRUPT
00252 }CSL_UartEventType;
00253 
00262 /**************************************************************************\
00263 * UART global data structure declarations                                  *
00264 \**************************************************************************/
00271 typedef struct
00272 {
00274     Uint32              clkInput;
00276     Uint32              baud;
00279     Uint16              wordLength;
00282     Uint16              stopBits;
00284     Uint16              parity;
00286     Uint16              fifoControl;
00288     Uint16              loopBackEnable;
00290     Uint16              afeEnable;
00292     Uint16              rtsEnable;
00293 
00294 
00295 } CSL_UartSetup;
00300 typedef struct
00301 {
00303    Uint16              DLL;
00305    Uint16              DLH;
00307    Uint16              LCR;
00309    Uint16              FCR;
00311    Uint16              MCR;
00312 } CSL_UartConfig;
00318 typedef struct
00319 {
00321     void (*lsiAddr)(void);
00323     void (*rbiAddr)(void);
00325     void (*tbeiAddr)(void);
00327     void (*ctoi)(void);
00328 
00329 } CSL_UartIsrAddr;
00335 typedef struct CSL_UartObj
00336 {
00338     Uint16 insId;
00340     CSL_UartRegsOvly uartRegs;
00342     CSL_SysRegsOvly sysAddr;
00344     CSL_UartOpmode opmode;
00346     Uint16 trigLevel;
00348     Uint32 UART_isrDispatchTable[7];
00349 }CSL_UartObj;
00351 typedef CSL_UartObj  *CSL_UartHandle;
00352 
00358 /*****************************************************************************\
00359  * UART function declarations                                                                           *
00360 \*****************************************************************************/
00361 
00404 CSL_Status UART_init(CSL_UartObj *  uartObj,Uint32 uartInstId,
00405                      CSL_UartOpmode opmode);
00444 CSL_Status UART_setup(CSL_UartHandle hUart, CSL_UartSetup *uartSetup);
00445 
00491  CSL_Status UART_config(CSL_UartHandle hUart,CSL_UartConfig *uartConfig) ;
00532 CSL_Status UART_setupBaudRate(CSL_UartHandle hUart,Uint32 clkInput,Uint32 baudRate);
00575 CSL_Status UART_reset(CSL_UartHandle hUart);
00616 CSL_Status UART_resetOff(CSL_UartHandle hUart);
00665 CSL_Status UART_eventEnable(CSL_UartHandle hUart, CSL_UartEventType uartEvent);
00719 CSL_Status  UART_eventDisable(CSL_UartHandle hUart,CSL_UartEventType uartEvent);
00771 CSL_Status UART_read(CSL_UartHandle hUart,
00772                      Char* pBuf, Uint16 count, Uint32 timeout);
00773 
00822 CSL_Status UART_write( CSL_UartHandle hUart,
00823                        Char *pBuf, Uint16 count, Uint32 timeout) ;
00869 CSL_Status UART_fgetc(CSL_UartHandle hUart, Char *elem, Uint32 timeout);
00913 CSL_Status UART_fputc(CSL_UartHandle hUart, const Char elem, Uint32 timeout);
00914 
00966 CSL_Status UART_fgets(CSL_UartHandle hUart,
00967                       Char * pBuf, Uint16 bufSize, Uint32 timeout);
01014 CSL_Status UART_fputs(CSL_UartHandle hUart, const Char* pBuf, Uint32 timeout);
01050  Int16 UART_getEventId(CSL_UartHandle hUart);
01051 
01085 CSL_Status UART_getConfig(CSL_UartHandle hUart,CSL_UartConfig *config);
01086 
01125 CSL_Status UART_setCallback(CSL_UartHandle hUart,CSL_UartIsrAddr *isrAddr);
01126 
01130 #ifdef __cplusplus
01131 }
01132 #endif
01133 
01134 #endif