WriteI2C(ADDR_981s, 0x01, 0x01);


WriteI2C(ADDR_981s, 0x1F, 0x00);         
WriteI2C(ADDR_981s, 0x1F, 0x01);          


WriteI2C(ADDR_981s, 0x05, 0x0b);        

// 2. 外部 27MHz 晶振
WriteI2C(ADDR_981s, 0x02, 0x04);
// 3. FPD4 单链路模式
WriteI2C(ADDR_981s, 0x03, 0x7C);

WriteI2C(ADDR_981s, 0x07, 0x88);   
//WriteI2C(ADDR_981s, 0x1A, 0x58);   // 远端 688 的地址

WriteI2C(ADDR_981s, 0x0F, 0x02);

WriteI2C(ADDR_981s, 0x10, 0x00);

//  Link Layer  (Page 11)
WriteI2C(ADDR_981s, 0x40, 0x0B << 2);   
WriteI2C(ADDR_981s, 0x41, 0x00);        
WriteI2C(ADDR_981s, 0x42, 0x01);       


WriteI2C(ADDR_981s, 0x08, 0x58);           // 解串器远程 I2C 地址

rec18=ReadI2C(ADDR_981s,0x07);


WriteI2C(ADDR_981s, 0x07,  rec18 | 0x08);  // 使能 I2C Pass-Through


  WriteI2C(ADDR_981s, 0x40, 0x08);   // IND_ACC_SEL = 0x02 (Page 2)
  WriteI2C(ADDR_981s, 0x41, 0x0E);   // VCO_CH0
  WriteI2C(ADDR_981s, 0x42, 0x0C);   // VCO_SEL=0x1 (VCO2)
  WriteI2C(ADDR_981s, 0x41, 0x13);   // PDIV_CH0
  WriteI2C(ADDR_981s, 0x42, 0x10);   // POST_DIV=0x1 (除以2 -> 6.75Gbps)
  WriteI2C(ADDR_981s, 0x41, 0x04);   // MASH_ORDER_CH0
  WriteI2C(ADDR_981s, 0x42, 0x00);   // Integer mode
  WriteI2C(ADDR_981s, 0x41, 0x05);   // NDIV_7:0_CH0
  WriteI2C(ADDR_981s, 0x42, 0x7D);   // N=125
  WriteI2C(ADDR_981s, 0x41, 0x06);
  WriteI2C(ADDR_981s, 0x42, 0x00);

  WriteI2C(ADDR_981s, 0x41, 0x18); WriteI2C(ADDR_981s, 0x42, 0xF6);
  WriteI2C(ADDR_981s, 0x41, 0x19); WriteI2C(ADDR_981s, 0x42, 0xFF);
  WriteI2C(ADDR_981s, 0x41, 0x1A); WriteI2C(ADDR_981s, 0x42, 0xFF);

  WriteI2C(ADDR_981s, 0x41, 0x1E); WriteI2C(ADDR_981s, 0x42, 0x00);
  WriteI2C(ADDR_981s, 0x41, 0x1F); WriteI2C(ADDR_981s, 0x42, 0x00);
  WriteI2C(ADDR_981s, 0x41, 0x20); WriteI2C(ADDR_981s, 0x42, 0x00);

  WriteI2C(ADDR_981s, 0x01, 0x10);
  WriteI2C(ADDR_981s, 0x01, 0x00);
  WriteI2C(ADDR_981s, 0x40, 0x00);  


  WriteI2C(ADDR_981s, 0x40, 0x30);   // IND_ACC_SEL = 0x0C (Page 12)

  WriteI2C(ADDR_981s, 0x41, 0x10); WriteI2C(ADDR_981s, 0x42, 0x80); 
  WriteI2C(ADDR_981s, 0x41, 0x11); WriteI2C(ADDR_981s, 0x42, 0x07); 
  WriteI2C(ADDR_981s, 0x41, 0x12); WriteI2C(ADDR_981s, 0x42, 0x94); 
  WriteI2C(ADDR_981s, 0x41, 0x13); WriteI2C(ADDR_981s, 0x42, 0x00);
  WriteI2C(ADDR_981s, 0x41, 0x14); WriteI2C(ADDR_981s, 0x42, 0x2C); 
  WriteI2C(ADDR_981s, 0x41, 0x15); WriteI2C(ADDR_981s, 0x42, 0x00);
  WriteI2C(ADDR_981s, 0x41, 0x16); WriteI2C(ADDR_981s, 0x42, 0x98); 
  WriteI2C(ADDR_981s, 0x41, 0x17); WriteI2C(ADDR_981s, 0x42, 0x08);

  WriteI2C(ADDR_981s, 0x41, 0x18); WriteI2C(ADDR_981s, 0x42, 0x38); 
  WriteI2C(ADDR_981s, 0x41, 0x19); WriteI2C(ADDR_981s, 0x42, 0x04);
  WriteI2C(ADDR_981s, 0x41, 0x1A); WriteI2C(ADDR_981s, 0x42, 0x24); 
  WriteI2C(ADDR_981s, 0x41, 0x1B); WriteI2C(ADDR_981s, 0x42, 0x00);
  WriteI2C(ADDR_981s, 0x41, 0x1C); WriteI2C(ADDR_981s, 0x42, 0x05); 
  WriteI2C(ADDR_981s, 0x41, 0x1D); WriteI2C(ADDR_981s, 0x42, 0x00);
  WriteI2C(ADDR_981s, 0x41, 0x1E); WriteI2C(ADDR_981s, 0x42, 0x37); 
  WriteI2C(ADDR_981s, 0x41, 0x1F); WriteI2C(ADDR_981s, 0x42, 0x00);

  // (155.232MHz)
  WriteI2C(ADDR_981s, 0x41, 0x23); WriteI2C(ADDR_981s, 0x42, 0x07); // M LSB
  WriteI2C(ADDR_981s, 0x41, 0x24); WriteI2C(ADDR_981s, 0x42, 0x00); // M MSB
  WriteI2C(ADDR_981s, 0x41, 0x25); WriteI2C(ADDR_981s, 0x42, 0x0F); // N=15

  //  Pattern Generator 
  WriteI2C(ADDR_981s, 0x41, 0x01);
  uint8_t cfg = ReadI2C(ADDR_981s, 0x42);
  cfg = (cfg & 0xFC) | 0x02;  
  WriteI2C(ADDR_981s, 0x41, 0x01);
  WriteI2C(ADDR_981s, 0x42, cfg);  // 写回

  // ====Pattern Generator 配置 ====================
  WriteI2C(ADDR_981s, 0x41, 0x2A);
  WriteI2C(ADDR_981s, 0x42, 0x86);   
  WriteI2C(ADDR_981s, 0x41, 0x2B);
  WriteI2C(ADDR_981s, 0x42, 0x98); // THW LSB
  WriteI2C(ADDR_981s, 0x42, 0x08); // THW MSB (2200)
  WriteI2C(ADDR_981s, 0x42, 0x98); // TVW LSB
  WriteI2C(ADDR_981s, 0x42, 0x04); // TVW MSB (1176)
  WriteI2C(ADDR_981s, 0x42, 0x80); // AHW LSB
  WriteI2C(ADDR_981s, 0x42, 0x07); // AHW MSB (1920)
  WriteI2C(ADDR_981s, 0x42, 0x38); // AVW LSB
  WriteI2C(ADDR_981s, 0x42, 0x04); // AVW MSB (1080)
  WriteI2C(ADDR_981s, 0x42, 0x2C); // HSW LSB
  WriteI2C(ADDR_981s, 0x42, 0x00); // HSW MSB (44)
  WriteI2C(ADDR_981s, 0x42, 0x05); // VSW LSB
  WriteI2C(ADDR_981s, 0x42, 0x00); // VSW MSB (5)
  WriteI2C(ADDR_981s, 0x42, 0x94); // HBP LSB
  WriteI2C(ADDR_981s, 0x42, 0x00); // HBP MSB (148)
  WriteI2C(ADDR_981s, 0x42, 0x24); // VBP LSB
  WriteI2C(ADDR_981s, 0x42, 0x00); // VBP MSB (36)

  
  WriteI2C(ADDR_981s, 0x41, 0x29);
  WriteI2C(ADDR_981s, 0x42, 0x2C);  

 
  WriteI2C(ADDR_981s, 0x41, 0x28);
  WriteI2C(ADDR_981s, 0x42, 0x9F);   

  
  WriteI2C(ADDR_981s, 0x40, 0x00);   // 
  WriteI2C(ADDR_981s, 0x40, 0x2C);   // 
  WriteI2C(ADDR_981s, 0x41, 0x00);   // 
  WriteI2C(ADDR_981s, 0x42, 0x01);   // 
  WriteI2C(ADDR_981s, 0x41, 0x01);   
  WriteI2C(ADDR_981s, 0x42, 0x01);   // 
  WriteI2C(ADDR_981s, 0x41, 0x02);   //
  WriteI2C(ADDR_981s, 0x42, 0x00);   // 
  WriteI2C(ADDR_981s, 0x40, 0x00);   // 

 
  WriteI2C(ADDR_981s, 0x44, 0x01);