/****************************************************************************\
 *           Copyright (C) 2000 Texas Instruments Incorporated.             *
 *                           All Rights Reserved                            *
 *                                                                          *
 * GENERAL DISCLAIMER                                                       *
 * ------------------                                                       *
 * All software and related documentation is provided "AS IS" and without   *
 * warranty or support of any kind and Texas Instruments expressly disclaims*
 * all other warranties, express or implied, including, but not limited to, *
 * the implied warranties of merchantability and fitness for a particular   *
 * purpose.  Under no circumstances shall Texas Instruments be liable for   *
 * any incidental, special or consequential damages that result from the    *
 * use or inability to use the software or related documentation, even if   *
 * Texas Instruments has been advised of the liability.                     *
 ****************************************************************************
 * lnkL2.cmd                                                                *
 *                                                                          *
 * Written by :                                                             *
 *            Patrick Geremia and Sebastien Tomas  (VCP)                    *
 *            Patrick Geremia and Philippe Malleth (TCP)                    *
 *            Texas Instruments                                             *
 *            10 January, 2002                                              *
 * The purpose of this test is to evaluate Bit-Error Rate performance for   *
 * both VCP and TCP co-processors in the TMS320C6416.                       *
 *                                                                          *
 * This test should not be redistributed for any reason without             *
 * permission.                                                              *
 *                                                                          *
\***************************************************************************/
-stack 0x4000
-heap  0x800000

-e Entry
/* Since we used 'Entry' as the entry-point symbol the compiler issues a    */
/* warning (#10063-D: entry-point symbol other than "_c_int00" specified:   */
/* "Entry"). The CCS Version (5.1.0.08000) stops building from command      */
/* line when there is a warning. So this warning is suppressed with the     */
/* below flag. */

--diag_suppress=10063

MEMORY
{
 /*  VECS     	o=0x00800000 l=0x00000200	*/
/*   L2:      	o=0x00800200 l=0x000ff800	*/
   L3:			o=0x0c000000 l=0x00200000
/*   L3_DAT:		o=0x0c110000 l=0x00010000*/
/* NO L2CACHE:     o=0x009E0000 l=0x00020000 */
//   L1P:     	o=0x00E00000 l=0x00007FFF
//   L1D:     	o=0x00F00000 l=0x00007FFF
   DDR:        o=0x80000000 l=0x08000000

}

/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */

SECTIONS
{
   /* .init    : {
                 <init.obj> (.text)
               } load > 0x80000000*/
    .vectable : load > 0x80000000
    .TTB      : load > 0x80100000
    .TESTDATA : load > 0x81000000

    .MMUTESTDATA1 : load > 0x82000000
    .MMUTESTDATA2 : load > 0x83000000
    .MMUTESTCODE : load > 0x81100000
	.GFLAG : load > 0x81200000
    .CACHETESTDATA : load > 0x81300000
    .cinit  : load > DDR
    .text    : load > DDR              /* CODE                          */
    .data    : load > DDR              /* INITIALIZED GLOBAL AND STATIC VARIABLES */
    .bss     : load > DDR
               RUN_START(bss_start)
               RUN_END(bss_end)

    .const   : load > DDR              /* GLOBAL CONSTANTS              */
    .stack   : load > 0x87FFc000       /* SOFTWARE SYSTEM STACK         */
     .args: load > DDR //align = 0x4, fill = 0 {_argsize = 0x200; }
    .sysmem: load > DDR
    .cinit: load > DDR
    .const: load > DDR //START(const_start) SIZE(const_size)
    .pinit: load > DDR
    .cio: load >> DDR
    .init_array: load > DDR
    .redL2 > DDR
    .redMSMC > DDR
}

/*SECTIONS
{
     .text: load >> DDRRAM

    GROUP (NEAR_DP)
    {
    .neardata
    .rodata
    .bss
    } load > DDRRAM

    .far: load >> DDRRAM
    .far.1: load >> DDRRAM
    .fardata: load >> DDRRAM
    .data: load >> DDRRAM
    .switch: load >> DDRRAM
    .stack: load > DDRRAM
    .args: load > DDRRAM //align = 0x4, fill = 0 {_argsize = 0x200; }
    .sysmem: load > DDRRAM
    .cinit: load > DDRRAM
    .const: load > DDRRAM //START(const_start) SIZE(const_size)
    .pinit: load > DDRRAM
    .cio: load >> DDRRAM
    .init_array: load > DDRRAM
    .redL2 > DDRRAM
    .redMSMC > DDRRAM
}*/

