;******************************************************************************
;* BOOT  v4.9.5                                                               *
;*                                                                            *
;* Copyright (c) 1996-2012 Texas Instruments Incorporated                     *
;* http://www.ti.com/                                                         *
;*                                                                            *
;*  Redistribution and  use in source  and binary forms, with  or without     *
;*  modification,  are permitted provided  that the  following conditions     *
;*  are met:                                                                  *
;*                                                                            *
;*     Redistributions  of source  code must  retain the  above copyright     *
;*     notice, this list of conditions and the following disclaimer.          *
;*                                                                            *
;*     Redistributions in binary form  must reproduce the above copyright     *
;*     notice, this  list of conditions  and the following  disclaimer in     *
;*     the  documentation  and/or   other  materials  provided  with  the     *
;*     distribution.                                                          *
;*                                                                            *
;*     Neither the  name of Texas Instruments Incorporated  nor the names     *
;*     of its  contributors may  be used to  endorse or  promote products     *
;*     derived  from   this  software  without   specific  prior  written     *
;*     permission.                                                            *
;*                                                                            *
;*  THIS SOFTWARE  IS PROVIDED BY THE COPYRIGHT  HOLDERS AND CONTRIBUTORS     *
;*  "AS IS"  AND ANY  EXPRESS OR IMPLIED  WARRANTIES, INCLUDING,  BUT NOT     *
;*  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR     *
;*  A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT     *
;*  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,     *
;*  SPECIAL,  EXEMPLARY,  OR CONSEQUENTIAL  DAMAGES  (INCLUDING, BUT  NOT     *
;*  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,     *
;*  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY     *
;*  THEORY OF  LIABILITY, WHETHER IN CONTRACT, STRICT  LIABILITY, OR TORT     *
;*  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE     *
;*  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.      *
;*                                                                            *
;******************************************************************************

;****************************************************************************
;* BOOT.ASM
;*
;* THIS IS THE INITAL BOOT ROUTINE FOR TMS470 C++ PROGRAMS.
;* IT MUST BE LINKED AND LOADED WITH ALL C++ PROGRAMS.
;*
;* THIS MODULE PERFORMS THE FOLLOWING ACTIONS:
;*   1) ALLOCATES THE STACK AND INITIALIZES THE STACK POINTER
;*   2) CALLS AUTO-INITIALIZATION ROUTINE
;*   3) CALLS THE FUNCTION MAIN TO START THE C++ PROGRAM
;*   4) CALLS THE STANDARD EXIT ROUTINE
;*
;* THIS MODULE DEFINES THE FOLLOWING GLOBAL SYMBOLS:
;*   1) __stack     STACK MEMORY AREA
;*   2) _c_int00    BOOT ROUTINE
;*
;****************************************************************************

;***************************************************************
;* DEFINE THE USER MODE STACK (DEFAULT SIZE IS 512)
;***************************************************************
;__stack:.usect	".stack", 0, 4

	;.global	_arm_enable_ccntr:

;***************************************************************
;* FUNCTION DEF: _c_int00
;***************************************************************
     .global _arm_enable_ccntr
     .global _arm_read_ccntr
     .global _arm_enable_ICache
     .global _arm_NOP

_arm_enable_ccntr: .asmfunc
      stmfd      sp!,{r0-r4}
      mrc     p15, #0, r1, c9, c12, #1  ;; Read count enable set reg
      orr      r1,r1,#0x80000000            ;; Set CCNT enable bit
      mcr     p15, #0, r1, c9, c12, #1  ;; Write count enable set
      mrc     p15,#0,r2,c9,c12,#0           ;; Read PMNC reg
      orr     r2, r2, #1                    ;; Set All counter enable bit
      mcr     p15,#0,r2,c9,c12,#0           ;; Write PMNC reg
      mrc     p15,#0,r3,c9,c12,#0           ;; Read PMNC reg

      ;; Enable Performonce monitor reads in USR mode
      mrc     p15, #0, r2, c9, c14, #0  ;; Write USEREN Register
      orr     r2, r2, #1                    ;; Set USEREN Bit
      mcr     p15, #0, r2, c9, c14, #0  ;; Write USEREN Register

      ldmfd      sp!,{r0-r4}
      mov     pc, r14;                     ;; return
end_arm_enable_ccntr:

_arm_read_ccntr:
      mrc     p15, #0, r0, c9, c13, #0 ; Read CCNT Register
      mov     pc, r14;                     ;; return
end_arm_read_ccntr:

_arm_enable_ICache:
     stmfd   sp!,{r0-r4}                  ; Push Stack
     mov     r1,#2
     mcr     p15,#2,r1,c0,c0,#0              ; Enable Level2 unified cache.
     mrc     p15, #0, r1, c1, c0, #0         ; Read Control Register
     mov     r2, #1
     orr    r1, r1, r2, lsl #12             ; Set I bit (instruction cache enable)
     orr    r1, r1, r2, lsl #2              ; Set C bit (data cache enable)
     mcr     p15, #0, r1, c1, c0, #0         ; Write Control Register
     mrc     p15, #0, r1, c1, c0, #1         ; Read Auxiliary Control Register
     mov     r2, #2
     orr    r1, r1, r2                      ; Set L2EN bit
     mcr     p15, #0, r1, c1, c0, #1         ; Write Auxiliary Control Register
     ldmfd     sp!,{r0-r4}                  ; Pop stack
     mov     pc, r14;                     ;; return
end_arm_enable_ICache:

_arm_NOP:
     NOP
     mov     pc, r14;                     ;; return
end_arm_NOP:
