/*
 * mailbox_common.h
 *
 *  Created on: 2014Äê12ÔÂ14ÈÕ
 *      Author: gjc
 */

#ifndef MAILBOX_COMMON_H_
#define MAILBOX_COMMON_H_


#define MAILBOX_BASE_ADDR		0x80c8000
#define RD_MEM_32(addr) 	  	 *(volatile unsigned int*)(addr)
#define WR_MEM_32(addr, data)    do {*(volatile unsigned int*)(addr) =(unsigned int)(data);}while(0)

/*
 *mailbox 9 used for M3
 *mailbox 10 for dsp
 *mailbox 11 for arm
 * */
#define MAILBOX_MESSAGE_M3   (MAILBOX_BASE_ADDR+0x40+0x4*9)
#define MAILBOX_FIFOSTATUS_M3    (MAILBOX_BASE_ADDR+0x80+0x4*9)
#define MAILBOX_MSGSTATUS_M3   (MAILBOX_BASE_ADDR+0xc0+0x4*9)
#define MAILBOX_IRQSTATUS_RAW_U_M3   (MAILBOX_BASE_ADDR+0x100+0x10*2)
#define MAILBOX_IRQSTATUS_CLR_U_M3   (MAILBOX_BASE_ADDR+0x104+0x10*2)
#define MAILBOX_IRQENABLE_SET_U_M3   (MAILBOX_BASE_ADDR+0x108+0x10*2)
#define MAILBOX_IRQENABLE_CLR_U_M3   (MAILBOX_BASE_ADDR+0x10c+0x10*2)

#define MAILBOX_MESSAGE_A8   (MAILBOX_BASE_ADDR+0x40+0x4*11)
#define MAILBOX_FIFOSTATUS_A8    (MAILBOX_BASE_ADDR+0x80+0x4*11)
#define MAILBOX_MSGSTATUS_A8   (MAILBOX_BASE_ADDR+0xc0+0x4*11)
#define MAILBOX_IRQSTATUS_RAW_U_A8   (MAILBOX_BASE_ADDR+0x100+0x10*0)
#define MAILBOX_IRQSTATUS_CLR_U_A8   (MAILBOX_BASE_ADDR+0x104+0x10*0)
#define MAILBOX_IRQENABLE_SET_U_A8   (MAILBOX_BASE_ADDR+0x108+0x10*0)
#define MAILBOX_IRQENABLE_CLR_U_A8   (MAILBOX_BASE_ADDR+0x10c+0x10*0)

#define MAILBOX_MESSAGE_DSP   (MAILBOX_BASE_ADDR+0x40+0x4*10)
#define MAILBOX_FIFOSTATUS_DSP    (MAILBOX_BASE_ADDR+0x80+0x4*10)
#define MAILBOX_MSGSTATUS_DSP   (MAILBOX_BASE_ADDR+0xc0+0x4*10)
#define MAILBOX_IRQSTATUS_RAW_U_DSP   (MAILBOX_BASE_ADDR+0x100+0x10*1)
#define MAILBOX_IRQSTATUS_CLR_U_DSP   (MAILBOX_BASE_ADDR+0x104+0x10*1)
#define MAILBOX_IRQENABLE_SET_U_DSP   (MAILBOX_BASE_ADDR+0x108+0x10*1)
#define MAILBOX_IRQENABLE_CLR_U_DSP   (MAILBOX_BASE_ADDR+0x10c+0x10*1)


#endif /* MAILBOX_COMMON_H_ */
