/****************************************************************************/
/*  lnk.cmd   v1.10                                                         */
/*  Copyright (c) 1996-1997  Texas Instruments Incorporated                 */
/****************************************************************************/
-e c_int00
-c
-x
-heap  0x9000
-stack 0x800
-lrts6700.lib


/****************************************************************************/
/*  Specify the Memory Configuration                                        */
/****************************************************************************/

MEMORY
{
  ROM_VECS : origin = 0x00000000 length = 0x1000
  ROM      : origin = 0x00001000 length = 0xbf000
  VEC	   : origin = 0x10000000 length = 0xA00
  VEC_RET  : origin = 0x10000A00 length = 0x100
  PAR_LIST : origin = 0x10000B00 length = 0x274
  LABEL    : origin = 0x10000D74 length = 0x20
  RAM      : origin = 0x10000D94 length = 0x40000
  SDRAM    : origin = 0x80000000 length = 0x4000000
  ASYNC2   : origin = 0x90000000 length = 0x8000 
}


/****************************************************************************/
/*  Specify the Output Sections                                             */
/****************************************************************************/

SECTIONS
{
    .boot_vectors:  load = ROM_VECS
	.parameter_list load = PAR_LIST
    .vector:	    load = RAM align = 0x400
    .text:   	    load = RAM
    .stack          load = RAM fill = 0xdeadbeef
    .cinit          load = RAM
    .cio            load = RAM
    .const          load = RAM 
    .data           load = RAM
    .switch         load = RAM
    .far            load = RAM
    .bss            load = RAM
    .sysmem         load = RAM
    .test_cache	    load = RAM
	.pinit			load = RAM    /* Added by sumanth   */
    .packet         load = VEC_RET/* Added for fetchpckt*/
    .err_buffers    load = RAM fill=0xabcdabcd	
    .src_a_buffers  load = RAM align = 0x200	
    .src_b_buffers  load = RAM align = 0x200 
    .src_c_buffers  load = RAM align = 0x200	
    .src_d_buffers  load = RAM align = 0x200 
    .src_e_buffers  load = RAM align = 0x200	
    .src_f_buffers  load = RAM align = 0x200 
    .dst_buffers    load = RAM align = 0x200
	.dsp_data		load = RAM align = 0x200
    .uhpitb_cmd     load = ASYNC2
    .uhpitb_data    load = ASYNC2
    .uhpitb_dst     load = ASYNC2
    .src_buffers    load = RAM align = 0x200
}
