/*
 *  Copyright 2008 by Spectrum Digital Incorporated.
 *  All rights reserved.  Property of Spectrum Digital Incorporated.
 */

/*
 *  Linker command file
 *
 */



-stack           0x00001000      /* Stack Size */
-heap            0x00001000      /* Heap Size */

MEMORY
{
    VECS:        o = 0x80000000  l = 0x00000f00
    ARMRAM:      o = 0xFFFF0080  l = 0x00001f80

	DSPL2ROM:    o = 0x00700000  l = 0x000FFFFF
    DSPL2RAM:    o = 0x00800800  l = 0x00040000
    DSPL1PRAM:   o = 0x00E00000  l = 0x00008000
    DSPL1DRAM:   o = 0x00F00000  l = 0x00008000

	DSPL2RAM2:   o = 0x11800000  l = 0x0003FFFF
    DSPL1PRAM2:  o = 0x11E00000  l = 0x00008000
    DSPL1DRAM2:  o = 0x11F00000  l = 0x00008000


    SHAREDRAM:   o = 0x80000f00  l = 0x0001ffff
    SDRAM:       o = 0xC0000000  l = 0x20000000
    
}

SECTIONS
{   ".vectors"  >   VECS
    .bss        >   DSPL2RAM
    .cinit      >   DSPL2RAM
    .cio        >   DSPL2RAM
    .const      >   DSPL2RAM
    .stack      >   DSPL2RAM
    .sysmem     >   DSPL2RAM
    .text       >   DSPL2RAM
    .switch     >   DSPL2RAM
    .far        >   DSPL2RAM
    .calcbuffer >   DSPL2RAM
	.compxbuf   >   DSPL2RAM

	.bufs       >   SHAREDRAM

	.buffer     >   SDRAM
    .buffertemp >   SDRAM
	.compxbuffer>   SDRAM
}




