U-Boot 2010.06 (Nov 26 2014 - 09:52:05) TI8148-GP rev 3.0 L3 clk : 200MHz IVA clk : 410MHz ISS clk : 480MHz DSP clk : 750MHz DSS clk : 200MHz ARM clk : 720MHz DDR clk : 480MHz ------------ PLL Settings -------------- OSC_0_FREQ : 20MHz MODENA_N : 1 MODENA_M : 72 MODENA_M2 : 1 L3_N : 19 L3_M : 800 L3_M2 : 4 DSP_N : 19 DSP_M : 750 DSP_M2 : 1 DSS_N : 19 DSS_M : 800 DSS_M2 : 4 IVA_N : 19 IVA_M : 820 IVA_M2 : 2 ISS_N : 19 ISS_M : 960 ISS_M2 : 2 USB_N : 19 USB_M : 960 USB_M2 : 5 DCO_HS2_MIN : 500 DCO_HS2_MAX : 1000 DCO_HS1_MIN : 1000 DCO_HS1_MAX : 2000 SELFREQDCO_HS2 : 2049 SELFREQDCO_HS1 : 4097 --------- DDR PLL ---------- DDR_N : 0x13 DDR_M : 0x3C0 DDR_M2 : 0x2 ----------EMIF Timings (identical for 0 & 1)------- DDR3_EMIF_READ_LATENCY : 0x170209 DDR3_EMIF_TIM1 : 0xCCF36A3 DDR3_EMIF_TIM2 : 0x305A7FDA DDR3_EMIF_TIM3 : 0x507F855F DDR3_EMIF_REF_CTRL : 0x103D DDR3_EMIF_SDRAM_CONFIG : 0x61C11AB2 DDR3_EMIF_SDRAM_ZQCR : 0x50074BE2 ----------SW LEVEL Info (EMIF 0) ------- DDR3_PHY_RD_DQS_CS0_BYTE0: 0x00000038 DDR3_PHY_RD_DQS_CS0_BYTE1: 0x00000037 DDR3_PHY_RD_DQS_CS0_BYTE2: 0x00000032 DDR3_PHY_RD_DQS_CS0_BYTE3: 0x00000031 DDR3_PHY_WR_DQS_CS0_BYTE0: 0x00000043 DDR3_PHY_WR_DQS_CS0_BYTE1: 0x00000044 DDR3_PHY_WR_DQS_CS0_BYTE2: 0x00000053 DDR3_PHY_WR_DQS_CS0_BYTE3: 0x00000050 DDR3_PHY_RD_DQS_GATE_CS0_BYTE0: 0x000000E4 DDR3_PHY_RD_DQS_GATE_CS0_BYTE1: 0x00000111 DDR3_PHY_RD_DQS_GATE_CS0_BYTE2: 0x00000112 DDR3_PHY_RD_DQS_GATE_CS0_BYTE3: 0x0000013D DDR3_PHY_WR_DATA_CS0_BYTE0: 0x00000085 DDR3_PHY_WR_DATA_CS0_BYTE1: 0x00000083 DDR3_PHY_WR_DATA_CS0_BYTE2: 0x00000085 DDR3_PHY_WR_DATA_CS0_BYTE3: 0x0000007F ----------SW LEVEL Info (EMIF 1) ------- DDR3_PHY_RD_DQS_CS0_BYTE0: 0x0000003A DDR3_PHY_RD_DQS_CS0_BYTE1: 0x00000036 DDR3_PHY_RD_DQS_CS0_BYTE2: 0x00000037 DDR3_PHY_RD_DQS_CS0_BYTE3: 0x00000033 DDR3_PHY_WR_DQS_CS0_BYTE0: 0x00000049 DDR3_PHY_WR_DQS_CS0_BYTE1: 0x0000004E DDR3_PHY_WR_DQS_CS0_BYTE2: 0x00000054 DDR3_PHY_WR_DQS_CS0_BYTE3: 0x00000050 DDR3_PHY_RD_DQS_GATE_CS0_BYTE0: 0x000000D3 DDR3_PHY_RD_DQS_GATE_CS0_BYTE1: 0x000000F7 DDR3_PHY_RD_DQS_GATE_CS0_BYTE2: 0x00000109 DDR3_PHY_RD_DQS_GATE_CS0_BYTE3: 0x00000135 DDR3_PHY_WR_DATA_CS0_BYTE0: 0x0000008A DDR3_PHY_WR_DATA_CS0_BYTE1: 0x00000080 DDR3_PHY_WR_DATA_CS0_BYTE2: 0x0000007F DDR3_PHY_WR_DATA_CS0_BYTE3: 0x00000085 DRAM: 1 GiB NAND: HW ECC BCH8 Selected 128 MiB Using default environment The 2nd stage U-Boot will now be auto-loaded Please do not interrupt the countdown till TI8148_EVM prompt if 2nd stage is already flashed Hit any key to stop autoboot: 0 NAND read: device 0 offset 0x20000, size 0x40000 262144 bytes read: OK ## Starting application at 0x81000000 ... U-Boot 2010.06 (Nov 26 2014 - 09:53:29) TI8148-GP rev 3.0 L3 clk : 200MHz IVA clk : 410MHz ISS clk : 480MHz DSP clk : 750MHz DSS clk : 200MHz ARM clk : 720MHz DDR clk : 480MHz ------------ PLL Settings -------------- OSC_0_FREQ : 20MHz MODENA_N : 1 MODENA_M : 72 MODENA_M2 : 1 L3_N : 19 L3_M : 800 L3_M2 : 4 DSP_N : 19 DSP_M : 750 DSP_M2 : 1 DSS_N : 19 DSS_M : 800 DSS_M2 : 4 IVA_N : 19 IVA_M : 820 IVA_M2 : 2 ISS_N : 19 ISS_M : 960 ISS_M2 : 2 USB_N : 19 USB_M : 960 USB_M2 : 5 DCO_HS2_MIN : 500 DCO_HS2_MAX : 1000 DCO_HS1_MIN : 1000 DCO_HS1_MAX : 2000 SELFREQDCO_HS2 : 2049 SELFREQDCO_HS1 : 4097 --------- DDR PLL ---------- DDR_N : 0x13 DDR_M : 0x3C0 DDR_M2 : 0x2 ----------EMIF Timings (identical for 0 & 1)------- DDR3_EMIF_READ_LATENCY : 0x170209 DDR3_EMIF_TIM1 : 0xCCF36A3 DDR3_EMIF_TIM2 : 0x305A7FDA DDR3_EMIF_TIM3 : 0x507F855F DDR3_EMIF_REF_CTRL : 0x103D DDR3_EMIF_SDRAM_CONFIG : 0x61C11AB2 DDR3_EMIF_SDRAM_ZQCR : 0x50074BE2 ----------SW LEVEL Info (EMIF 0) ------- DDR3_PHY_RD_DQS_CS0_BYTE0: 0x00000038 DDR3_PHY_RD_DQS_CS0_BYTE1: 0x00000037 DDR3_PHY_RD_DQS_CS0_BYTE2: 0x00000032 DDR3_PHY_RD_DQS_CS0_BYTE3: 0x00000031 DDR3_PHY_WR_DQS_CS0_BYTE0: 0x00000043 DDR3_PHY_WR_DQS_CS0_BYTE1: 0x00000044 DDR3_PHY_WR_DQS_CS0_BYTE2: 0x00000053 DDR3_PHY_WR_DQS_CS0_BYTE3: 0x00000050 DDR3_PHY_RD_DQS_GATE_CS0_BYTE0: 0x000000E4 DDR3_PHY_RD_DQS_GATE_CS0_BYTE1: 0x00000111 DDR3_PHY_RD_DQS_GATE_CS0_BYTE2: 0x00000112 DDR3_PHY_RD_DQS_GATE_CS0_BYTE3: 0x0000013D DDR3_PHY_WR_DATA_CS0_BYTE0: 0x00000085 DDR3_PHY_WR_DATA_CS0_BYTE1: 0x00000083 DDR3_PHY_WR_DATA_CS0_BYTE2: 0x00000085 DDR3_PHY_WR_DATA_CS0_BYTE3: 0x0000007F ----------SW LEVEL Info (EMIF 1) ------- DDR3_PHY_RD_DQS_CS0_BYTE0: 0x0000003A DDR3_PHY_RD_DQS_CS0_BYTE1: 0x00000036 DDR3_PHY_RD_DQS_CS0_BYTE2: 0x00000037 DDR3_PHY_RD_DQS_CS0_BYTE3: 0x00000033 DDR3_PHY_WR_DQS_CS0_BYTE0: 0x00000049 DDR3_PHY_WR_DQS_CS0_BYTE1: 0x0000004E DDR3_PHY_WR_DQS_CS0_BYTE2: 0x00000054 DDR3_PHY_WR_DQS_CS0_BYTE3: 0x00000050 DDR3_PHY_RD_DQS_GATE_CS0_BYTE0: 0x000000D3 DDR3_PHY_RD_DQS_GATE_CS0_BYTE1: 0x000000F7 DDR3_PHY_RD_DQS_GATE_CS0_BYTE2: 0x00000109 DDR3_PHY_RD_DQS_GATE_CS0_BYTE3: 0x00000135 DDR3_PHY_WR_DATA_CS0_BYTE0: 0x0000008A DDR3_PHY_WR_DATA_CS0_BYTE1: 0x00000080 DDR3_PHY_WR_DATA_CS0_BYTE2: 0x0000007F DDR3_PHY_WR_DATA_CS0_BYTE3: 0x00000085 I2C: ready DRAM: 1 GiB NAND: HW ECC BCH8 Selected 128 MiB MMC: OMAP SD/MMC: 0 .:;rrr;;. ,5#@@@@#####@@@@@@#2, ,A@@@hi;;;r5;;;;r;rrSG@@@A, r@@#i;:;s222hG;rrsrrrrrr;ri#@@r :@@hr:r;SG3ssrr2r;rrsrsrsrsrr;rh@@: B@H;;rr;3Hs;rrr;sr;;rrsrsrsrsrsr;;H@B @@s:rrs;5#;;rrrr;r#@H:;;rrsrsrsrsrr:s@@ @@;;srs&X#9;r;r;;,2@@@rrr:;;rrsrsrsrr;;@@ @@;;rrsrrs@MB#@@@@@###@@@@@@#rsrsrsrsrr;;@@ G@r;rrsrsr;#X;SX25Ss#@@#M@#9H9rrsrsrsrsrs;r@G @9:srsrsrs;2@;:;;:.X@@@@@H::;rrsrsrsrsrsrr:3@ X@;rrsrsrsrr;XAi;;:&@@#@Bs:rrsrsrsrsrsrsrsrr;@X @#;rsrsrsrsrr;r2ir@@@###::rrsrsrsrsrsrsrsrsr:@@ @A:rrsrsrsrr;:2@29@@M@@@;:;rrrrsrsrsrsrsrsrs;H@ @&;rsrsrsrr;A@@@@@@###@@@s::;:;;rrsrsrsrsrsr;G@ @#:rrsrsrsr;G@5Hr25@@@#@@@#9XG9s:rrrrsrsrsrs:#@ M@;rsrsrsrs;r@&#;::S@@@@@@@M@@@@Grr:;rsrsrsr;@# :@s;rsrsrsrr:M#Msrr;;&#@@@@@@@@@@H@@5;rsrsr;s@, @@:rrsrsrsr;S@rrrsr;:;r3MH@@#@M5,S@@irrsrr:@@ @A:rrsrsrsrrrrrsrsrrr;::;@##@r:;rH@h;srr:H@ ;@9:rrsrsrsrrrsrsrsrsr;,S@Hi@i:;s;MX;rr:h@; r@B:rrrrsrsrsrsrsrr;;sA@#i,i@h;r;S5;r:H@r ,@@r;rrrsrsrsrsrr;2BM3r:;r:G@:rrr;;r@@, B@Mr;rrrrsrsrsr@@S;;;rrr:5M;rr;rM@H .@@@i;;rrrrsrs2i;rrrrr;r@M:;i@@@. .A@@#5r;;;r;;;rrr;r:r#AsM@@H. ;&@@@@MhXS5i5SX9B@@@@G; :ihM#@@@@@##hs, Net: Detected MACID:8:11:23:32:12:77 miiphy_register: added 'cpsw', read=0x80722ea0, write=0x80722f08 cpsw Hit any key to stop autoboot: 0 Card did not respond to voltage select! ** Can't read from device 0 ** ** Unable to use mmc 0:1 for fatload ** In case ENV on MMC/SD is required Please put a valid script named boot.scr on the card Refer to the User Guide on how to generate the image TI8148_EVM# TI8148_EVM# TI8148_EVM#print bootcmd=if mmc rescan 0; then if run loadbootscript; then run bootscript; else echo In case ENV on MMC/SD is required; echo Please put a valid script named boot.scr on the card; echo Refer to the User Guide on how to generate the image; fi; else echo Please set bootargs and bootcmd before booting the kernel; echo If that has already been done please ignore this message; fi bootdelay=3 baudrate=115200 verify=yes ramdisk_file=ramdisk.gz loadaddr=0x81000000 script_addr=0x80900000 loadbootscript=fatload mmc 0 ${script_addr} boot.scr bootscript= echo Running bootscript from MMC/SD to set the ENV...; source ${script_addr} ethact=cpsw autoload=no bootfile=uImage ethaddr=08:11:23:32:12:77 netmask=255.255.255.0 ipaddr=192.168.8.238 serverip=192.168.8.49 filesize=30798 stdin=serial stdout=serial stderr=serial Environment size: 812/131068 bytes TI8148_EVM#ping 192.168.8.49 @@lpw phy_init slave->data->phy_id=1 addr=0x1 val=0x282 val2=0xf014 Configuring LSI Phy link up on port 0, speed 100, full duplex mac control=21 Using cpsw device ping failed; host 192.168.8.49 is not alive TI8148_EVM#ping 192.168.2.49 @@lpw phy_init slave->data->phy_id=1 addr=0x1 val=0x282 val2=0xf014 Configuring LSI Phy link up on port 0, speed 100, full duplex mac control=21 Using cpsw device ping failed; host 192.168.2.49 is not alive TI8148_EVM#set gatewayip 192.168.2.1 TI8148_EVM#print bootcmd=if mmc rescan 0; then if run loadbootscript; then run bootscript; else echo In case ENV on MMC/SD is required; echo Please put a valid script named boot.scr on the card; echo Refer to the User Guide on how to generate the image; fi; else echo Please set bootargs and bootcmd before booting the kernel; echo If that has already been done please ignore this message; fi bootdelay=3 baudrate=115200 verify=yes ramdisk_file=ramdisk.gz loadaddr=0x81000000 script_addr=0x80900000 loadbootscript=fatload mmc 0 ${script_addr} boot.scr bootscript= echo Running bootscript from MMC/SD to set the ENV...; source ${script_addr} ethact=cpsw autoload=no bootfile=uImage ethaddr=08:11:23:32:12:77 netmask=255.255.255.0 ipaddr=192.168.8.238 serverip=192.168.8.49 filesize=30798 stdin=serial stdout=serial stderr=serial gatewayip=192.168.2.1 Environment size: 834/131068 bytes TI8148_EVM#ping 192.168.2.49 @@lpw phy_init slave->data->phy_id=1 addr=0x1 val=0x282 val2=0xf014 Configuring LSI Phy link up on port 0, speed 100, full duplex mac control=21 Using cpsw device ping failed; host 192.168.2.49 is not alive TI8148_EVM#ping 192.168.8.49 @@lpw phy_init slave->data->phy_id=1 addr=0x1 val=0x282 val2=0xf014 Configuring LSI Phy link up on port 0, speed 100, full duplex mac control=21 Using cpsw device ping failed; host 192.168.8.49 is not alive TI8148_EVM#setenv ipaddr 192.168.8.238 TI8148_EVM#setenv serverip 192.168.8.49 TI8148_EVM#saveen Saving Environment to NAND... Erasing Nand... Erasing at 0x260000 -- 100% complete. Writing to Nand... done TI8148_EVM#tftp 0x81000000 u-boot_DM814X_TI_EVM.bin @@lpw phy_init slave->data->phy_id=1 addr=0x1 val=0x282 val2=0xf014 Configuring LSI Phy link up on port 0, speed 100, full duplex mac control=21 Using cpsw device TFTP from server 192.168.8.49; our IP address is 192.168.8.238 Filename 'u-boot_DM814X_TI_EVM.bin'. Load address: 0x81000000 Loading: T T T T T T T T T T T Abort TI8148_EVM#tftp 0x81000000 u-boot_DM814X_TI_EVM.min.eth @@lpw phy_init slave->data->phy_id=1 addr=0x1 val=0x282 val2=0xf014 Configuring LSI Phy link up on port 0, speed 100, full duplex mac control=21 Using cpsw device TFTP from server 192.168.8.49; our IP address is 192.168.8.238 Filename 'u-boot_DM814X_TI_EVM.min.eth'. Load address: 0x81000000 Loading: T T Abort