From 9c8fd86151a386c50834b58efa8b3c850f7e9d8e Mon Sep 17 00:00:00 2001
From: johnchain <lijunqian@dhms.net>
Date: Wed, 27 Dec 2017 20:09:52 +0800
Subject: [PATCH] [uboot][flash][add] support MT29F8G08ABACAWP

---
 u-boot-2015.10/drivers/mtd/nand/am335x_spl_bch.c |  2 +
 u-boot-2015.10/drivers/mtd/nand/omap_gpmc.c      | 32 ++++++++-
 u-boot-2015.10/include/configs/am335x_evm.h      | 84 ++++++++++++++++++++++--
 3 files changed, 110 insertions(+), 8 deletions(-)

diff --git a/u-boot-2015.10/drivers/mtd/nand/am335x_spl_bch.c b/u-boot-2015.10/drivers/mtd/nand/am335x_spl_bch.c
index bf8b2ee16..5f74a0eac 100644
--- a/u-boot-2015.10/drivers/mtd/nand/am335x_spl_bch.c
+++ b/u-boot-2015.10/drivers/mtd/nand/am335x_spl_bch.c
@@ -215,6 +215,8 @@ void nand_init(void)
 		(void  __iomem *)CONFIG_SYS_NAND_BASE;
 	board_nand_init(&nand_chip);
 
+	printf("[johnchain+++] here in nand_init, CONFIG_SYS_NAND_BASE = 0x%x\n", CONFIG_SYS_NAND_BASE);
+	
 	if (nand_chip.select_chip)
 		nand_chip.select_chip(&nand_info[0], 0);
 
diff --git a/u-boot-2015.10/drivers/mtd/nand/omap_gpmc.c b/u-boot-2015.10/drivers/mtd/nand/omap_gpmc.c
index 4814fa202..983054e00 100644
--- a/u-boot-2015.10/drivers/mtd/nand/omap_gpmc.c
+++ b/u-boot-2015.10/drivers/mtd/nand/omap_gpmc.c
@@ -715,6 +715,7 @@ static int omap_select_ecc_scheme(struct nand_chip *nand,
 	int eccsteps = pagesize / SECTOR_BYTES;
 	int i;
 
+	printf("[johnchain+++][debug CONFIG_SYS_NAND_BASE] here in omap_select_ecc_scheme, CONFIG_SYS_NAND_BASE = 0x%x\n", CONFIG_SYS_NAND_BASE);
 	switch (ecc_scheme) {
 	case OMAP_ECC_HAM1_CODE_SW:
 		debug("nand: selected OMAP_ECC_HAM1_CODE_SW\n");
@@ -803,7 +804,7 @@ static int omap_select_ecc_scheme(struct nand_chip *nand,
 
 	case OMAP_ECC_BCH8_CODE_HW:
 #ifdef CONFIG_NAND_OMAP_ELM
-		debug("nand: selected OMAP_ECC_BCH8_CODE_HW\n");
+		printf("nand: selected OMAP_ECC_BCH8_CODE_HW\n");
 		/* check ecc-scheme requirements before updating ecc info */
 		if ((14 * eccsteps) + BADBLOCK_MARKER_LENGTH > oobsize) {
 			printf("nand: error: insufficient OOB: require=%d\n", (
@@ -838,7 +839,7 @@ static int omap_select_ecc_scheme(struct nand_chip *nand,
 
 	case OMAP_ECC_BCH16_CODE_HW:
 #ifdef CONFIG_NAND_OMAP_ELM
-		debug("nand: using OMAP_ECC_BCH16_CODE_HW\n");
+		printf("nand: using OMAP_ECC_BCH16_CODE_HW\n");
 		/* check ecc-scheme requirements before updating ecc info */
 		if ((26 * eccsteps) + BADBLOCK_MARKER_LENGTH > oobsize) {
 			printf("nand: error: insufficient OOB: require=%d\n", (
@@ -858,11 +859,24 @@ static int omap_select_ecc_scheme(struct nand_chip *nand,
 		nand->ecc.read_page	= omap_read_page_bch;
 		/* define ecc-layout */
 		ecclayout->eccbytes	= nand->ecc.bytes * eccsteps;
+#ifdef	CONFIG_NAND_PAGE_4K
+		printf("[johnchain+++][debug MT nand flash] in CONFIG_NAND_PAGE_4K build\n");
+		for (i = 0; i < ecclayout->eccbytes; i++) {
+			if (nand->options & NAND_BUSWIDTH_16)
+				ecclayout->eccpos[i] = i + 200;
+			else
+				ecclayout->eccpos[i] = i + 200;
+		}
+		ecclayout->oobfree[0].offset = 2;
+		ecclayout->oobfree[0].length = 38;
+#else
+		printf("[johnchain+++][debug MT nand flash] in CONFIG_NAND_PAGE_4K build\n");
 		for (i = 0; i < ecclayout->eccbytes; i++)
 			ecclayout->eccpos[i] = i + BADBLOCK_MARKER_LENGTH;
 		ecclayout->oobfree[0].offset = i + BADBLOCK_MARKER_LENGTH;
 		ecclayout->oobfree[0].length = oobsize - nand->ecc.bytes -
 						BADBLOCK_MARKER_LENGTH;
+#endif
 		break;
 #else
 		printf("nand: error: CONFIG_NAND_OMAP_ELM required for ECC\n");
@@ -895,6 +909,19 @@ int __maybe_unused omap_nand_switch_ecc(uint32_t hardware, uint32_t eccstrength)
 	struct nand_chip *nand;
 	struct mtd_info *mtd;
 	int err = 0;
+	printf("[johnchain+++][debug MT nand flash] here in omap_nand_switch_ecc\n");
+#ifdef	CONFIG_NAND_PAGE_4K
+	switch(eccstrength) {
+			case 1:
+				eccstrength = 8;
+				break;
+			case 8:
+				eccstrength = 16;
+				break;
+			default:
+				break;
+		}
+#endif
 
 	if (nand_curr_device < 0 ||
 	    nand_curr_device >= CONFIG_SYS_MAX_NAND_DEVICE ||
@@ -970,6 +997,7 @@ int board_nand_init(struct nand_chip *nand)
 	 * TBD: need to make this logic generic to handle multiple CS NAND
 	 * devices.
 	 */
+	 printf("[johnchain+++][debug CONFIG_SYS_NAND_BASE] here in board_nand_init\n");
 	while (cs < GPMC_MAX_CS) {
 		/* Check if NAND type is set */
 		if ((readl(&gpmc_cfg->cs[cs].config1) & 0xC00) == 0x800) {
diff --git a/u-boot-2015.10/include/configs/am335x_evm.h b/u-boot-2015.10/include/configs/am335x_evm.h
index 3a8278d0a..7999cac43 100644
--- a/u-boot-2015.10/include/configs/am335x_evm.h
+++ b/u-boot-2015.10/include/configs/am335x_evm.h
@@ -17,6 +17,7 @@
 #define __CONFIG_AM335X_EVM_H
 
 #include <configs/ti_am335x_common.h>
+#define CONFIG_NAND_PAGE_4K
 
 #ifndef CONFIG_SPL_BUILD
 #ifndef CONFIG_FIT
@@ -225,14 +226,52 @@
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
 					 CONFIG_SYS_NAND_PAGE_SIZE)
-#define CONFIG_SYS_NAND_PAGE_SIZE	2048
-#define CONFIG_SYS_NAND_OOBSIZE		64
-#define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
+#ifdef CONFIG_NAND_PAGE_4K
+ #undef	CONFIG_SYS_SPI_U_BOOT_OFFS
+ #define	CONFIG_SYS_SPI_U_BOOT_OFFS	0x40000
+
+#define CONFIG_SYS_NAND_PAGE_SIZE	4096
+#define CONFIG_SYS_NAND_OOBSIZE		224
+#define CONFIG_SYS_NAND_BLOCK_SIZE	(64*4096)
+#else
+#define CONFIG_SYS_NAND_PAGE_SIZE      2048
+#define CONFIG_SYS_NAND_OOBSIZE                64
+#define CONFIG_SYS_NAND_BLOCK_SIZE     (128*1024)
+#endif /*end CONFIG_NAND_PAGE_4K*/
+
 /* NAND: driver related configs */
 #define CONFIG_NAND_OMAP_GPMC
 #define CONFIG_NAND_OMAP_GPMC_PREFETCH
 #define CONFIG_NAND_OMAP_ELM
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
+
+#ifdef CONFIG_NAND_PAGE_4K
+#define CONFIG_SYS_NAND_ECCPOS { \
+	  2, 3, 4, 5, 6, 7, 8, 9, \
+	 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, \
+	 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, \
+	 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, \
+	 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, \
+	 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, \
+	 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, \
+	 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, \
+	 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, \
+	 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, \
+	100, 101, 102, 103, 104, 105, 106, 107, 108, 109, \
+	110, 111, 112, 113, 114, 115, 116, 117, 118, 119, \
+	120, 121, 122, 123, 124, 125, 126, 127, 128, 129, \
+	130, 131, 132, 133, 134, 135, 136, 137, 138, 139, \
+	140, 141, 142, 143, 144, 145, 146, 147, 148, 149, \
+	150, 151, 152, 153, 154, 155, 156, 157, 158, 159, \
+	160, 161, 162, 163, 164, 165, 166, 167, 168, 169, \
+	170, 171, 172, 173, 174, 175, 176, 177, 178, 179, \
+	180, 181, 182, 183, 184, 185, 186, 187, 188, 189, \
+	190, 191, 192, 193, 194, 195, 196, 197, 198, 199, \
+	200, 201, 202, 203, 204, 205, 206, 207, 208, 209, }
+#define CONFIG_SYS_NAND_ECCSIZE		512
+#define CONFIG_SYS_NAND_ECCBYTES	26
+#define CONFIG_SYS_NAND_ECCSTEPS    8
+#else
 #define CONFIG_SYS_NAND_ECCPOS		{ 2, 3, 4, 5, 6, 7, 8, 9, \
 					 10, 11, 12, 13, 14, 15, 16, 17, \
 					 18, 19, 20, 21, 22, 23, 24, 25, \
@@ -243,9 +282,36 @@
 
 #define CONFIG_SYS_NAND_ECCSIZE		512
 #define CONFIG_SYS_NAND_ECCBYTES	14
+#endif  /*CONFIG_NAND_PAGE_4K*/
+
+
+/* #define CONFIG_SPL_NAND_AM33XX_BCH */
 #define CONFIG_SYS_NAND_ONFI_DETECTION
+
+#ifdef	CONFIG_NAND_PAGE_4K
+#define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_BCH16_CODE_HW
+#else
 #define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_BCH8_CODE_HW
+#endif
+
 #define MTDIDS_DEFAULT			"nand0=nand.0"
+#ifdef CONFIG_NAND_PAGE_4K
+#define MTDPARTS_DEFAULT		"mtdparts=nand.0:" \
+					"256K(NAND.SPL)," \
+					"256k(NAND.SPL.backup1)," \
+					"256k(NAND.SPL.backup2)," \
+					"256k(NAND.SPL.backup3)," \
+					"256k(NAND.u-boot-spl-os)," \
+					"1m(NAND.u-boot)," \
+					"256k(NAND.u-boot-env)," \
+					"256k(NAND.u-boot-env.backup1)," \
+					"8m(NAND.kernel)," \
+					"8m(NAND.kernel.other)," \
+					"256k(NAND.update)," \
+					"-(NAND.file-system)"
+#define CONFIG_ENV_OFFSET		0x00200000
+#define CONFIG_ENV_OFFSET_REDUND	0x00240000
+#else
 #define MTDPARTS_DEFAULT		"mtdparts=nand.0:" \
 					"128k(NAND.SPL)," \
 					"128k(NAND.SPL.backup1)," \
@@ -259,11 +325,17 @@
 					"8m(NAND.kernel.other)," \
 					"128k(NAND.update)," \
 					"-(NAND.file-system)"
-#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x000c0000
-#undef CONFIG_ENV_IS_NOWHERE
-#define CONFIG_ENV_IS_IN_NAND
 #define CONFIG_ENV_OFFSET		0x001c0000
 #define CONFIG_ENV_OFFSET_REDUND	0x001e0000
+#endif
+
+#ifdef	CONFIG_NAND_PAGE_4K
+  #define CONFIG_SYS_NAND_U_BOOT_OFFS			0x00100000
+#else
+  #define CONFIG_SYS_NAND_U_BOOT_OFFS			0x000c0000
+#endif
+#undef CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_IS_IN_NAND
 #define CONFIG_SYS_ENV_SECT_SIZE	CONFIG_SYS_NAND_BLOCK_SIZE
 /* NAND: SPL related configs */
 #ifdef CONFIG_SPL_NAND_SUPPORT
-- 
2.14.3 (Apple Git-98)

