程序开始就启动代码 int __low_level_init(void) { unsigned long *jtagPwd = (unsigned long *)JTAG_DIS_PWD1; /* Feed the watchdog timer */ WDTCTL = WDTPW | WDTCNTCL; /* Check JTAG password locations and disable JTAG if passwords don't match. * Else the JTAG will be enabled in the 64th cycle after reset. */ if ((*jtagPwd != 0x00000000) && (*jtagPwd != 0xFFFFFFFF)) { /* Disable JTAG */ SYSJTAGDIS = JTAGDISKEY; } /* Calibration section * Check for the BORIFG flag in IFG1. Execute calibration if this was a BORIFG. * Else skip calibration */ if (IFG1 & BORIFG) { // Perform 2's complement checksum on 62 bytes of TLV data unsigned int checksum = 0; unsigned char *TLV_address_for_parse = ((unsigned char *)TLV_START); unsigned int *TLV_address_for_checksum = ((unsigned int *)TLV_START + 1); do { checksum ^= *TLV_address_for_checksum++; } while (TLV_address_for_checksum <= (unsigned int *)TLV_END); checksum ^= 0xFFFF; checksum++; // If check sum is not correct go to LPM4 if (*((unsigned int *)TLV_START) != checksum) { // Enter LPM4 if checksum failed __bis_SR_register(LPM4_bits); } // Check sum matched, now set calibration values //Calibrate REF REFCAL1 = *(TLV_address_for_parse + TLV_CAL_REFCAL1); REFCAL0 = *(TLV_address_for_parse + TLV_CAL_REFCAL0); // Calibrate DCO CSIRFCAL = *(TLV_address_for_parse + TLV_CAL_CSIRFCAL); CSIRTCAL = *(TLV_address_for_parse + TLV_CAL_CSIRTCAL); CSERFCAL = *(TLV_address_for_parse + TLV_CAL_CSERFCAL); CSERTCAL = *(TLV_address_for_parse + TLV_CAL_CSERTCAL); // Calibrate SD24 SD24TRIM = *(TLV_address_for_parse + TLV_CAL_SD24TRIM); // Clear BORIFG IFG1 &= ~(BORIFG); } /* Feed the watchdog timer */ WDTCTL = WDTPW | WDTCNTCL; /* Return value: * 1 - Perform data segment initialization. * 0 - Skip data segment initialization. */ return 1; } 主程序 void main(void) { static int adjustState=0; u8 temp; _DINT(); _NOP(); WDTCTL = WDTPW | WDTHOLD;// 关毕内部看门狗 CSCTL1 = DIVS__4 + DIVM__4; // MCLK=SMCLK=4096K FCTL2 = FWKEY | FSSEL_1 |FN2 |FN3; // FN1 | FN3 |FN5; // MCLK/12 for Flash Timing Generator 257k~476K // FCTL2 = FWKEY | FSSEL_1 |FN1 | FN3 |FN5; // MCLK/42 for Flash Timing Generator 257k~476K WDTCTL=WDT_ARST_1000; Init_TimerA0(); InitTimeA1Pwm(); InitCfg(); //组态参数的初始化 Init_ADI(); //AD初始化 Init_485(); //UART初始化 _EINT(); while(1) { if(needRset==0) WDTCTL=WDT_ARST_1000; if((needInitAd==1)&&(CommSending()==0)) { needInitAd=0; _DINT(); Init_ADI(); //AD初始化 _EINT(); } if(GetBeChanged()==YES) { DealData(0); } temp = GetKeyCode(); if(temp == KEY_SETUP_QQ) { SetRange(1); adjustState = SET_RANGE1; } else if(temp == KEY_SETDOWN_QQ) { SetRange(0); adjustState = SET_RANGE1; } else if(temp ==KEY_SETUP) { if((adjustState == SET_RANGE1)||(adjustState == SET_RANGE2)) { SetFineOut(adjustState,-1); } } else if(temp ==KEY_SETDOWN) { if((adjustState == SET_RANGE1)||(adjustState == SET_RANGE2)) { SetFineOut(adjustState,1); } } else if(temp ==KEY_DOUBLE) { adjustState = SET_RANGE2; } else if(temp ==KEY_DOUBLE_QQ) { ResetFine(); adjustState=0; } else if(GetNullKey()==1) { adjustState=0; } } }