****************************************************************************** MSP430 Linker PC v20.2.0 ****************************************************************************** >> Linked Fri Apr 10 10:19:54 2020 OUTPUT FILE NAME: ENTRY POINT SYMBOL: "_c_int00_noargs" address: 00003100 MEMORY CONFIGURATION name origin length used unused attr fill ---------------------- -------- --------- -------- -------- ---- -------- SFR 00000000 00000010 00000000 00000010 RWIX PERIPHERALS_8BIT 00000010 000000f0 00000000 000000f0 RWIX PERIPHERALS_16BIT 00000100 00000100 00000000 00000100 RWIX INFOD 00001000 00000040 00000000 00000040 RWIX INFOC 00001040 00000040 00000000 00000040 RWIX INFOB 00001080 00000040 00000000 00000040 RWIX INFOA 000010c0 00000040 00000000 00000040 RWIX RAM 00001100 00002000 00000051 00001faf RWIX FLASH 00003100 0000cebe 00000036 0000ce88 RWIX BSLSIGNATURE 0000ffbe 00000002 00000002 00000000 RWIX ffff INT00 0000ffc0 00000002 00000002 00000000 RWIX INT01 0000ffc2 00000002 00000002 00000000 RWIX INT02 0000ffc4 00000002 00000002 00000000 RWIX INT03 0000ffc6 00000002 00000002 00000000 RWIX INT04 0000ffc8 00000002 00000002 00000000 RWIX INT05 0000ffca 00000002 00000002 00000000 RWIX INT06 0000ffcc 00000002 00000002 00000000 RWIX INT07 0000ffce 00000002 00000002 00000000 RWIX INT08 0000ffd0 00000002 00000002 00000000 RWIX INT09 0000ffd2 00000002 00000002 00000000 RWIX INT10 0000ffd4 00000002 00000002 00000000 RWIX INT11 0000ffd6 00000002 00000002 00000000 RWIX INT12 0000ffd8 00000002 00000002 00000000 RWIX INT13 0000ffda 00000002 00000002 00000000 RWIX INT14 0000ffdc 00000002 00000002 00000000 RWIX INT15 0000ffde 00000002 00000002 00000000 RWIX INT16 0000ffe0 00000002 00000002 00000000 RWIX INT17 0000ffe2 00000002 00000002 00000000 RWIX INT18 0000ffe4 00000002 00000002 00000000 RWIX INT19 0000ffe6 00000002 00000002 00000000 RWIX INT20 0000ffe8 00000002 00000002 00000000 RWIX INT21 0000ffea 00000002 00000002 00000000 RWIX INT22 0000ffec 00000002 00000002 00000000 RWIX INT23 0000ffee 00000002 00000002 00000000 RWIX INT24 0000fff0 00000002 00000002 00000000 RWIX INT25 0000fff2 00000002 00000002 00000000 RWIX INT26 0000fff4 00000002 00000002 00000000 RWIX INT27 0000fff6 00000002 00000002 00000000 RWIX INT28 0000fff8 00000002 00000002 00000000 RWIX INT29 0000fffa 00000002 00000002 00000000 RWIX INT30 0000fffc 00000002 00000002 00000000 RWIX RESET 0000fffe 00000002 00000002 00000000 RWIX FLASH2 00010000 00010000 00000148 0000feb8 RWIX SECTION ALLOCATION MAP output attributes/ section page origin length input sections -------- ---- ---------- ---------- ---------------- .bss 0 00001100 00000001 UNINITIALIZED 00001100 00000001 (.common:value) .stack 0 000030b0 00000050 UNINITIALIZED 000030b0 00000004 rts430x_lc_rd_eabi.lib : boot.c.obj (.stack) 000030b4 0000004c --HOLE-- .text:_isr * 0 00003100 00000024 00003100 0000001c rts430x_lc_rd_eabi.lib : boot.c.obj (.text:_isr:_c_int00_noargs) 0000311c 00000008 : isr_trap.asm.obj (.text:_isr:__TI_ISR_TRAP) .cinit 0 00003124 00000012 00003124 00000006 (.cinit..bss.load) [load image, compression = zero_init] 0000312a 00000004 (__TI_handler_table) 0000312e 00000008 (__TI_cinit_table) .binit 0 00003100 00000000 .init_array * 0 00003100 00000000 UNINITIALIZED $fill000 0 0000ffbe 00000002 0000ffbe 00000002 --HOLE-- [fill = ffff] RESERVED0 * 0 0000ffc0 00000002 0000ffc0 00000002 rts430x_lc_rd_eabi.lib : int00.asm.obj (.int00) RESERVED1 * 0 0000ffc2 00000002 0000ffc2 00000002 rts430x_lc_rd_eabi.lib : int01.asm.obj (.int01) RESERVED2 * 0 0000ffc4 00000002 0000ffc4 00000002 rts430x_lc_rd_eabi.lib : int02.asm.obj (.int02) RESERVED3 * 0 0000ffc6 00000002 0000ffc6 00000002 rts430x_lc_rd_eabi.lib : int03.asm.obj (.int03) RESERVED4 * 0 0000ffc8 00000002 0000ffc8 00000002 rts430x_lc_rd_eabi.lib : int04.asm.obj (.int04) RESERVED5 * 0 0000ffca 00000002 0000ffca 00000002 rts430x_lc_rd_eabi.lib : int05.asm.obj (.int05) RESERVED6 * 0 0000ffcc 00000002 0000ffcc 00000002 rts430x_lc_rd_eabi.lib : int06.asm.obj (.int06) RESERVED7 * 0 0000ffce 00000002 0000ffce 00000002 rts430x_lc_rd_eabi.lib : int07.asm.obj (.int07) RESERVED8 * 0 0000ffd0 00000002 0000ffd0 00000002 rts430x_lc_rd_eabi.lib : int08.asm.obj (.int08) RESERVED9 * 0 0000ffd2 00000002 0000ffd2 00000002 rts430x_lc_rd_eabi.lib : int09.asm.obj (.int09) RESERVED10 * 0 0000ffd4 00000002 0000ffd4 00000002 rts430x_lc_rd_eabi.lib : int10.asm.obj (.int10) RESERVED11 * 0 0000ffd6 00000002 0000ffd6 00000002 rts430x_lc_rd_eabi.lib : int11.asm.obj (.int11) RESERVED12 * 0 0000ffd8 00000002 0000ffd8 00000002 rts430x_lc_rd_eabi.lib : int12.asm.obj (.int12) RESERVED13 * 0 0000ffda 00000002 0000ffda 00000002 rts430x_lc_rd_eabi.lib : int13.asm.obj (.int13) DAC12 0 0000ffdc 00000002 0000ffdc 00000002 rts430x_lc_rd_eabi.lib : int14.asm.obj (.int14) DMA 0 0000ffde 00000002 0000ffde 00000002 rts430x_lc_rd_eabi.lib : int15.asm.obj (.int15) USCIAB1TX * 0 0000ffe0 00000002 0000ffe0 00000002 rts430x_lc_rd_eabi.lib : int16.asm.obj (.int16) USCIAB1RX * 0 0000ffe2 00000002 0000ffe2 00000002 rts430x_lc_rd_eabi.lib : int17.asm.obj (.int17) PORT1 0 0000ffe4 00000002 0000ffe4 00000002 rts430x_lc_rd_eabi.lib : int18.asm.obj (.int18) PORT2 0 0000ffe6 00000002 0000ffe6 00000002 rts430x_lc_rd_eabi.lib : int19.asm.obj (.int19) RESERVED20 * 0 0000ffe8 00000002 0000ffe8 00000002 rts430x_lc_rd_eabi.lib : int20.asm.obj (.int20) ADC12 0 0000ffea 00000002 0000ffea 00000002 rts430x_lc_rd_eabi.lib : int21.asm.obj (.int21) USCIAB0TX * 0 0000ffec 00000002 0000ffec 00000002 rts430x_lc_rd_eabi.lib : int22.asm.obj (.int22) USCIAB0RX * 0 0000ffee 00000002 0000ffee 00000002 rts430x_lc_rd_eabi.lib : int23.asm.obj (.int23) TIMERA1 0 0000fff0 00000002 0000fff0 00000002 rts430x_lc_rd_eabi.lib : int24.asm.obj (.int24) TIMERA0 0 0000fff2 00000002 0000fff2 00000002 rts430x_lc_rd_eabi.lib : int25.asm.obj (.int25) WDT 0 0000fff4 00000002 0000fff4 00000002 rts430x_lc_rd_eabi.lib : int26.asm.obj (.int26) COMPARATORA * 0 0000fff6 00000002 0000fff6 00000002 rts430x_lc_rd_eabi.lib : int27.asm.obj (.int27) TIMERB1 0 0000fff8 00000002 0000fff8 00000002 rts430x_lc_rd_eabi.lib : int28.asm.obj (.int28) TIMERB0 0 0000fffa 00000002 0000fffa 00000002 rts430x_lc_rd_eabi.lib : int29.asm.obj (.int29) NMI 0 0000fffc 00000002 0000fffc 00000002 rts430x_lc_rd_eabi.lib : int30.asm.obj (.int30) .reset 0 0000fffe 00000002 0000fffe 00000002 rts430x_lc_rd_eabi.lib : boot.c.obj (.reset) .text 0 00010000 00000148 00010000 00000054 rts430x_lc_rd_eabi.lib : autoinit.c.obj (.text:__TI_auto_init_nobinit_nopinit_hold_wdt:__TI_auto_init_nobinit_nopinit_hold_wdt) 00010054 00000044 main.obj (.text:copy_C2D) 00010098 00000040 main.obj (.text:main) 000100d8 00000040 main.obj (.text:write_SegC) 00010118 00000024 rts430x_lc_rd_eabi.lib : copy_zero_init.c.obj (.text:decompress:ZI:__TI_zero_init_nomemset:__TI_zero_init_nomemset) 0001013c 00000006 : exit.c.obj (.text:abort) 00010142 00000004 : pre_init.c.obj (.text:_system_pre_init) 00010146 00000002 : startup.c.obj (.text:_system_post_cinit) MODULE SUMMARY Module code ro data rw data ------ ---- ------- ------- .\ main.obj 196 0 1 +--+----------------------+------+---------+---------+ Total: 196 0 1 C:\ti\ccs1000\ccs\tools\compiler\ti-cgt-msp430_20.2.0.LTS\lib\rts430x_lc_rd_eabi.lib autoinit.c.obj 84 0 0 copy_zero_init.c.obj 36 0 0 boot.c.obj 28 2 0 isr_trap.asm.obj 8 0 0 exit.c.obj 6 0 0 pre_init.c.obj 4 0 0 int00.asm.obj 0 2 0 int01.asm.obj 0 2 0 int02.asm.obj 0 2 0 int03.asm.obj 0 2 0 int04.asm.obj 0 2 0 int05.asm.obj 0 2 0 int06.asm.obj 0 2 0 int07.asm.obj 0 2 0 int08.asm.obj 0 2 0 int09.asm.obj 0 2 0 int10.asm.obj 0 2 0 int11.asm.obj 0 2 0 int12.asm.obj 0 2 0 int13.asm.obj 0 2 0 int14.asm.obj 0 2 0 int15.asm.obj 0 2 0 int16.asm.obj 0 2 0 int17.asm.obj 0 2 0 int18.asm.obj 0 2 0 int19.asm.obj 0 2 0 int20.asm.obj 0 2 0 int21.asm.obj 0 2 0 int22.asm.obj 0 2 0 int23.asm.obj 0 2 0 int24.asm.obj 0 2 0 int25.asm.obj 0 2 0 int26.asm.obj 0 2 0 int27.asm.obj 0 2 0 int28.asm.obj 0 2 0 int29.asm.obj 0 2 0 int30.asm.obj 0 2 0 startup.c.obj 2 0 0 +--+----------------------+------+---------+---------+ Total: 168 64 0 Stack: 0 0 80 Linker Generated: 0 18 0 +--+----------------------+------+---------+---------+ Grand Total: 364 82 81 LINKER GENERATED COPY TABLES __TI_cinit_table @ 0000312e records: 1, size/record: 8, table size: 8 .bss: load addr=00003124, load size=00000006 bytes, run addr=00001100, run size=00000001 bytes, compression=zero_init LINKER GENERATED HANDLER TABLE __TI_handler_table @ 0000312a records: 1, size/record: 4, table size: 4 index: 0, handler: __TI_zero_init GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name address name ------- ---- 000001a0 ADC12CTL0 000001a2 ADC12CTL1 000001a6 ADC12IE 000001a4 ADC12IFG 000001a8 ADC12IV 00000080 ADC12MCTL0 00000081 ADC12MCTL1 0000008a ADC12MCTL10 0000008b ADC12MCTL11 0000008c ADC12MCTL12 0000008d ADC12MCTL13 0000008e ADC12MCTL14 0000008f ADC12MCTL15 00000082 ADC12MCTL2 00000083 ADC12MCTL3 00000084 ADC12MCTL4 00000085 ADC12MCTL5 00000086 ADC12MCTL6 00000087 ADC12MCTL7 00000088 ADC12MCTL8 00000089 ADC12MCTL9 00000140 ADC12MEM0 00000142 ADC12MEM1 00000154 ADC12MEM10 00000156 ADC12MEM11 00000158 ADC12MEM12 0000015a ADC12MEM13 0000015c ADC12MEM14 0000015e ADC12MEM15 00000144 ADC12MEM2 00000146 ADC12MEM3 00000148 ADC12MEM4 0000014a ADC12MEM5 0000014c ADC12MEM6 0000014e ADC12MEM7 00000150 ADC12MEM8 00000152 ADC12MEM9 00000057 BCSCTL1 00000058 BCSCTL2 00000053 BCSCTL3 0001013c C$$EXIT 00000059 CACTL1 0000005a CACTL2 000010fb CALBC1_12MHZ 000010f9 CALBC1_16MHZ 000010ff CALBC1_1MHZ 000010fd CALBC1_8MHZ 000010fa CALDCO_12MHZ 000010f8 CALDCO_16MHZ 000010fe CALDCO_1MHZ 000010fc CALDCO_8MHZ 0000005b CAPD 000001c0 DAC12_0CTL 000001c8 DAC12_0DAT 000001c2 DAC12_1CTL 000001ca DAC12_1DAT 00000056 DCOCTL 000001d0 DMA0CTL 000001d6 DMA0DA 000001d6 DMA0DAL 000001d2 DMA0SA 000001d2 DMA0SAL 000001da DMA0SZ 000001dc DMA1CTL 000001e2 DMA1DA 000001e2 DMA1DAL 000001de DMA1SA 000001de DMA1SAL 000001e6 DMA1SZ 000001e8 DMA2CTL 000001ee DMA2DA 000001ee DMA2DAL 000001ea DMA2SA 000001ea DMA2SAL 000001f2 DMA2SZ 00000122 DMACTL0 00000124 DMACTL1 00000126 DMAIV 00000128 FCTL1 0000012a FCTL2 0000012c FCTL3 000001be FCTL4 00000000 IE1 00000001 IE2 00000002 IFG1 00000003 IFG2 00000134 MAC 00000136 MACS 00000130 MPY 00000132 MPYS 00000138 OP2 00000022 P1DIR 00000025 P1IE 00000024 P1IES 00000023 P1IFG 00000020 P1IN 00000021 P1OUT 00000027 P1REN 00000026 P1SEL 0000002a P2DIR 0000002d P2IE 0000002c P2IES 0000002b P2IFG 00000028 P2IN 00000029 P2OUT 0000002f P2REN 0000002e P2SEL 0000001a P3DIR 00000018 P3IN 00000019 P3OUT 00000010 P3REN 0000001b P3SEL 0000001e P4DIR 0000001c P4IN 0000001d P4OUT 00000011 P4REN 0000001f P4SEL 00000032 P5DIR 00000030 P5IN 00000031 P5OUT 00000012 P5REN 00000033 P5SEL 00000036 P6DIR 00000034 P6IN 00000035 P6OUT 00000013 P6REN 00000037 P6SEL 0000003c P7DIR 00000038 P7IN 0000003a P7OUT 00000014 P7REN 0000003e P7SEL 0000003d P8DIR 00000039 P8IN 0000003b P8OUT 00000015 P8REN 0000003f P8SEL 0000003c PADIR 00000038 PAIN 0000003a PAOUT 00000014 PAREN 0000003e PASEL 0000013c RESHI 0000013a RESLO 0000013e SUMEXT 00000055 SVSCTL 00000172 TACCR0 00000174 TACCR1 00000176 TACCR2 00000162 TACCTL0 00000164 TACCTL1 00000166 TACCTL2 00000160 TACTL 0000012e TAIV 00000170 TAR 00000192 TBCCR0 00000194 TBCCR1 00000196 TBCCR2 00000198 TBCCR3 0000019a TBCCR4 0000019c TBCCR5 0000019e TBCCR6 00000182 TBCCTL0 00000184 TBCCTL1 00000186 TBCCTL2 00000188 TBCCTL3 0000018a TBCCTL4 0000018c TBCCTL5 0000018e TBCCTL6 00000180 TBCTL 0000011e TBIV 00000190 TBR 000010db TLV_ADC12_1_LEN 000010da TLV_ADC12_1_TAG 000010c0 TLV_CHECKSUM 000010f7 TLV_DCO_30_LEN 000010f6 TLV_DCO_30_TAG 00000006 UC1IE 00000007 UC1IFG 0000005d UCA0ABCTL 00000062 UCA0BR0 00000063 UCA0BR1 00000060 UCA0CTL0 00000061 UCA0CTL1 0000005f UCA0IRRCTL 0000005e UCA0IRTCTL 00000064 UCA0MCTL 00000066 UCA0RXBUF 00000065 UCA0STAT 00000067 UCA0TXBUF 000000cd UCA1ABCTL 000000d2 UCA1BR0 000000d3 UCA1BR1 000000d0 UCA1CTL0 000000d1 UCA1CTL1 000000cf UCA1IRRCTL 000000ce UCA1IRTCTL 000000d4 UCA1MCTL 000000d6 UCA1RXBUF 000000d5 UCA1STAT 000000d7 UCA1TXBUF 0000006a UCB0BR0 0000006b UCB0BR1 00000068 UCB0CTL0 00000069 UCB0CTL1 0000006c UCB0I2CIE 00000118 UCB0I2COA 0000011a UCB0I2CSA 0000006e UCB0RXBUF 0000006d UCB0STAT 0000006f UCB0TXBUF 000000da UCB1BR0 000000db UCB1BR1 000000d8 UCB1CTL0 000000d9 UCB1CTL1 000000dc UCB1I2CIE 0000017c UCB1I2COA 0000017e UCB1I2CSA 000000de UCB1RXBUF 000000dd UCB1STAT 000000df UCB1TXBUF 00000120 WDTCTL 00003100 __STACK_END 00000050 __STACK_SIZE 0000312e __TI_CINIT_Base 00003136 __TI_CINIT_Limit 0000312a __TI_Handler_Table_Base 0000312e __TI_Handler_Table_Limit 0000311c __TI_ISR_TRAP 00010000 __TI_auto_init_nobinit_nopinit_hold_wdt 0000ffc0 __TI_int00 0000ffc2 __TI_int01 0000ffc4 __TI_int02 0000ffc6 __TI_int03 0000ffc8 __TI_int04 0000ffca __TI_int05 0000ffcc __TI_int06 0000ffce __TI_int07 0000ffd0 __TI_int08 0000ffd2 __TI_int09 0000ffd4 __TI_int10 0000ffd6 __TI_int11 0000ffd8 __TI_int12 0000ffda __TI_int13 0000ffdc __TI_int14 0000ffde __TI_int15 0000ffe0 __TI_int16 0000ffe2 __TI_int17 0000ffe4 __TI_int18 0000ffe6 __TI_int19 0000ffe8 __TI_int20 0000ffea __TI_int21 0000ffec __TI_int22 0000ffee __TI_int23 0000fff0 __TI_int24 0000fff2 __TI_int25 0000fff4 __TI_int26 0000fff6 __TI_int27 0000fff8 __TI_int28 0000fffa __TI_int29 0000fffc __TI_int30 ffffffff __TI_pprof_out_hndl ffffffff __TI_prof_data_size ffffffff __TI_prof_data_start 00010118 __TI_zero_init_nomemset ffffffff __c_args__ 00003100 _c_int00_noargs 0000fffe _reset_vector 000030b0 _stack 00010146 _system_post_cinit 00010142 _system_pre_init 0001013c abort 00010054 copy_C2D 00010098 main 00001100 value 000100d8 write_SegC GLOBAL SYMBOLS: SORTED BY Symbol Address address name ------- ---- 00000000 IE1 00000001 IE2 00000002 IFG1 00000003 IFG2 00000006 UC1IE 00000007 UC1IFG 00000010 P3REN 00000011 P4REN 00000012 P5REN 00000013 P6REN 00000014 P7REN 00000014 PAREN 00000015 P8REN 00000018 P3IN 00000019 P3OUT 0000001a P3DIR 0000001b P3SEL 0000001c P4IN 0000001d P4OUT 0000001e P4DIR 0000001f P4SEL 00000020 P1IN 00000021 P1OUT 00000022 P1DIR 00000023 P1IFG 00000024 P1IES 00000025 P1IE 00000026 P1SEL 00000027 P1REN 00000028 P2IN 00000029 P2OUT 0000002a P2DIR 0000002b P2IFG 0000002c P2IES 0000002d P2IE 0000002e P2SEL 0000002f P2REN 00000030 P5IN 00000031 P5OUT 00000032 P5DIR 00000033 P5SEL 00000034 P6IN 00000035 P6OUT 00000036 P6DIR 00000037 P6SEL 00000038 P7IN 00000038 PAIN 00000039 P8IN 0000003a P7OUT 0000003a PAOUT 0000003b P8OUT 0000003c P7DIR 0000003c PADIR 0000003d P8DIR 0000003e P7SEL 0000003e PASEL 0000003f P8SEL 00000050 __STACK_SIZE 00000053 BCSCTL3 00000055 SVSCTL 00000056 DCOCTL 00000057 BCSCTL1 00000058 BCSCTL2 00000059 CACTL1 0000005a CACTL2 0000005b CAPD 0000005d UCA0ABCTL 0000005e UCA0IRTCTL 0000005f UCA0IRRCTL 00000060 UCA0CTL0 00000061 UCA0CTL1 00000062 UCA0BR0 00000063 UCA0BR1 00000064 UCA0MCTL 00000065 UCA0STAT 00000066 UCA0RXBUF 00000067 UCA0TXBUF 00000068 UCB0CTL0 00000069 UCB0CTL1 0000006a UCB0BR0 0000006b UCB0BR1 0000006c UCB0I2CIE 0000006d UCB0STAT 0000006e UCB0RXBUF 0000006f UCB0TXBUF 00000080 ADC12MCTL0 00000081 ADC12MCTL1 00000082 ADC12MCTL2 00000083 ADC12MCTL3 00000084 ADC12MCTL4 00000085 ADC12MCTL5 00000086 ADC12MCTL6 00000087 ADC12MCTL7 00000088 ADC12MCTL8 00000089 ADC12MCTL9 0000008a ADC12MCTL10 0000008b ADC12MCTL11 0000008c ADC12MCTL12 0000008d ADC12MCTL13 0000008e ADC12MCTL14 0000008f ADC12MCTL15 000000cd UCA1ABCTL 000000ce UCA1IRTCTL 000000cf UCA1IRRCTL 000000d0 UCA1CTL0 000000d1 UCA1CTL1 000000d2 UCA1BR0 000000d3 UCA1BR1 000000d4 UCA1MCTL 000000d5 UCA1STAT 000000d6 UCA1RXBUF 000000d7 UCA1TXBUF 000000d8 UCB1CTL0 000000d9 UCB1CTL1 000000da UCB1BR0 000000db UCB1BR1 000000dc UCB1I2CIE 000000dd UCB1STAT 000000de UCB1RXBUF 000000df UCB1TXBUF 00000118 UCB0I2COA 0000011a UCB0I2CSA 0000011e TBIV 00000120 WDTCTL 00000122 DMACTL0 00000124 DMACTL1 00000126 DMAIV 00000128 FCTL1 0000012a FCTL2 0000012c FCTL3 0000012e TAIV 00000130 MPY 00000132 MPYS 00000134 MAC 00000136 MACS 00000138 OP2 0000013a RESLO 0000013c RESHI 0000013e SUMEXT 00000140 ADC12MEM0 00000142 ADC12MEM1 00000144 ADC12MEM2 00000146 ADC12MEM3 00000148 ADC12MEM4 0000014a ADC12MEM5 0000014c ADC12MEM6 0000014e ADC12MEM7 00000150 ADC12MEM8 00000152 ADC12MEM9 00000154 ADC12MEM10 00000156 ADC12MEM11 00000158 ADC12MEM12 0000015a ADC12MEM13 0000015c ADC12MEM14 0000015e ADC12MEM15 00000160 TACTL 00000162 TACCTL0 00000164 TACCTL1 00000166 TACCTL2 00000170 TAR 00000172 TACCR0 00000174 TACCR1 00000176 TACCR2 0000017c UCB1I2COA 0000017e UCB1I2CSA 00000180 TBCTL 00000182 TBCCTL0 00000184 TBCCTL1 00000186 TBCCTL2 00000188 TBCCTL3 0000018a TBCCTL4 0000018c TBCCTL5 0000018e TBCCTL6 00000190 TBR 00000192 TBCCR0 00000194 TBCCR1 00000196 TBCCR2 00000198 TBCCR3 0000019a TBCCR4 0000019c TBCCR5 0000019e TBCCR6 000001a0 ADC12CTL0 000001a2 ADC12CTL1 000001a4 ADC12IFG 000001a6 ADC12IE 000001a8 ADC12IV 000001be FCTL4 000001c0 DAC12_0CTL 000001c2 DAC12_1CTL 000001c8 DAC12_0DAT 000001ca DAC12_1DAT 000001d0 DMA0CTL 000001d2 DMA0SA 000001d2 DMA0SAL 000001d6 DMA0DA 000001d6 DMA0DAL 000001da DMA0SZ 000001dc DMA1CTL 000001de DMA1SA 000001de DMA1SAL 000001e2 DMA1DA 000001e2 DMA1DAL 000001e6 DMA1SZ 000001e8 DMA2CTL 000001ea DMA2SA 000001ea DMA2SAL 000001ee DMA2DA 000001ee DMA2DAL 000001f2 DMA2SZ 000010c0 TLV_CHECKSUM 000010da TLV_ADC12_1_TAG 000010db TLV_ADC12_1_LEN 000010f6 TLV_DCO_30_TAG 000010f7 TLV_DCO_30_LEN 000010f8 CALDCO_16MHZ 000010f9 CALBC1_16MHZ 000010fa CALDCO_12MHZ 000010fb CALBC1_12MHZ 000010fc CALDCO_8MHZ 000010fd CALBC1_8MHZ 000010fe CALDCO_1MHZ 000010ff CALBC1_1MHZ 00001100 value 000030b0 _stack 00003100 __STACK_END 00003100 _c_int00_noargs 0000311c __TI_ISR_TRAP 0000312a __TI_Handler_Table_Base 0000312e __TI_CINIT_Base 0000312e __TI_Handler_Table_Limit 00003136 __TI_CINIT_Limit 0000ffc0 __TI_int00 0000ffc2 __TI_int01 0000ffc4 __TI_int02 0000ffc6 __TI_int03 0000ffc8 __TI_int04 0000ffca __TI_int05 0000ffcc __TI_int06 0000ffce __TI_int07 0000ffd0 __TI_int08 0000ffd2 __TI_int09 0000ffd4 __TI_int10 0000ffd6 __TI_int11 0000ffd8 __TI_int12 0000ffda __TI_int13 0000ffdc __TI_int14 0000ffde __TI_int15 0000ffe0 __TI_int16 0000ffe2 __TI_int17 0000ffe4 __TI_int18 0000ffe6 __TI_int19 0000ffe8 __TI_int20 0000ffea __TI_int21 0000ffec __TI_int22 0000ffee __TI_int23 0000fff0 __TI_int24 0000fff2 __TI_int25 0000fff4 __TI_int26 0000fff6 __TI_int27 0000fff8 __TI_int28 0000fffa __TI_int29 0000fffc __TI_int30 0000fffe _reset_vector 00010000 __TI_auto_init_nobinit_nopinit_hold_wdt 00010054 copy_C2D 00010098 main 000100d8 write_SegC 00010118 __TI_zero_init_nomemset 0001013c C$$EXIT 0001013c abort 00010142 _system_pre_init 00010146 _system_post_cinit ffffffff __TI_pprof_out_hndl ffffffff __TI_prof_data_size ffffffff __TI_prof_data_start ffffffff __c_args__ [276 symbols]