MEMORY
{
PAGE 0 :
   /* BEGIN is used for the "boot to SARAM" bootloader mode   */

   /*
    0x80000 is also used as the boot address of the Bootloader.
    The address of APP BEGIN is also 0x80000 and the address of the program with bootloader is 0x86002
   */
   BEGIN            : origin = 0x080000, length = 0x000002
   RAMM0            : origin = 0x0000F5, length = 0x00030B

   RAMLS0           : origin = 0x008000, length = 0x000C00
   RAMLS3           : origin = 0x009800, length = 0x000800
   RAMLS4           : origin = 0x00A000, length = 0x002000
   RESET            : origin = 0x3FFFC0, length = 0x000002

/* Flash sectors */
   /* BANK 0 Bootloader Firmware*/
   //FLASH_BANK0_SEC0  : origin = 0x080002, length = 0x000FFE	/* on-chip Flash */
   //FLASH_BANK0_SEC1  : origin = 0x081000, length = 0x001000	/* on-chip Flash */
   //FLASH_BANK0_SEC2  : origin = 0x082000, length = 0x001000	/* on-chip Flash */
   //FLASH_BANK0_SEC3  : origin = 0x083000, length = 0x001000	/* on-chip Flash */
   //FLASH_BANK0_SEC4  : origin = 0x084000, length = 0x001000	/* on-chip Flash */
   //FLASH_BANK0_SEC5  : origin = 0x085000, length = 0x001000	/* on-chip Flash */

   //FLASH_BANK0_SEC6  : origin = 0x086000, length = 0x001000	/* on-chip Flash */
   //FLASH_BANK0_SEC7  : origin = 0x087000, length = 0x001000	/* on-chip Flash */
   //FLASH_BANK0_SEC8  : origin = 0x088000, length = 0x001000	/* on-chip Flash */
   //FLASH_BANK0_SEC9  : origin = 0x089000, length = 0x001000	/* on-chip Flash */
   //FLASH_BANK0_SEC10 : origin = 0x08A000, length = 0x001000	/* on-chip Flash */
   //FLASH_BANK0_SEC11 : origin = 0x08B000, length = 0x001000	/* on-chip Flash */
   //FLASH_BANK0_SEC12 : origin = 0x08C000, length = 0x001000	/* on-chip Flash */
   //FLASH_BANK0_SEC13 : origin = 0x08D000, length = 0x001000	/* on-chip Flash */

   FLASH_BANK0_SEC6_SEC613 : origin = 0x086002, length = 0x007FFE
   FLASH_BANK0_SEC14 : origin = 0x08E000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC15 : origin = 0x08F000, length = 0x001000	/* on-chip Flash */

   /* BANK 1 */
   FLASH_BANK1_SEC0  : origin = 0x090000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC1  : origin = 0x091000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC2  : origin = 0x092000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC3  : origin = 0x093000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC4  : origin = 0x094000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC5  : origin = 0x095000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC6  : origin = 0x096000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC7  : origin = 0x097000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC8  : origin = 0x098000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC9  : origin = 0x099000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC10 : origin = 0x09A000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC11 : origin = 0x09B000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC12 : origin = 0x09C000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC13 : origin = 0x09D000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC14 : origin = 0x09E000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC15 : origin = 0x09F000, length = 0x001000	/* on-chip Flash */

PAGE 1 :

   BOOT_RSVD        : origin = 0x000002, length = 0x0000F3     /* Part of M0, BOOT rom will use this for stack */
   RAMM1            : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */

   //RAMLS1           : origin = 0x008800, length = 0x000800
   RAMLS1           : origin = 0x008C00, length = 0x000400
   RAMLS2           : origin = 0x009000, length = 0x000800
   RAMLS5           : origin = 0x00A800, length = 0x000800
   RAMLS6           : origin = 0x00B000, length = 0x000800
   RAMLS7           : origin = 0x00B800, length = 0x000800

   RAMGS0           : origin = 0x00C000, length = 0x002000
   RAMGS1           : origin = 0x00E000, length = 0x002000
   RAMGS2           : origin = 0x010000, length = 0x002000
   RAMGS3           : origin = 0x012000, length = 0x002000

   CLA1_MSGRAMLOW   : origin = 0x001480, length = 0x000080
   CLA1_MSGRAMHIGH  : origin = 0x001500, length = 0x000080
}


SECTIONS
{
   .cinit           : > FLASH_BANK1_SEC0,     PAGE = 0, ALIGN(4)
   .text            : > FLASH_BANK0_SEC6_SEC613,   PAGE = 0, ALIGN(4)
   codestart        : > BEGIN       PAGE = 0, ALIGN(4)
   .stack           : > RAMM1        PAGE = 1
   .switch          : > FLASH_BANK1_SEC1,     PAGE = 0, ALIGN(4)

   .pinit           : > FLASH_BANK1_SEC4,       PAGE = 0,       ALIGN(4)
   .ebss            : >>RAMLS1 | RAMLS2 | RAMLS5 | RAMLS6 | RAMLS7 | RAMGS0 | RAMGS1 | RAMGS2 | RAMGS3 ,       PAGE = 1
   .esysmem         : > RAMLS6,       PAGE = 1
   .cio             : > RAMLS5,       PAGE = 1
   .econst          : > FLASH_BANK1_SEC5,    PAGE = 0, ALIGN(4)

   ramgs0           : > RAMGS0,    PAGE = 1
   ramgs1           : > RAMGS1,    PAGE = 1

   .reset           : > RESET,     PAGE = 0, TYPE = DSECT /* not used, */

    /* CLA specific sections */
    Cla1Prog        : LOAD = FLASH_BANK0_SEC14,
                      RUN = RAMLS0,
                      LOAD_START(_Cla1ProgLoadStart),
                      RUN_START(_Cla1ProgRunStart),
                      LOAD_SIZE(_Cla1ProgLoadSize),
                      PAGE = 0, ALIGN(4)

#if(1)
    SFRA_F32_Data    : > RAMLS5, ALIGN = 64, PAGE = 1
    FPUmathTables    : > FLASH_BANK1_SEC6,   PAGE =0
#endif

    Cla1ToCpuMsgRAM  : > CLA1_MSGRAMLOW,   PAGE = 1
    CpuToCla1MsgRAM  : > CLA1_MSGRAMHIGH,  PAGE = 1

   /* copy F021_API_F28004x_FPU32.lib to RAM, and RAMLS4 add to 0x2000kW  */
   GROUP{
      .TI.ramfunc
      {-l ../CSW_CODE/FlashDriverslib/lib/F021_API_F28004x_FPU32.lib}
   } LOAD = FLASH_BANK0_SEC15,
      RUN = RAMLS4,
      LOAD_START(_RamfuncsLoadStart),
      LOAD_SIZE(_RamfuncsLoadSize),
      LOAD_END(_RamfuncsLoadEnd),
      RUN_START(_RamfuncsRunStart),
      RUN_SIZE(_RamfuncsRunSize),
      RUN_END(_RamfuncsRunEnd),
      PAGE = 0, ALIGN(4)


   .scratchpad      : > RAMLS1,           PAGE = 1
   .bss_cla         : > RAMLS1,           PAGE = 1

   Cla1DataRam      : > RAMLS2,           PAGE = 1

   .const_cla      : LOAD = FLASH_BANK1_SEC7,
                      RUN = RAMLS3,
                      RUN_START(_Cla1ConstRunStart),
                      LOAD_START(_Cla1ConstLoadStart),
                      LOAD_SIZE(_Cla1ConstLoadSize),
                      PAGE = 0, ALIGN(4)
}

/*
//===========================================================================
// End of file.
//===========================================================================
*/