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HI
注意注意布局紧凑,功率环路尽量小,避免寄生参数。
(图很难看的,建议以测试来确认,但是布局的时候还是要注意前面提到的)
你好,你MOS的摆放的环路有些不合理,SW节点的覆铜过大,容易造成较大的ring,MOS的具体布局见附件
请移步:
http://www.deyisupport.com/question_answer/analog/power_management/f/24/t/131870.aspx
http://www.deyisupport.com/question_answer/analog/power_management/f/24/t/131870.aspx