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CEDE62005时钟芯片配置问题

 用的仿真器配置,具体的配置如下图。紫色线出来的是一个500MHz的时钟,然后分频需要100MHz、50MHz、125MHz,最后还需要给DSP6657的SRIO供156.25MHz,请问怎么分配呢?我看分频出不来。

还有官板上的62005是连了四路,SRIO /PCIE /DSPCORE /DSPDDR,请问那四路具体的时钟频率是多少呢?

谢谢各位了~