Hi, sir
I found the LVDS interface in the TIDA080000 display board design which has FPD0A~FPD0E+FPD1A~FPD1E and FPD0CLK, FPD1CLK, total 10 data links, and 2 clk links. But my system board only has 4 data links and 1 clk link, so how to support the LVDS of FPGA? Can I modify the FPGA SW config or just send a command to the FPGA?
Thanks
Br
Zhang Tao