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28377D在仿真模式下OK,在FLASH起动不了,烧写起慢,急!急!

Other Parts Discussed in Thread: CONTROLSUITE

这个问题差不多三个星期了一直没有找到原因,望指导!急!

1、首先证明硬件: 烧了一个简单例程到FLASH,然后断电来回起动都OK。

2、在原程序上增加程序内容后,程序会莫明跳到:interrupt void ILLEGAL_ISR(void)这个函数,后来我改了CMD,然后在仿真模式下运行OK。

3、断电起动,程序没有反映,起动不了,在程序初始化增加LED测试,发现仿真情况可以,断电依然起动不了;代码如下:

void main(void)

{

#ifdef _FLASH

   memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (Uint32)&RamfuncsLoadSize);

#endif

   InitSysCtrl();

#ifdef _FLASH

   InitFlash();   // Call the flash wrapper init function

#endif //(FLASH)

//IO配置

     GPIO_SetupPinOptions(84, GPIO_OUTPUT, GPIO_PUSHPULL);

     GPIO_SetupPinMux(84, GPIO_MUX_CPU1, 0);

     GPIO_SetupPinOptions(27, GPIO_OUTPUT, GPIO_PUSHPULL);

     GPIO_SetupPinMux(27, GPIO_MUX_CPU1, 0);

 

     for(;;) //infinite loop

     {

         GPIO_TogglePin(84);//1

         DELAY_US(50000);

         GPIO_TogglePin(84);//0

         GPIO_TogglePin(27);//1

         DELAY_US(50000);

     }

4、另外一个问题,28377D烧到FLASH很慢,测了一下,大约需要两分多钟。实在受不了

 

  • 你加载的代码是不是有问题 感觉程序跑飞了
    看看是否有溢出 等 还有堆栈等设置大一些试试
  • 堆栈设大一些我都设大了。我是加载到RAM运行点灯程序的,还是不行。
    // TI File $Revision:
    // Checkin $Date:
    //###########################################################################
    //
    // FILE: C28M35n_28x_RAM_lnk.cmd
    //
    // TITLE: Linker Command File For 28M35n examples that run out of RAM
    //
    // This ONLY includes all SARAM blocks on the 28M35n device.
    // This does not include flash or OTP.
    //
    // Keep in mind that L0 and L1 are protected by the code
    // security module.
    //
    // What this means is in most cases you will want to move to
    // another memory map file which has more memory defined.
    //
    //###########################################################################
    // $TI Release: $
    // $Release Date: $
    //###########################################################################

    /* ======================================================
    // In addition to this memory linker command file,
    // add the header linker command file directly to the project.
    // The header linker command file is required to link the
    // peripheral structures to the proper locations within
    // the memory map.
    //
    // The header linker files are found in <base>\28M35x_headers\cmd
    //
    // For BIOS applications add: F2837x_Headers_BIOS.cmd
    // For nonBIOS applications add: F2837x_Headers_nonBIOS.cmd
    ========================================================= */



    /* Define the memory block start/length for the 28M35n
    PAGE 0 will be used to organize program sections
    PAGE 1 will be used to organize data sections

    Notes:
    Memory blocks on F2837x are uniform (ie same
    physical memory) in both PAGE 0 and PAGE 1.
    That is the same memory region should not be
    defined for both PAGE 0 and PAGE 1.
    Doing so will result in corruption of program
    and/or data.

    L0 block is mirrored - that is it
    can be accessed in high memory or low memory.
    For simplicity only one instance is used in this
    linker file.

    Contiguous SARAM memory blocks can be combined
    if required to create a larger memory block.
    */

    MEMORY
    {
    PAGE 0 :
    /* BEGIN is used for the "boot to SARAM" bootloader mode */

    BEGIN : origin = 0x080000, length = 0x000002
    RAMLS0LS1 : origin = 0x008000, length = 0x001800
    /* RAMLS2 : origin = 0x009000, length = 0x000800*/
    RESET : origin = 0x3FFFC0, length = 0x000002
    IQTABLES : origin = 0x3FE000, length = 0x000B50 /* IQ Math Tables in Boot ROM */
    IQTABLES2 : origin = 0x3FEB50, length = 0x00008C /* IQ Math Tables in Boot ROM */
    IQTABLES3 : origin = 0x3FEBDC, length = 0x0000AA /* IQ Math Tables in Boot ROM */

    FLASHN : origin = 0x80002, length = 0x001FFD /* on-chip FLASH */
    FLASHML : origin = 0x82000, length = 0x008000 /* on-chip FLASH */
    /*FLASHL : origin = 0x84000, length = 0x002000*/ /* on-chip FLASH */
    /* FLASHK : origin = 0x86000, length = 0x002000*/ /* on-chip FLASH */
    /*FLASHJ : origin = 0x88000, length = 0x008000 */ /* FLASHJ on-chip FLASH */

    FLASHI : origin = 0x90000, length = 0x008000 /* on-chip FLASH */
    FLASHH : origin = 0x98000, length = 0x008000 /* on-chip FLASH */
    FLASHG : origin = 0xA0000, length = 0x008000 /* on-chip FLASH */
    FLASHF : origin = 0xA8000, length = 0x008000 /* on-chip FLASH */
    FLASHE : origin = 0xB0000, length = 0x008000 /* on-chip FLASH */
    FLASHD : origin = 0xB8000, length = 0x002000 /* on-chip FLASH */
    FLASHC : origin = 0xBA000, length = 0x002000 /* on-chip FLASH */
    FLASHB : origin = 0xBC000, length = 0x002000 /* on-chip FLASH */

    FLASHN1 : origin = 0xC0000, length = 0x002000 /* on-chip FLASH */
    FLASHM1 : origin = 0xC2000, length = 0x002000 /* on-chip FLASH */
    FLASHL1 : origin = 0xC4000, length = 0x002000 /* on-chip FLASH */
    FLASHK1 : origin = 0xC6000, length = 0x002000 /* on-chip FLASH */
    FLASHJ1 : origin = 0xC8000, length = 0x008000 /* on-chip FLASH */
    FLASHI1 : origin = 0xD0000, length = 0x008000 /* on-chip FLASH */
    FLASHH1 : origin = 0xD8000, length = 0x008000 /* on-chip FLASH */
    FLASHG1 : origin = 0xE0000, length = 0x008000 /* on-chip FLASH */
    FLASHF1 : origin = 0xE8000, length = 0x008000 /* on-chip FLASH */
    FLASHE1 : origin = 0xF0000, length = 0x008000 /* on-chip FLASH */
    FLASHD1 : origin = 0xF8000, length = 0x002000 /* on-chip FLASH */
    FLASHC1 : origin = 0xFA000, length = 0x002000 /* on-chip FLASH */
    FLASHB1 : origin = 0xFC000, length = 0x002000 /* on-chip FLASH */
    FLASHA1 : origin = 0xFE000, length = 0x002000 /* on-chip FLASH */



    BOOTROM : origin = 0x3FF27C, length = 0x000D44


    PAGE 1 :

    RAMM0 : origin = 0x000004, length = 0x000250
    RAMM1 : origin = 0x000400, length = 0x000250 /* on-chip RAM block M1 */
    RAMD0 : origin = 0x00B000, length = 0x000250
    RAMD1 : origin = 0x00B800, length = 0x000250

    /* RAMLS3 : origin = 0x009800, length = 0x000800*/
    RAMLS4LS5 : origin = 0x009800, length = 0x001800


    RAMGS0GS1 : origin = 0x00C000, length = 0x003000
    RAMGS3 : origin = 0x00F000, length = 0x000500
    RAMGS4 : origin = 0x010000, length = 0x000500
    RAMGS5 : origin = 0x011000, length = 0x000500
    RAMGS6 : origin = 0x012000, length = 0x000500
    RAMGS7 : origin = 0x013000, length = 0x000500
    RAMGS8 : origin = 0x014000, length = 0x000500
    RAMGS9 : origin = 0x015000, length = 0x000500
    RAMGS10 : origin = 0x016000, length = 0x000500
    RAMGS11 : origin = 0x017000, length = 0x000500
    RAMGS12 : origin = 0x018000, length = 0x000500
    RAMGS13 : origin = 0x019000, length = 0x000500
    RAMGS14 : origin = 0x01A000, length = 0x000500
    RAMGS15 : origin = 0x01B000, length = 0x000500

    FLASHA : origin = 0xBE000, length = 0x002000 /* on-chip FLASH */

    }


    SECTIONS
    {
    /* Setup for "boot to SARAM" mode:
    The codestart section (found in DSP28_CodeStartBranch.asm)
    re-directs execution to the start of user code. */
    codestart : > BEGIN, PAGE = 0
    ramfuncs : LOAD = FLASHML,
    RUN = RAMLS0LS1,
    LOAD_START(_RamfuncsLoadStart),
    LOAD_SIZE(_RamfuncsLoadSize),
    LOAD_END(_RamfuncsLoadEnd),
    RUN_START(_RamfuncsRunStart),
    PAGE = 0
    .text : > FLASHML, PAGE = 0
    .cinit : > FLASHN|FLASHML, PAGE = 0
    .pinit : > FLASHN, PAGE = 0
    .switch : > FLASHML, PAGE = 0
    .reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */

    .stack : > RAMLS4LS5, PAGE = 1
    .ebss : > RAMGS0GS1, PAGE = 1
    .econst : > FLASHML, PAGE = 0
    .esysmem : > RAMGS0GS1, PAGE = 1



    //IQmath : > RAML0, PAGE = 0
    //IQmathTables : > IQTABLES, PAGE = 0, TYPE = NOLOAD

    /* Uncomment the section below if calling the IQNexp() or IQexp()
    functions from the IQMath.lib library in order to utilize the
    relevant IQ Math table in Boot ROM (This saves space and Boot ROM
    is 1 wait-state). If this section is not uncommented, IQmathTables2
    will be loaded into other memory (SARAM, Flash, etc.) and will take
    up space, but 0 wait-state is possible.
    */
    /*
    IQmathTables2 : > IQTABLES2, PAGE = 0, TYPE = NOLOAD
    {

    IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)

    }
    */
    /* Uncomment the section below if calling the IQNasin() or IQasin()
    functions from the IQMath.lib library in order to utilize the
    relevant IQ Math table in Boot ROM (This saves space and Boot ROM
    is 1 wait-state). If this section is not uncommented, IQmathTables2
    will be loaded into other memory (SARAM, Flash, etc.) and will take
    up space, but 0 wait-state is possible.
    */
    /*
    IQmathTables3 : > IQTABLES3, PAGE = 0, TYPE = NOLOAD
    {

    IQmath.lib<IQNasinTable.obj> (IQmathTablesRam)

    }
    */

    }

    /*
    //===========================================================================
    // End of file.
    //===========================================================================
    */
  • 请问板子是ti的还是自己设计的呢?
    建议对照下datasheet中device boot mode设置,在6.10章节。
    另外请尝试使用TI的例程进行修改代码测试。
  • 板子确定没有什么问题。

    1、我用例程:\controlSUITE\development_kits\TMDSIDDK_v2.0\IDDK_PM_Servo_F2837x_v2_00_00_00 在FLSH与RAM模式没有任何问题。

    2、在这个程序的基础上,加入ECAT代码(较多),在RAM模式下,没有任何问题,在FLASH起动,起动不了。

    3、查找原因,带仿真模下,FLASH起动,奇怪的是:带仿真模式下进入后第一次才会进入interrupt void ILLEGAL_ISR(void) 。我复位MCU复位后,后面起动运行都OK。

    4、重烧FLASH,带仿真模下,单步,在程序中发现一段:   

            LocalAxes[AxisCnt].ObjDic = (TOBJECT *) ALLOCMEM(SIZEOF(DefCiA402AxisObjDic));
            HMEMCPY(LocalAxes[AxisCnt].ObjDic,&DefCiA402AxisObjDic,SIZEOF(DefCiA402AxisObjDic));

           是原因所在,(这段代码是申请内存空间与堆栈,可能是不够用)然后,我加大了   .stack .ebss   .econst    .esysmem   又发现,DELAY_US(500)这个函数会导致进入interrupt void ILLEGAL_ISR(void)

    5、反复修改CMD,就是这个两个问题,导致总是进入interrupt void ILLEGAL_ISR(void)。

       希望高手指教,谢了!

     
       

  • 请问您的DELAY_US函数有copy到ram运行吗?
    正如:\controlSUITE\development_kits\TMDSIDDK_v2.0\IDDK_PM_Servo_F2837x_v2_00_00_00 例程使用IDDK_Servo_2837x_FLASH_lnk_cpu1.cmd文件时对DELAY_US的操作。
  • 公司用TI产品与DSP用量现在都较少,有问题只能自己解决,不能象在广数那样,可以有TI技术支持上门帮助!

    回复一下拖了我三个星期都没解决的问题,解决的办法相当粗暴。

    其实问题相当简单,controlSUITE的CMD文件只针对他的例程是没有问题的,但如果你加了相当多的程序,他的就不能用啦。

    CMD文件里RAM空间都是分段的,以前我没有碰到过这样的情况,但在28377D里,分段存在问题(TI的工程师需要现象找我,哈哈)。解决办法,所有RAM空间定义在一个连续段里,就OK了。当然,要把RMA空间设大,比如:RAMGS0~GS6;28377D有足够的空间!

    问题解决了,可以好好睡上一觉!