28335的SCI通信双口接收怎么使数据同步

请问SCI的A口与B口同时接收    该怎么使接收的数据同步处理后送到C口发出去

2 个回复

  • 串行控制器 同步只能借助fifo等 结合串行通信协议进行接收 解析 处理 传输

    TI的忠诚粉丝!

  • 回复 mangui zhang:

    您好,感谢回答!在不要求同步的情况下A与B先后接收数据,都使用的是中断的方式,结果只有A接收正常,B接收到乱码,我把SCI模块的配置代码贴出来,麻烦您看看,是哪里的问题,感谢!
    #include "DSP28x_Project.h" // Device Headerfile and Examples Include File
    #include "SCI.h"

    char SCIA_RX_BUF[SCIA_MAX_RECV_LEN];
    char SCIB_RX_BUF[SCIB_MAX_RECV_LEN];
    char SCIC_RX_BUF[SCIC_MAX_RECV_LEN];

    char SCIA_Rx_STA = 0,SCIB_Rx_STA = 0,SCIC_Rx_STA = 0;
    int Rx_flag_A;
    int Rx_flag_B;

    void SCIAInit(void)
    {
    EALLOW;
    Rx_flag_A=0;

    GpioCtrlRegs.GPBPUD.bit.GPIO36 = 0; // Enable pull-up for GPIO36 (SCIRXDA)
    GpioCtrlRegs.GPBPUD.bit.GPIO35 = 0; // Enable pull-up for GPIO35 (SCITXDA)

    GpioCtrlRegs.GPBQSEL1.bit.GPIO36 = 3; // Asynch input GPIO28 (SCIRXDA)

    GpioCtrlRegs.GPBMUX1.bit.GPIO36 = 1; // Configure GPIO36 for SCIRXDA operation
    GpioCtrlRegs.GPBMUX1.bit.GPIO35 = 1; // Configure GPIO35 for SCITXDA operation
    EDIS;
    SciaRegs.SCICCR.all =0x0007; // 1 stop bit, No loopback
    // No parity,8 char bits,
    // async mode, idle-line protocol
    SciaRegs.SCICTL1.all =0x0003; // enable TX, RX, internal SCICLK,
    // Disable RX ERR, SLEEP, TXWAKE
    #if (CPU_FRQ_150MHZ)
    SciaRegs.SCIHBAUD =0x0000; // 9600 baud @LSPCLK = 37.5MHz.
    SciaRegs.SCILBAUD =0x0079;
    #endif
    #if (CPU_FRQ_100MHZ)
    SciaRegs.SCIHBAUD =0x0000; // 9600 baud @LSPCLK = 20MHz.
    SciaRegs.SCILBAUD =0x0000;
    #endif

    SciaRegs.SCICTL2.bit.TXINTENA =1;
    SciaRegs.SCICTL2.bit.RXBKINTENA =1;
    SciaRegs.SCICTL1.all =0x0023; // Relinquish SCI from Reset

    EALLOW; // This is needed to write to EALLOW protected registers
    PieVectTable.SCIRXINTA = &sciaRxIsr;//&sciaRxFifoIsr
    PieVectTable.SCITXINTA = &sciaTxIsr;
    EDIS;
    //开中断
    DINT;
    PieCtrlRegs.PIECTRL.bit.ENPIE = 1; // Enable the PIE block
    PieCtrlRegs.PIEIER9.bit.INTx1=1; // PIE Group 9, int1
    PieCtrlRegs.PIEIER9.bit.INTx2=1; // PIE Group 9, INT2
    IER = 0x100; // Enable CPU INT
    EINT;
    }
    void SCIASendData(int a)
    {
    while (SciaRegs.SCICTL2.bit.TXRDY == 0) {}
    SciaRegs.SCITXBUF=a;
    }
    void SCIASendStr(char * msg)
    {
    int i;
    i = 0;
    while(msg[i] != '\0')
    {
    SCIASendData(msg[i]);
    i++;
    }
    }

    //Init SCIB
    void SCIBInit(void)
    {
    EALLOW;
    Rx_flag_B=0;

    GpioCtrlRegs.GPAPUD.bit.GPIO18 = 0; // Enable pull-up for GPIO18 (SCITXDB)
    GpioCtrlRegs.GPAPUD.bit.GPIO19 = 0; // Enable pull-up for GPIO19 (SCIRXDB)

    GpioCtrlRegs.GPAQSEL2.bit.GPIO19 = 3; // Asynch input GPIO19 (SCIRXDB)
    GpioCtrlRegs.GPAQSEL2.bit.GPIO18 = 3; // Asynch input GPIO18 (SCIRXDB)

    GpioCtrlRegs.GPAMUX2.bit.GPIO18 = 2; // Configure GPIO18 for SCITXDB operation

    GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 2; // Configure GPIO19 for SCIRXDB operation

    EDIS;

    ScibRegs.SCICCR.all =0x0007; // 1 stop bit, No loopback
    // No parity,8 char bits,
    // async mode, idle-line protocol
    ScibRegs.SCICTL1.all =0x0003; // enable TX, RX, internal SCICLK,
    // Disable RX ERR, SLEEP, TXWAKE
    #if (CPU_FRQ_150MHZ)
    ScibRegs.SCIHBAUD =0x0000; // 9600 baud @LSPCLK = 37.5MHz.
    ScibRegs.SCILBAUD =0x0079;
    #endif
    #if (CPU_FRQ_100MHZ)
    ScibRegs.SCIHBAUD =0x0000; // 9600 baud @LSPCLK = 20MHz.
    ScibRegs.SCILBAUD =0x001A;
    #endif

    ScibRegs.SCICTL2.bit.TXINTENA =1;
    ScibRegs.SCICTL2.bit.RXBKINTENA =1;

    ScibRegs.SCICTL1.all =0x0023; // Relinquish SCI from Reset

    EALLOW; // This is needed to write to EALLOW protected registers
    PieVectTable.SCIRXINTC = &scibRxIsr;
    PieVectTable.SCITXINTC = &scibTxIsr;
    EDIS;
    //
    DINT;
    PieCtrlRegs.PIECTRL.bit.ENPIE = 1; // Enable the PIE block
    PieCtrlRegs.PIEIER9.bit.INTx3=1; // PIE Group 9, int3
    PieCtrlRegs.PIEIER9.bit.INTx4=1; // PIE Group 9, INT4
    IER = 0x100; // Enable CPU INT
    EINT;
    // ScibRegs.SCIFFTX.all=0xE040;
    // ScibRegs.SCIFFRX.all=0x204f;
    // ScibRegs.SCIFFCT.all=0x0;
    }
    void SCIBSendData(int a)
    {
    while (ScibRegs.SCICTL2.bit.TXRDY == 0) {}
    ScibRegs.SCITXBUF=a;
    }
    void SCIBSendStr(char * msg)
    {
    int i;
    i = 0;
    while(msg[i] != '\0')
    // while(msg[i] = '\0')
    {
    SCIBSendData(msg[i]);
    i++;
    }
    }

    __interrupt void sciaTxIsr(void)//
    {
    PieCtrlRegs.PIEACK.bit.ACK9 = 1;// Issue PIE ACK
    }

    __interrupt void sciaRxIsr(void)
    {
    Uint16 res;
    if(SciaRegs.SCICTL2.bit.TXRDY == 1)
    {
    res = SciaRegs.SCIRXBUF.all;
    SCIA_RX_BUF[SCIA_Rx_STA] = res;
    SCIA_Rx_STA++;
    if(SCIA_RX_BUF[0] != '#')
    {
    SCIA_Rx_STA=0;//接收错误从新开始。
    Rx_flag_A=0;
    }
    if(res=='*')
    {
    SCIA_RX_BUF[SCIA_Rx_STA] = '\0';
    Rx_flag_A=1;//接收完成
    SCIA_Rx_STA=0;//0404
    }
    }
    PieCtrlRegs.PIEACK.bit.ACK9 = 1;// Issue PIE ACK
    }
    ///////////////
    __interrupt void scibTxIsr(void)
    {
    PieCtrlRegs.PIEACK.bit.ACK9 = 1;// Issue PIE ACK
    }
    __interrupt void scibRxIsr(void)
    {
    Uint16 res;
    if(ScibRegs.SCICTL2.bit.TXRDY == 1)
    {
    res = ScibRegs.SCIRXBUF.all;
    SCIB_RX_BUF[SCIB_Rx_STA] = res;
    SCIB_Rx_STA++;
    if(SCIB_RX_BUF[0] != '#')
    {
    SCIB_Rx_STA=0;//接收错误从新开始。
    Rx_flag_B=0;
    }
    if(res=='*')
    {
    SCIB_RX_BUF[SCIB_Rx_STA] = '\0';
    Rx_flag_B=1;//接收完成
    SCIB_Rx_STA=0;//
    }
    }
    PieCtrlRegs.PIEACK.bit.ACK9 = 1;// Issue PIE ACK

    }