大家好，使用280049 CMPSS实现电流CBC功能遇到问题：现象1 ：同样代码在TI LAUNCHXL-F280049C开发板模拟触发和恢复PWM1和2 CBC功能发波关波正常，在控制板上波一直发不出来？？现象2：带仿真器+LAUNCHXL板查看EPwm1Regs.TZCBCFLG.DCAEVT2 =1和DCBEVT2=1为什么还能发出波来？控制板同样有DCAEVT2=1 DCBEVT2=1没波发出，配置如下，请分析指导，急件，谢谢。
// ILA--->A5--->CMP2HP
AnalogSubsysRegs.CMPHPMXSEL.bit.CMP2HPMXSEL = 3;
// ILB--->A10-->CMP7HP
AnalogSubsysRegs.CMPHPMXSEL.bit.CMP7HPMXSEL = 0;
// I115-->B3--->CMP3HP
AnalogSubsysRegs.CMPHPMXSEL.bit.CMP3HPMXSEL = 3;
// NEG signal comes from DAC
Cmpss2Regs.COMPCTL.bit.COMPHSOURCE = NEGIN_DAC;
Cmpss3Regs.COMPCTL.bit.COMPHSOURCE = NEGIN_DAC;
Cmpss7Regs.COMPCTL.bit.COMPHSOURCE = NEGIN_DAC;
// Configure CTRIPOUT path
Cmpss2Regs.COMPCTL.bit.CTRIPHSEL = CTRIP_ASYNCH;
Cmpss3Regs.COMPCTL.bit.CTRIPHSEL = CTRIP_ASYNCH;
Cmpss7Regs.COMPCTL.bit.CTRIPHSEL = CTRIP_ASYNCH;
Cmpss2Regs.COMPDACCTL.bit.DACSOURCE = 0; // DACVALS
Cmpss2Regs.COMPDACCTL.bit.SELREF = REFERENCE_VDDA;
Cmpss2Regs.DACHVALS.bit.DACVAL = 3050;// IA:0--->1 trip
Cmpss7Regs.COMPDACCTL.bit.DACSOURCE = 0; // DACVALS
Cmpss7Regs.COMPDACCTL.bit.SELREF = REFERENCE_VDDA;
Cmpss7Regs.DACHVALS.bit.DACVAL = 3050; // IB:0--->1 trip
Cmpss3Regs.COMPDACCTL.bit.DACSOURCE = 0; // DACVALS
Cmpss3Regs.COMPDACCTL.bit.SELREF = REFERENCE_VDDA;
Cmpss3Regs.DACHVALS.bit.DACVAL = (Uint16)CUR115_CBC_CMPS_BUCK; // I115:1--->0 trip
// ILA--->CMPSS2.CTRIPH--->TRIP4
EPwmXbarRegs.TRIP4MUX0TO15CFG.bit.MUX2 = 1;
EPwmXbarRegs.TRIP4MUXENABLE.bit.MUX2 = 1;
// I115-->CMPSS3.CTRIPH--->TRIP7
EPwmXbarRegs.TRIP7MUX0TO15CFG.bit.MUX4 = 1;
EPwmXbarRegs.TRIP7MUXENABLE.bit.MUX4 = 1;
// TRIP4-->DCAH
EPwm1Regs.DCTRIPSEL.bit.DCAHCOMPSEL = DC_TRIPIN4; // DCAH = Comp2H
// TRIP7-->DCBH
EPwm1Regs.DCTRIPSEL.bit.DCBHCOMPSEL = DC_TRIPIN7; // DCBH = Comp3H
// DCAH-->DCAEVT2
EPwm1Regs.TZDCSEL.bit.DCAEVT2 = TZ_DCAH_HI; // DCAH = high, DCAL = don't care // for buck ILA: 0--->1 ok
EPwm1Regs.DCACTL.bit.EVT2SRCSEL = DC_EVT2; // DCAEVT2 = DCAEVT2 (not filtered)
EPwm1Regs.DCACTL.bit.EVT2FRCSYNCSEL = DC_EVT_SYNC;
// DCBH-->DCBEVT2
EPwm1Regs.TZDCSEL.bit.DCBEVT2 = TZ_DCBH_LOW; // DCAH = high, DCAL = don't care // for buck I115: 1--->0 ok
EPwm1Regs.DCBCTL.bit.EVT2SRCSEL = DC_EVT2;
EPwm1Regs.DCBCTL.bit.EVT2FRCSYNCSEL = DC_EVT_SYNC;
EPwm1Regs.TZSEL.bit.DCAEVT2 = 1; // Enable DCAEVT2 CBC
EPwm1Regs.TZSEL.bit.DCBEVT2 = 1; // Enable DCBEVT2 CBC
EPwm1Regs.TZCTL.bit.DCAEVT2 = TZ_FORCE_LO;
EPwm1Regs.TZCTL.bit.DCBEVT2 = TZ_FORCE_LO;
EPwm1Regs.TZCLR.bit.CBCPULSE = 0; // CNT=0 Pulse clrar CBC
// ILB--->CMPSS7.CTRIPH--->TRIP5
EPwmXbarRegs.TRIP5MUX0TO15CFG.bit.MUX12 = 1;
EPwmXbarRegs.TRIP5MUXENABLE.bit.MUX12 = 1;
// I115-->CMPSS3.CTRIPH--->TRIP7
EPwmXbarRegs.TRIP7MUX0TO15CFG.bit.MUX4 = 1;
EPwmXbarRegs.TRIP7MUXENABLE.bit.MUX4 = 1;
// TRIP5-->DCAH
EPwm2Regs.DCTRIPSEL.bit.DCAHCOMPSEL = DC_TRIPIN5; // DCAH = Comp7H
// TRIP5-->DCAL
//EPwm2Regs.DCTRIPSEL.bit.DCALCOMPSEL = DC_TRIPIN5; // DCAL = Comp7H
// TRIP7-->DCBH
EPwm2Regs.DCTRIPSEL.bit.DCBHCOMPSEL = DC_TRIPIN7; // DCBH = Comp3H
// DCAH-->DCAEVT2
EPwm2Regs.TZDCSEL.bit.DCAEVT2 = TZ_DCAH_HI; // DCAH = high, DCAL = don't care for buck ILB: 0--->1 ok
EPwm2Regs.DCACTL.bit.EVT2SRCSEL = DC_EVT2; // DCAEVT2 = DCAEVT2 (not filtered)
EPwm2Regs.DCACTL.bit.EVT2FRCSYNCSEL = DC_EVT_ASYNC; // Take async path
// DCBH-->DCBEVT2
EPwm2Regs.TZDCSEL.bit.DCBEVT2 = TZ_DCBH_LOW; // DCAH = high, DCAL = don't care for buck I115: 1--->0 ok
EPwm2Regs.DCBCTL.bit.EVT2SRCSEL = DC_EVT2;
EPwm2Regs.DCBCTL.bit.EVT2FRCSYNCSEL = DC_EVT_ASYNC;
EPwm2Regs.TZSEL.bit.DCAEVT2 = 1; // Enable DCAEVT2 CBC
EPwm2Regs.TZSEL.bit.DCBEVT2 = 1; // Enable DCBEVT2 CBC
EPwm2Regs.TZCTL.bit.DCAEVT2 = TZ_FORCE_LO;
EPwm2Regs.TZCTL.bit.DCBEVT2 = TZ_FORCE_LO;
EPwm2Regs.TZCLR.bit.CBCPULSE = 0; // CNT=0 Pulse clrar CBC
