使能 EPWM1 EPWM2同步
使能 TB的Shadow
The TBPRD shadow register is enabled when TBCTL[PRDLD] = 0. Reads from and writes to the
TBPRD memory address go to the shadow register. The shadow register contents are transferred to
the active register (TBPRD (Active) ← TBPRD (shadow)) when the time-base counter equals zero
(TBCTR = 0x0000). By default the TBPRD shadow register is enabled.
EPwm1Regs.TBCTL.bit.FREE_SOFT=TB_FREEZE;
EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN;
EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE;
EPwm1Regs.TBCTL.bit.PRDLD = TB_SHADOW;
EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO;
EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN;
EPwm2Regs.TBCTL.bit.PHSEN = TB_ENABLE;
EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;
EPwm2Regs.TBCTL.bit.PRDLD = TB_SHADOW;
EPwm2Regs.TBPHS.half.TBPHS = 3;
EPwm2Regs.TBCTR = 0;
在程序运行过程,我要动态修改 EPWM1 EPMW2的频率(TBPRD),且这两个频率相等。
这样的配置,有没有可能 EPWM2 TBCTR由于加载 TBPHS,导致TBCTR 一直不能计数到0
所以不能加载 TBPRD的 TBPRD (Active) ← TBPRD (shadow)