This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

F280049C ADC触发DMA的问题

Other Parts Discussed in Thread: C2000WARE

原打算实现ADC采样完了后,触发DMA把ADC的值自动传给参数,所以使用 DMA_ADCAINT1作为DMA的触发源,

但发现必须是能ADCA的中断,也就是说系统必须响应一次多余的ADCA中断后,才能触发DMA工作. 有办法能直接让

ADCA完成后自动触发DMA传送,而不必触发ADCA的中断吗?

谢谢!

jjl3

  • 关于ADC+DMA,您可以参考下28377D的例程 adc_soc_continuous_dma_cpu01

    C2000Ware_3_03_00_00\device_support\f2837xd\examples\cpu1\adc_soc_continuous_dma\cpu01
  • Hello, Susan

    貌似这个例子也是enable了ADC中断的。

    下面是我在程序中的配置, 我发现只要我关闭了ACDA的中断,不管在哪,

    都无法触发DMA了。

    EALLOW;
    PieCtrlRegs.PIECTRL.bit.ENPIE = 1;     // Enable the PIE block
    PieCtrlRegs.PIEIER7.bit.INTx1 = 1;       // Enable DMA_CH1 interrupt
    //PieCtrlRegs.PIEIER1.bit.INTx1 = 1;     // Enable ADCA1 interrupt
    EDIS;

    IER |= M_INT1 | M_INT7;
    EINT;
    ERTM;

    void ConfigureADC(void)
    {
    // ADC
    SetVREF(ADC_ADCA, ADC_EXTERNAL, ADC_VREF2P5);
    EALLOW;
    AdcaRegs.ADCCTL2.bit.PRESCALE = 6;       // divided by four
    AdcaRegs.ADCCTL1.bit.INTPULSEPOS = 1; // EOC interrupt pulse
    AdcaRegs.ADCCTL1.bit.ADCPWDNZ = 1;     // Powered up
    DELAY_US(1000); // Wait for initialization

    AdcaRegs.ADCSOC0CTL.bit.CHSEL = 2;       // SOC0 will convert pin A2
    AdcaRegs.ADCSOC0CTL.bit.ACQPS = 19;     // sample window is 20 SYSCLK cycles
    AdcaRegs.ADCSOC0CTL.bit.TRIGSEL = 9;    // trigger on ePWM3 SOCA
    AdcaRegs.ADCINTSEL1N2.bit.INT1SEL = 0;  // EOC0 will set INT1 flag
    AdcaRegs.ADCINTSEL1N2.bit.INT1E = 1;       // enable INT1 flag
    AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; // make sure INT1 flag is cleared
    EDIS;

    }

    void DMAInit(void)
    {

    // Initialize DMA
    DMAInitialize();

    // DMA set up for ADC

    DMACH1AddrConfig(adc_buff, &AdcaResultRegs.ADCRESULT0);

    // Enable the DMA channel 1 interrupt
    DMACH1TransferConfig(3, 0, 1); // 1 T

    // Set up MODE Register:
    DMACH1ModeConfig(
    DMA_ADCAINT1, 
    PERINT_ENABLE,             // Peripheral interrupt enable
    ONESHOT_DISABLE,        // One burst transfer per trigger
    CONT_ENABLE,                // Channel re-initializes when TRANSFER_COUNT is zero and waits for the next event trigger
    SYNC_DISABLE,
    SYNC_SRC,
    OVRFLOW_DISABLE,       // Disable the overflow interrupt
    SIXTEEN_BIT,                    // Data size in transfer
    CHINT_END,                      // Generate interrupt to CPU at end of transfer
    CHINT_ENABLE                // Enables the DMA channel's CPU interrupt.
    );