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MSP430FR2353 IIC与从机通讯,想用中断方式发送接收数据?接收数据没有问题,发送数据失败,但是抓波形看到了发送的地址没有发送数据

Other Parts Discussed in Thread: MSP430FR2355, MSP430FR2433

/* --COPYRIGHT--,BSD_EX
* Copyright (c) 2016, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*******************************************************************************
*
* MSP430 CODE EXAMPLE DISCLAIMER
*
* MSP430 code examples are self-contained low-level programs that typically
* demonstrate a single peripheral function or device feature in a highly
* concise manner. For this the code may rely on the device's power-on default
* register values and settings such as the clock configuration and care must
* be taken when combining code from several examples to avoid potential side
* effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
* for an API functional library-approach to peripheral configuration.
*
* --/COPYRIGHT--*/
//******************************************************************************
// MSP430FR235x Demo - eUSCI_B0 I2C Master RX multiple bytes from MSP430 Slave
//
// Description: This demo connects two MSP430's via the I2C bus. The master
// reads 5 bytes from the slave. This is the MASTER CODE. The data from the slave
// transmitter begins at 0 and increments with each transfer.
// The USCI_B0 RX interrupt is used to know when new data has been received.
// ACLK = default REFO ~32768Hz, MCLK = SMCLK = BRCLK = DCODIV ~1MHz.
//
// *****used with "msp430fr235x_euscib0_i2c_11.c"****
//
// /|\ /|\
// MSP430FR2355 10k 10k MSP430FR2355
// slave | | master
// ----------------- | | -----------------
// | P1.2/UCB0SDA|<-|----|->|P1.2/UCB0SDA |
// | | | | |
// | | | | |
// | P1.3/UCB0SCL|<-|------>|P1.3/UCB0SCL |
// | | | P1.0|--> LED
//
// Cash Hao
// Texas Instruments Inc.
// November 2016
// Built with IAR Embedded Workbench v6.50.0 & Code Composer Studio v6.2.0
//******************************************************************************
#include <msp430.h>

volatile unsigned char RXData[128];
int i =0,r=0;
void init_receive(void)
{
// Configure USCI_B0 for I2C mode
UCB0CTLW0 |= UCSWRST; // Software reset enabled
UCB0CTLW0 |= UCMODE_3 | UCMST | UCSYNC; // I2C mode, Master mode, sync
UCB0CTLW1 |= UCASTP_2; // Automatic stop generated
// after UCB0TBCNT is reached
UCB0BRW = 0x0008; // baudrate = SMCLK / 8
UCB0TBCNT = 0x0005; // number of bytes to be received
UCB0I2CSA = 0x0048; // Slave address
UCB0CTLW0 &=~UCTR; //接收模式
UCB0CTL1 &= ~UCSWRST;
UCB0IE &=~UCTXIE; //停止发送中断
UCB0IE |= UCRXIE | UCNACKIE | UCBCNTIE;

}
void init_trans(void)
{
// Configure USCI_B0 for I2C mode
UCB0CTLW0 |= UCSWRST; // put eUSCI_B in reset state
UCB0CTLW0 |= UCMODE_3 | UCMST | UCSYNC; // I2C master mode, SMCLK
UCB0BRW = 0x8; // baudrate = SMCLK / 8
UCB0CTLW0 |=UCTR; //发送模式
UCB0I2CSA = 0x48; // configure slave address
UCB0CTLW0 &=~ UCSWRST; // clear reset register
UCB0IE &=~UCRXIE; //停止接收中断
UCB0IE |= UCTXIE | UCNACKIE | UCBCNTIE; // transmit and NACK interrupt enable
}
int main(void)
{
WDTCTL = WDTPW | WDTHOLD;

// Configure GPIO

P1SEL0 |= BIT2 | BIT3; // I2C pins

// Disable the GPIO power-on default high-impedance mode to activate
// previously configured port settings
PM5CTL0 &= ~LOCKLPM5;

_EINT();
_NOP();
while (1)
{


//配置成接收模式中断接收字节
init_receive();
while (UCB0CTL1 & UCTXSTP); // Ensure stop condition got sent
UCB0CTL1 |= UCTXSTT; // I2C start condition

__delay_cycles(2000);
//配置成发送模式发送字节 中断发送字节
init_trans();
while (UCB0CTLW0 & UCTXSTP); // Ensure stop condition got sent
UCB0CTLW0 |= UCTR | UCTXSTT; // I2C TX, start condition
__delay_cycles(10000);

}
}

#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector = USCI_B0_VECTOR
__interrupt void USCIB0_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(USCI_B0_VECTOR))) USCIB0_ISR (void)
#else
#error Compiler not supported!
#endif
{
switch(__even_in_range(UCB0IV, USCI_I2C_UCBIT9IFG))
{
case USCI_NONE: break; // Vector 0: No interrupts
case USCI_I2C_UCALIFG: break; // Vector 2: ALIFG
case USCI_I2C_UCNACKIFG: // Vector 4: NACKIFG
UCB0CTL1 |= UCTXSTT; // I2C start condition
break;
case USCI_I2C_UCSTTIFG: break; // Vector 6: STTIFG
case USCI_I2C_UCSTPIFG: break; // Vector 8: STPIFG
case USCI_I2C_UCRXIFG3: break; // Vector 10: RXIFG3
case USCI_I2C_UCTXIFG3: break; // Vector 14: TXIFG3
case USCI_I2C_UCRXIFG2: break; // Vector 16: RXIFG2
case USCI_I2C_UCTXIFG2: break; // Vector 18: TXIFG2
case USCI_I2C_UCRXIFG1: break; // Vector 20: RXIFG1
case USCI_I2C_UCTXIFG1: break; // Vector 22: TXIFG1
case USCI_I2C_UCRXIFG0: // Vector 24: RXIFG0
RXData[i] = UCB0RXBUF; // Get RX data
i++;
if(i>52)
{
i=0;

}

break;
case USCI_I2C_UCTXIFG0:


UCB0TXBUF = 0x55; // Load TX buffer

UCB0CTLW0 |= UCTXSTP; // I2C stop condition
UCB0IFG &= ~UCTXIFG; // Clear USCI_B0 TX int flag
r++;
if(r>20)
{
r=0;
}

break; // Vector 26: TXIFG0


case USCI_I2C_UCBCNTIFG: // Vector 28: BCNTIFG

break;
case USCI_I2C_UCCLTOIFG: break; // Vector 30: clock low timeout
case USCI_I2C_UCBIT9IFG: break; // Vector 32: 9th bit
default: break;
}
}

//以上是我参考TI官方提供的例程,两个合在一块,接收正常,但是发送失败?不知道自己配置哪里出现问题,单独两个例程(master  读例程 master写例程)与从机测试都OK

  • 看波形是把写数据的地址发送出去了,但是要发送的数据没有发送出去 也有停止信号,开始信号还有应答,数据不知道怎么没有发送出去
  • MSP430FR2433是有相关例程的,您可以参考一下

    下面的例程是I2C主设备发送和接收3种不同长度的不同消息。 I2C主设备将在等待使用I2C中断发送/接收消息时会进入LPM0模式。

    //******************************************************************************
    //   MSP430FR243x Demo - eUSCI_B0, I2C Master multiple byte TX/RX
    //
    //   Description: I2C master communicates to I2C slave sending and receiving
    //   3 different messages of different length. I2C master will enter LPM0 mode
    //   while waiting for the messages to be sent/receiving using I2C interrupt.
    //   ACLK = NA, MCLK = SMCLK = DCO 16MHz.
    //
    //                                     /|\ /|\
    //                   MSP430FR2633      4.7k |
    //                 -----------------    |  4.7k
    //            /|\ |             P1.3|---+---|-- I2C Clock (UCB0SCL)
    //             |  |                 |       |
    //             ---|RST          P1.2|-------+-- I2C Data (UCB0SDA)
    //                |                 |
    //                |                 |
    //                |                 |
    //                |                 |
    //                |                 |
    //                |                 |
    //
    //   Nima Eskandari and Ryan Meredith
    //   Texas Instruments Inc.
    //   January 2018
    //   Built with CCS V7.3
    //******************************************************************************
    
    #include <msp430.h> 
    #include <stdint.h>
    #include <stdbool.h>
    
    //******************************************************************************
    // Pin Config ******************************************************************
    //******************************************************************************
    
    #define LED_OUT     P1OUT
    #define LED_DIR     P1DIR
    #define LED0_PIN    BIT0
    #define LED1_PIN    BIT1
    
    //******************************************************************************
    // Example Commands ************************************************************
    //******************************************************************************
    
    #define SLAVE_ADDR  0x48
    
    /* CMD_TYPE_X_SLAVE are example commands the master sends to the slave.
     * The slave will send example SlaveTypeX buffers in response.
     *
     * CMD_TYPE_X_MASTER are example commands the master sends to the slave.
     * The slave will initialize itself to receive MasterTypeX example buffers.
     * */
    
    #define CMD_TYPE_0_SLAVE      0
    #define CMD_TYPE_1_SLAVE      1
    #define CMD_TYPE_2_SLAVE      2
    
    #define CMD_TYPE_0_MASTER      3
    #define CMD_TYPE_1_MASTER      4
    #define CMD_TYPE_2_MASTER      5
    
    #define TYPE_0_LENGTH   1
    #define TYPE_1_LENGTH   2
    #define TYPE_2_LENGTH   6
    
    #define MAX_BUFFER_SIZE     20
    
    /* MasterTypeX are example buffers initialized in the master, they will be
     * sent by the master to the slave.
     * SlaveTypeX are example buffers initialized in the slave, they will be
     * sent by the slave to the master.
     * */
    
    uint8_t MasterType2 [TYPE_2_LENGTH] = {'F', '4', '1', '9', '2', 'B'};
    uint8_t MasterType1 [TYPE_1_LENGTH] = { 8, 9};
    uint8_t MasterType0 [TYPE_0_LENGTH] = { 11};
    
    
    uint8_t SlaveType2 [TYPE_2_LENGTH] = {0};
    uint8_t SlaveType1 [TYPE_1_LENGTH] = {0};
    uint8_t SlaveType0 [TYPE_0_LENGTH] = {0};
    
    //******************************************************************************
    // General I2C State Machine ***************************************************
    //******************************************************************************
    
    typedef enum I2C_ModeEnum{
        IDLE_MODE,
        NACK_MODE,
        TX_REG_ADDRESS_MODE,
        RX_REG_ADDRESS_MODE,
        TX_DATA_MODE,
        RX_DATA_MODE,
        SWITCH_TO_RX_MODE,
        SWITHC_TO_TX_MODE,
        TIMEOUT_MODE
    } I2C_Mode;
    
    
    /* Used to track the state of the software state machine*/
    I2C_Mode MasterMode = IDLE_MODE;
    
    /* The Register Address/Command to use*/
    uint8_t TransmitRegAddr = 0;
    
    /* ReceiveBuffer: Buffer used to receive data in the ISR
     * RXByteCtr: Number of bytes left to receive
     * ReceiveIndex: The index of the next byte to be received in ReceiveBuffer
     * TransmitBuffer: Buffer used to transmit data in the ISR
     * TXByteCtr: Number of bytes left to transfer
     * TransmitIndex: The index of the next byte to be transmitted in TransmitBuffer
     * */
    uint8_t ReceiveBuffer[MAX_BUFFER_SIZE] = {0};
    uint8_t RXByteCtr = 0;
    uint8_t ReceiveIndex = 0;
    uint8_t TransmitBuffer[MAX_BUFFER_SIZE] = {0};
    uint8_t TXByteCtr = 0;
    uint8_t TransmitIndex = 0;
    
    
    
    /* I2C Write and Read Functions */
    
    /* For slave device with dev_addr, writes the data specified in *reg_data
     *
     * dev_addr: The slave device address.
     *           Example: SLAVE_ADDR
     * reg_addr: The register or command to send to the slave.
     *           Example: CMD_TYPE_0_MASTER
     * *reg_data: The buffer to write
     *           Example: MasterType0
     * count: The length of *reg_data
     *           Example: TYPE_0_LENGTH
     *  */
    I2C_Mode I2C_Master_WriteReg(uint8_t dev_addr, uint8_t reg_addr, uint8_t *reg_data, uint8_t count);
    
    /* For slave device with dev_addr, read the data specified in slaves reg_addr.
     * The received data is available in ReceiveBuffer
     *
     * dev_addr: The slave device address.
     *           Example: SLAVE_ADDR
     * reg_addr: The register or command to send to the slave.
     *           Example: CMD_TYPE_0_SLAVE
     * count: The length of data to read
     *           Example: TYPE_0_LENGTH
     *  */
    I2C_Mode I2C_Master_ReadReg(uint8_t dev_addr, uint8_t reg_addr, uint8_t count);
    void CopyArray(uint8_t *source, uint8_t *dest, uint8_t count);
    
    
    I2C_Mode I2C_Master_ReadReg(uint8_t dev_addr, uint8_t reg_addr, uint8_t count)
    {
        /* Initialize state machine */
        MasterMode = TX_REG_ADDRESS_MODE;
        TransmitRegAddr = reg_addr;
        RXByteCtr = count;
        TXByteCtr = 0;
        ReceiveIndex = 0;
        TransmitIndex = 0;
    
        /* Initialize slave address and interrupts */
        UCB0I2CSA = dev_addr;
        UCB0IFG &= ~(UCTXIFG + UCRXIFG);       // Clear any pending interrupts
        UCB0IE &= ~UCRXIE;                       // Disable RX interrupt
        UCB0IE |= UCTXIE;                        // Enable TX interrupt
    
        UCB0CTLW0 |= UCTR + UCTXSTT;             // I2C TX, start condition
        __bis_SR_register(LPM0_bits + GIE);              // Enter LPM0 w/ interrupts
    
        return MasterMode;
    
    }
    
    
    I2C_Mode I2C_Master_WriteReg(uint8_t dev_addr, uint8_t reg_addr, uint8_t *reg_data, uint8_t count)
    {
        /* Initialize state machine */
        MasterMode = TX_REG_ADDRESS_MODE;
        TransmitRegAddr = reg_addr;
    
        //Copy register data to TransmitBuffer
        CopyArray(reg_data, TransmitBuffer, count);
    
        TXByteCtr = count;
        RXByteCtr = 0;
        ReceiveIndex = 0;
        TransmitIndex = 0;
    
        /* Initialize slave address and interrupts */
        UCB0I2CSA = dev_addr;
        UCB0IFG &= ~(UCTXIFG + UCRXIFG);       // Clear any pending interrupts
        UCB0IE &= ~UCRXIE;                       // Disable RX interrupt
        UCB0IE |= UCTXIE;                        // Enable TX interrupt
    
        UCB0CTLW0 |= UCTR + UCTXSTT;             // I2C TX, start condition
        __bis_SR_register(LPM0_bits + GIE);              // Enter LPM0 w/ interrupts
    
        return MasterMode;
    }
    
    void CopyArray(uint8_t *source, uint8_t *dest, uint8_t count)
    {
        uint8_t copyIndex = 0;
        for (copyIndex = 0; copyIndex < count; copyIndex++)
        {
            dest[copyIndex] = source[copyIndex];
        }
    }
    
    
    //******************************************************************************
    // Device Initialization *******************************************************
    //******************************************************************************
    
    
    void initGPIO()
    {
        // Configure GPIO
        LED_OUT &= ~(LED0_PIN | LED1_PIN); // P1 setup for LED & reset output
        LED_DIR |= (LED0_PIN | LED1_PIN);
    
        // I2C pins
        P1SEL0 |= BIT2 | BIT3;
        P1SEL1 &= ~(BIT2 | BIT3);
    
        // Disable the GPIO power-on default high-impedance mode to activate
        // previously configured port settings
        PM5CTL0 &= ~LOCKLPM5;
    }
    
    void initClockTo16MHz()
    {
        // Configure one FRAM waitstate as required by the device datasheet for MCLK
        // operation beyond 8MHz _before_ configuring the clock system.
        FRCTL0 = FRCTLPW | NWAITS_1;
    
        // Clock System Setup
        __bis_SR_register(SCG0);                           // disable FLL
        CSCTL3 |= SELREF__REFOCLK;                         // Set REFO as FLL reference source
        CSCTL0 = 0;                                        // clear DCO and MOD registers
        CSCTL1 &= ~(DCORSEL_7);                            // Clear DCO frequency select bits first
        CSCTL1 |= DCORSEL_5;                               // Set DCO = 16MHz
        CSCTL2 = FLLD_0 + 487;                             // DCOCLKDIV = 16MHz
        __delay_cycles(3);
        __bic_SR_register(SCG0);                           // enable FLL
        while(CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1));         // FLL locked
    }
    
    void initI2C()
    {
        UCB0CTLW0 = UCSWRST;                      // Enable SW reset
        UCB0CTLW0 |= UCMODE_3 | UCMST | UCSSEL__SMCLK | UCSYNC; // I2C master mode, SMCLK
        UCB0BRW = 160;                            // fSCL = SMCLK/160 = ~100kHz
        UCB0I2CSA = SLAVE_ADDR;                   // Slave Address
        UCB0CTLW0 &= ~UCSWRST;                    // Clear SW reset, resume operation
        UCB0IE |= UCNACKIE;
    }
    
    
    //******************************************************************************
    // Main ************************************************************************
    // Send and receive three messages containing the example commands *************
    //******************************************************************************
    
    int main(void) {
        WDTCTL = WDTPW | WDTHOLD;	// Stop watchdog timer
        initClockTo16MHz();
        initGPIO();
        initI2C();
    
        I2C_Master_WriteReg(SLAVE_ADDR, CMD_TYPE_0_MASTER, MasterType0, TYPE_0_LENGTH);
        I2C_Master_WriteReg(SLAVE_ADDR, CMD_TYPE_1_MASTER, MasterType1, TYPE_1_LENGTH);
        I2C_Master_WriteReg(SLAVE_ADDR, CMD_TYPE_2_MASTER, MasterType2, TYPE_2_LENGTH);
    
        I2C_Master_ReadReg(SLAVE_ADDR, CMD_TYPE_0_SLAVE, TYPE_0_LENGTH);
        CopyArray(ReceiveBuffer, SlaveType0, TYPE_0_LENGTH);
    
        I2C_Master_ReadReg(SLAVE_ADDR, CMD_TYPE_1_SLAVE, TYPE_1_LENGTH);
        CopyArray(ReceiveBuffer, SlaveType1, TYPE_1_LENGTH);
    
        I2C_Master_ReadReg(SLAVE_ADDR, CMD_TYPE_2_SLAVE, TYPE_2_LENGTH);
        CopyArray(ReceiveBuffer, SlaveType2, TYPE_2_LENGTH);
    
        __bis_SR_register(LPM0_bits + GIE);
    	return 0;
    }
    
    
    //******************************************************************************
    // I2C Interrupt ***************************************************************
    //******************************************************************************
    
    #if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
    #pragma vector = USCI_B0_VECTOR
    __interrupt void USCI_B0_ISR(void)
    #elif defined(__GNUC__)
    void __attribute__ ((interrupt(USCI_B0_VECTOR))) USCI_B0_ISR (void)
    #else
    #error Compiler not supported!
    #endif
    {
      //Must read from UCB0RXBUF
      uint8_t rx_val = 0;
      switch(__even_in_range(UCB0IV, USCI_I2C_UCBIT9IFG))
      {
        case USCI_NONE:          break;         // Vector 0: No interrupts
        case USCI_I2C_UCALIFG:   break;         // Vector 2: ALIFG
        case USCI_I2C_UCNACKIFG:                // Vector 4: NACKIFG
          break;
        case USCI_I2C_UCSTTIFG:  break;         // Vector 6: STTIFG
        case USCI_I2C_UCSTPIFG:  break;         // Vector 8: STPIFG
        case USCI_I2C_UCRXIFG3:  break;         // Vector 10: RXIFG3
        case USCI_I2C_UCTXIFG3:  break;         // Vector 12: TXIFG3
        case USCI_I2C_UCRXIFG2:  break;         // Vector 14: RXIFG2
        case USCI_I2C_UCTXIFG2:  break;         // Vector 16: TXIFG2
        case USCI_I2C_UCRXIFG1:  break;         // Vector 18: RXIFG1
        case USCI_I2C_UCTXIFG1:  break;         // Vector 20: TXIFG1
        case USCI_I2C_UCRXIFG0:                 // Vector 22: RXIFG0
            rx_val = UCB0RXBUF;
            if (RXByteCtr)
            {
              ReceiveBuffer[ReceiveIndex++] = rx_val;
              RXByteCtr--;
            }
    
            if (RXByteCtr == 1)
            {
              UCB0CTLW0 |= UCTXSTP;
            }
            else if (RXByteCtr == 0)
            {
              UCB0IE &= ~UCRXIE;
              MasterMode = IDLE_MODE;
              __bic_SR_register_on_exit(CPUOFF);      // Exit LPM0
            }
            break;
        case USCI_I2C_UCTXIFG0:                 // Vector 24: TXIFG0
            switch (MasterMode)
            {
              case TX_REG_ADDRESS_MODE:
                  UCB0TXBUF = TransmitRegAddr;
                  if (RXByteCtr)
                      MasterMode = SWITCH_TO_RX_MODE;   // Need to start receiving now
                  else
                      MasterMode = TX_DATA_MODE;        // Continue to transmision with the data in Transmit Buffer
                  break;
    
              case SWITCH_TO_RX_MODE:
                  UCB0IE |= UCRXIE;              // Enable RX interrupt
                  UCB0IE &= ~UCTXIE;             // Disable TX interrupt
                  UCB0CTLW0 &= ~UCTR;            // Switch to receiver
                  MasterMode = RX_DATA_MODE;    // State state is to receive data
                  UCB0CTLW0 |= UCTXSTT;          // Send repeated start
                  if (RXByteCtr == 1)
                  {
                      //Must send stop since this is the N-1 byte
                      while((UCB0CTLW0 & UCTXSTT));
                      UCB0CTLW0 |= UCTXSTP;      // Send stop condition
                  }
                  break;
    
              case TX_DATA_MODE:
                  if (TXByteCtr)
                  {
                      UCB0TXBUF = TransmitBuffer[TransmitIndex++];
                      TXByteCtr--;
                  }
                  else
                  {
                      //Done with transmission
                      UCB0CTLW0 |= UCTXSTP;     // Send stop condition
                      MasterMode = IDLE_MODE;
                      UCB0IE &= ~UCTXIE;                       // disable TX interrupt
                      __bic_SR_register_on_exit(CPUOFF);      // Exit LPM0
                  }
                  break;
    
              default:
                  __no_operation();
                  break;
            }
            break;
        default: break;
      }
    }
    
    

  • 你好,方便提供下,与这个master  对应的slave 例程吗?我网上下载,被限制,能否提供下,非常感谢你

  • 例程都在msp430ware里,帮你上传iic相关的

    msp430fr235x_euscib0_i2c_10.c
    /* --COPYRIGHT--,BSD_EX
     * Copyright (c) 2016, Texas Instruments Incorporated
     * All rights reserved.
     *
     * Redistribution and use in source and binary forms, with or without
     * modification, are permitted provided that the following conditions
     * are met:
     *
     * *  Redistributions of source code must retain the above copyright
     *    notice, this list of conditions and the following disclaimer.
     *
     * *  Redistributions in binary form must reproduce the above copyright
     *    notice, this list of conditions and the following disclaimer in the
     *    documentation and/or other materials provided with the distribution.
     *
     * *  Neither the name of Texas Instruments Incorporated nor the names of
     *    its contributors may be used to endorse or promote products derived
     *    from this software without specific prior written permission.
     *
     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     *
     *******************************************************************************
     *
     *                       MSP430 CODE EXAMPLE DISCLAIMER
     *
     * MSP430 code examples are self-contained low-level programs that typically
     * demonstrate a single peripheral function or device feature in a highly
     * concise manner. For this the code may rely on the device's power-on default
     * register values and settings such as the clock configuration and care must
     * be taken when combining code from several examples to avoid potential side
     * effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
     * for an API functional library-approach to peripheral configuration.
     *
     * --/COPYRIGHT--*/
    //******************************************************************************
    //  MSP430FR235x Demo  - eUSCI_B0 I2C Master RX multiple bytes from MSP430 Slave
    //
    //  Description: This demo connects two MSP430's via the I2C bus. The master
    //  reads 5 bytes from the slave. This is the MASTER CODE. The data from the slave
    //  transmitter begins at 0 and increments with each transfer.
    //  The USCI_B0 RX interrupt is used to know when new data has been received.
    //  ACLK = default REFO ~32768Hz, MCLK = SMCLK = BRCLK = DCODIV ~1MHz.
    //
    //    *****used with "msp430fr235x_euscib0_i2c_11.c"****
    //
    //                                /|\  /|\
    //               MSP430FR2355      10k  10k     MSP430FR2355
    //                   slave         |    |        master
    //             -----------------   |    |   -----------------
    //            |     P1.2/UCB0SDA|<-|----|->|P1.2/UCB0SDA     |
    //            |                 |  |       |                 |
    //            |                 |  |       |                 |
    //            |     P1.3/UCB0SCL|<-|------>|P1.3/UCB0SCL     |
    //            |                 |          |             P1.0|--> LED
    //
    //   Cash Hao
    //   Texas Instruments Inc.
    //   November 2016
    //   Built with IAR Embedded Workbench v6.50.0 & Code Composer Studio v6.2.0
    //******************************************************************************
    #include <msp430.h>
    
    volatile unsigned char RXData;
    
    int main(void)
    {
        WDTCTL = WDTPW | WDTHOLD;
    
        // Configure GPIO
        P1OUT &= ~BIT0;                         // Clear P1.0 output latch
        P1DIR |= BIT0;                          // For LED
        P1SEL0 |= BIT2 | BIT3;                  // I2C pins
    
        // Disable the GPIO power-on default high-impedance mode to activate
        // previously configured port settings
        PM5CTL0 &= ~LOCKLPM5;
    
        // Configure USCI_B0 for I2C mode
        UCB0CTLW0 |= UCSWRST;                   // Software reset enabled
        UCB0CTLW0 |= UCMODE_3 | UCMST | UCSYNC; // I2C mode, Master mode, sync
        UCB0CTLW1 |= UCASTP_2;                  // Automatic stop generated
                                                // after UCB0TBCNT is reached
        UCB0BRW = 0x0008;                       // baudrate = SMCLK / 8
        UCB0TBCNT = 0x0005;                     // number of bytes to be received
        UCB0I2CSA = 0x0048;                     // Slave address
        UCB0CTL1 &= ~UCSWRST;
        UCB0IE |= UCRXIE | UCNACKIE | UCBCNTIE;
    
        while (1)
        {
            __delay_cycles(2000);
            while (UCB0CTL1 & UCTXSTP);         // Ensure stop condition got sent
            UCB0CTL1 |= UCTXSTT;                // I2C start condition
    
            __bis_SR_register(LPM0_bits|GIE);   // Enter LPM0 w/ interrupt
        }
    }
    
    #if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
    #pragma vector = USCI_B0_VECTOR
    __interrupt void USCIB0_ISR(void)
    #elif defined(__GNUC__)
    void __attribute__ ((interrupt(USCI_B0_VECTOR))) USCIB0_ISR (void)
    #else
    #error Compiler not supported!
    #endif
    {
      switch(__even_in_range(UCB0IV, USCI_I2C_UCBIT9IFG))
      {
        case USCI_NONE: break;                  // Vector 0: No interrupts
        case USCI_I2C_UCALIFG: break;           // Vector 2: ALIFG
        case USCI_I2C_UCNACKIFG:                // Vector 4: NACKIFG
          UCB0CTL1 |= UCTXSTT;                  // I2C start condition
          break;
        case USCI_I2C_UCSTTIFG: break;          // Vector 6: STTIFG
        case USCI_I2C_UCSTPIFG: break;          // Vector 8: STPIFG
        case USCI_I2C_UCRXIFG3: break;          // Vector 10: RXIFG3
        case USCI_I2C_UCTXIFG3: break;          // Vector 14: TXIFG3
        case USCI_I2C_UCRXIFG2: break;          // Vector 16: RXIFG2
        case USCI_I2C_UCTXIFG2: break;          // Vector 18: TXIFG2
        case USCI_I2C_UCRXIFG1: break;          // Vector 20: RXIFG1
        case USCI_I2C_UCTXIFG1: break;          // Vector 22: TXIFG1
        case USCI_I2C_UCRXIFG0:                 // Vector 24: RXIFG0
          RXData = UCB0RXBUF;                   // Get RX data
          __bic_SR_register_on_exit(LPM0_bits); // Exit LPM0
          break;
        case USCI_I2C_UCTXIFG0: break;          // Vector 26: TXIFG0
        case USCI_I2C_UCBCNTIFG:                // Vector 28: BCNTIFG
          P1OUT ^= BIT0;                        // Toggle LED on P1.0
          break;
        case USCI_I2C_UCCLTOIFG: break;         // Vector 30: clock low timeout
        case USCI_I2C_UCBIT9IFG: break;         // Vector 32: 9th bit
        default: break;
      }
    }
    

    msp430fr235x_euscib0_i2c_11.c
    /* --COPYRIGHT--,BSD_EX
     * Copyright (c) 2016, Texas Instruments Incorporated
     * All rights reserved.
     *
     * Redistribution and use in source and binary forms, with or without
     * modification, are permitted provided that the following conditions
     * are met:
     *
     * *  Redistributions of source code must retain the above copyright
     *    notice, this list of conditions and the following disclaimer.
     *
     * *  Redistributions in binary form must reproduce the above copyright
     *    notice, this list of conditions and the following disclaimer in the
     *    documentation and/or other materials provided with the distribution.
     *
     * *  Neither the name of Texas Instruments Incorporated nor the names of
     *    its contributors may be used to endorse or promote products derived
     *    from this software without specific prior written permission.
     *
     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     *
     *******************************************************************************
     *
     *                       MSP430 CODE EXAMPLE DISCLAIMER
     *
     * MSP430 code examples are self-contained low-level programs that typically
     * demonstrate a single peripheral function or device feature in a highly
     * concise manner. For this the code may rely on the device's power-on default
     * register values and settings such as the clock configuration and care must
     * be taken when combining code from several examples to avoid potential side
     * effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
     * for an API functional library-approach to peripheral configuration.
     *
     * --/COPYRIGHT--*/
    //******************************************************************************
    //  MSP430FR235x Demo - eUSCI_B0 I2C Slave TX multiple bytes to MSP430 Master
    //
    //  Description: This demo connects two MSP430's via the I2C bus. The master
    //  reads from the slave. This is the SLAVE code. The TX data begins at 0
    //  and is incremented each time it is sent. A stop condition
    //  is used as a trigger to initialize the outgoing data.
    //  The USCI_B0 TX interrupt is used to know
    //  when to TX.
    //  ACLK = default REFO ~32768Hz, MCLK = SMCLK = default DCODIV ~1MHz.
    //
    //    *****used with "msp430fr235x_euscib0_i2c_10.c"****
    //
    //                                /|\  /|\
    //               MSP430FR2355      10k  10k     MSP430FR2355
    //                   slave         |    |        master
    //             -----------------   |    |   -----------------
    //            |     P1.2/UCB0SDA|<-|----|->|P1.2/UCB0SDA     |
    //            |                 |  |       |                 |
    //            |                 |  |       |                 |
    //            |     P1.3/UCB0SCL|<-|------>|P1.3/UCB0SCL     |
    //            |                 |          |                 |
    //
    //   Cash Hao
    //   Texas Instruments Inc.
    //   November 2016
    //   Built with IAR Embedded Workbench v6.50.0 & Code Composer Studio v6.2.0
    //******************************************************************************
    #include <msp430.h>
    
    volatile unsigned char TXData;
    
    int main(void)
    {
      WDTCTL = WDTPW | WDTHOLD;
    
      // Configure GPIO
      P1SEL0 |= BIT2 | BIT3;                    // I2C pins
    
      // Disable the GPIO power-on default high-impedance mode to activate
      // previously configured port settings
      PM5CTL0 &= ~LOCKLPM5;
    
      // Configure USCI_B0 for I2C mode
      UCB0CTLW0 = UCSWRST;                      // Software reset enabled
      UCB0CTLW0 |= UCMODE_3 | UCSYNC;           // I2C mode, sync mode
      UCB0I2COA0 = 0x48 | UCOAEN;               // own address is 0x48 + enable
      UCB0CTLW0 &= ~UCSWRST;                    // clear reset register
      UCB0IE |= UCTXIE0 | UCSTPIE;              // transmit,stop interrupt enable
    
        __bis_SR_register(LPM0_bits | GIE);     // Enter LPM0 w/ interrupts
        __no_operation();
    }
    
    #if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
    #pragma vector = USCI_B0_VECTOR
    __interrupt void USCIB0_ISR(void)
    #elif defined(__GNUC__)
    void __attribute__ ((interrupt(USCI_B0_VECTOR))) USCIB0_ISR (void)
    #else
    #error Compiler not supported!
    #endif
    {
      switch(__even_in_range(UCB0IV, USCI_I2C_UCBIT9IFG))
      {
        case USCI_NONE: break;                  // Vector 0: No interrupts
        case USCI_I2C_UCALIFG: break;           // Vector 2: ALIFG
        case USCI_I2C_UCNACKIFG: break;         // Vector 4: NACKIFG
        case USCI_I2C_UCSTTIFG: break;          // Vector 6: STTIFG
        case USCI_I2C_UCSTPIFG:                 // Vector 8: STPIFG
          TXData = 0;
          UCB0IFG &= ~UCSTPIFG;                 // Clear stop condition int flag
          break;
        case USCI_I2C_UCRXIFG3: break;          // Vector 10: RXIFG3
        case USCI_I2C_UCTXIFG3: break;          // Vector 14: TXIFG3
        case USCI_I2C_UCRXIFG2: break;          // Vector 16: RXIFG2
        case USCI_I2C_UCTXIFG2: break;          // Vector 18: TXIFG2
        case USCI_I2C_UCRXIFG1: break;          // Vector 20: RXIFG1
        case USCI_I2C_UCTXIFG1: break;          // Vector 22: TXIFG1
        case USCI_I2C_UCRXIFG0: break;          // Vector 24: RXIFG0
        case USCI_I2C_UCTXIFG0:
           UCB0TXBUF = TXData++;
           break;                               // Vector 26: TXIFG0
        case USCI_I2C_UCBCNTIFG: break;         // Vector 28: BCNTIFG
        case USCI_I2C_UCCLTOIFG: break;         // Vector 30: clock low timeout
        case USCI_I2C_UCBIT9IFG: break;         // Vector 32: 9th bit
        default: break;
      }
    }
    
    msp430fr235x_euscib0_i2c_15.c
    /* --COPYRIGHT--,BSD_EX
     * Copyright (c) 2016, Texas Instruments Incorporated
     * All rights reserved.
     *
     * Redistribution and use in source and binary forms, with or without
     * modification, are permitted provided that the following conditions
     * are met:
     *
     * *  Redistributions of source code must retain the above copyright
     *    notice, this list of conditions and the following disclaimer.
     *
     * *  Redistributions in binary form must reproduce the above copyright
     *    notice, this list of conditions and the following disclaimer in the
     *    documentation and/or other materials provided with the distribution.
     *
     * *  Neither the name of Texas Instruments Incorporated nor the names of
     *    its contributors may be used to endorse or promote products derived
     *    from this software without specific prior written permission.
     *
     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     *
     *******************************************************************************
     *
     *                       MSP430 CODE EXAMPLE DISCLAIMER
     *
     * MSP430 code examples are self-contained low-level programs that typically
     * demonstrate a single peripheral function or device feature in a highly
     * concise manner. For this the code may rely on the device's power-on default
     * register values and settings such as the clock configuration and care must
     * be taken when combining code from several examples to avoid potential side
     * effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
     * for an API functional library-approach to peripheral configuration.
     *
     * --/COPYRIGHT--*/
    //******************************************************************************
    //  MSP430FR235x Demo - eUSCI_B0 I2C Master TX bytes to Multiple Slaves
    //
    //  Description: This demo connects two MSP430's via the I2C bus.
    //  The master transmits to 4 different I2C slave addresses 0x0A,0x0B,0x0C&0x0D.
    //  Each slave address has a specific related data in the array TXData[].
    //  At the end of four I2C transactions the slave address rolls over and begins
    //  again at 0x0A.
    //  ACLK = REFO = 32768Hz, MCLK = SMCLK = default DCO = ~1MHz
    //  Use with msp430fr235x_uscib0_i2c_16.c
    //
    //                                /|\  /|\
    //               MSP430FR2355      10k  10k     MSP430FR2355
    //                   slave         |    |        master
    //             -----------------   |    |   -----------------
    //            |     P1.2/UCB0SDA|<-|----|->|P1.2/UCB0SDA     |
    //            |                 |  |       |                 |
    //            |                 |  |       |                 |
    //            |     P1.3/UCB0SCL|<-|------>|P1.3/UCB0SCL     |
    //            |                 |          |                 |
    //
    //   Cash Hao
    //   Texas Instruments Inc.
    //   November 2016
    //   Built with IAR Embedded Workbench v6.50.0 & Code Composer Studio v6.2.0
    //******************************************************************************
    
    #include <msp430.h>
    
    unsigned char TXData[]= {0xA1,0xB1,0xC1,0xD1};        // Pointer to TX data
    unsigned char SlaveAddress[]= {0x0A,0x0B,0x0C,0x0D};
    unsigned char TXByteCtr;
    unsigned char SlaveFlag = 0;
    
    int main(void)
    {
        WDTCTL = WDTPW | WDTHOLD;                         // Stop watchdog timer
    
        // Configure Pins for I2C
        P1SEL0 |= BIT2 | BIT3;                            // I2C pins
    
        // Disable the GPIO power-on default high-impedance mode
        // to activate previously configured port settings
        PM5CTL0 &= ~LOCKLPM5;
    
        // Configure USCI_B0 for I2C mode
        UCB0CTLW0 |= UCSWRST;                             // put eUSCI_B in reset state
        UCB0CTLW0 |= UCMODE_3 | UCMST;                    // I2C master mode, SMCLK
        UCB0BRW = 0x8;                                    // baudrate = SMCLK / 8
        UCB0CTLW0 &=~ UCSWRST;                            // clear reset register
        UCB0IE |= UCTXIE0 | UCNACKIE;                     // transmit and NACK interrupt enable
    
        SlaveFlag =0;
    
        while(1)
        {
        __delay_cycles(1000);                             // Delay between transmissions
        UCB0I2CSA = SlaveAddress[SlaveFlag];              // configure slave address
        TXByteCtr = 1;                                    // Load TX byte counter
        while (UCB0CTLW0 & UCTXSTP);                      // Ensure stop condition got sent
        UCB0CTLW0 |= UCTR | UCTXSTT;                      // I2C TX, start condition
    
        __bis_SR_register(LPM0_bits | GIE);               // Enter LPM0 w/ interrupts
                                                          // Remain in LPM0 until all data
                                                          // is TX'd
        // Change Slave address
        SlaveFlag++;
        if (SlaveFlag>3)                                  // Roll over slave address
          {
            SlaveFlag =0;
          }
        }
    
    }
    
    #if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
    #pragma vector = USCI_B0_VECTOR
    __interrupt void USCIB0_ISR(void)
    #elif defined(__GNUC__)
    void __attribute__ ((interrupt(USCI_B0_VECTOR))) USCIB0_ISR (void)
    #else
    #error Compiler not supported!
    #endif
    {
      switch(__even_in_range(UCB0IV,USCI_I2C_UCBIT9IFG))
      {
            case USCI_NONE: break;                        // Vector 0: No interrupts break;
            case USCI_I2C_UCALIFG: break;
            case USCI_I2C_UCNACKIFG:
                UCB0CTL1 |= UCTXSTT;                      //resend start if NACK
              break;                                      // Vector 4: NACKIFG break;
            case USCI_I2C_UCSTTIFG: break;                // Vector 6: STTIFG break;
            case USCI_I2C_UCSTPIFG: break;                // Vector 8: STPIFG break;
            case USCI_I2C_UCRXIFG3: break;                // Vector 10: RXIFG3 break;
            case USCI_I2C_UCTXIFG3: break;                // Vector 14: TXIFG3 break;
            case USCI_I2C_UCRXIFG2: break;                // Vector 16: RXIFG2 break;
            case USCI_I2C_UCTXIFG2: break;                // Vector 18: TXIFG2 break;
            case USCI_I2C_UCRXIFG1: break;                // Vector 20: RXIFG1 break;
            case USCI_I2C_UCTXIFG1: break;                // Vector 22: TXIFG1 break;
            case USCI_I2C_UCRXIFG0: break;                // Vector 24: RXIFG0 break;
            case USCI_I2C_UCTXIFG0:
            if (TXByteCtr)                                // Check TX byte counter
               {
                UCB0TXBUF = TXData[SlaveFlag];            // Load TX buffer
                TXByteCtr--;                              // Decrement TX byte counter
               }
            else
               {
                UCB0CTLW0 |= UCTXSTP;                     // I2C stop condition
                UCB0IFG &= ~UCTXIFG;                      // Clear USCI_B0 TX int flag
                __bic_SR_register_on_exit(LPM0_bits);     // Exit LPM0
               }
              break;                                      // Vector 26: TXIFG0 break;
            case USCI_I2C_UCBCNTIFG: break;               // Vector 28: BCNTIFG
            case USCI_I2C_UCCLTOIFG: break;               // Vector 30: clock low timeout
            case USCI_I2C_UCBIT9IFG: break;               // Vector 32: 9th bit
            default: break;
      }
    }
    

    msp430fr235x_euscib0_i2c_16.c
    /* --COPYRIGHT--,BSD_EX
     * Copyright (c) 2016, Texas Instruments Incorporated
     * All rights reserved.
     *
     * Redistribution and use in source and binary forms, with or without
     * modification, are permitted provided that the following conditions
     * are met:
     *
     * *  Redistributions of source code must retain the above copyright
     *    notice, this list of conditions and the following disclaimer.
     *
     * *  Redistributions in binary form must reproduce the above copyright
     *    notice, this list of conditions and the following disclaimer in the
     *    documentation and/or other materials provided with the distribution.
     *
     * *  Neither the name of Texas Instruments Incorporated nor the names of
     *    its contributors may be used to endorse or promote products derived
     *    from this software without specific prior written permission.
     *
     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     *
     *******************************************************************************
     *
     *                       MSP430 CODE EXAMPLE DISCLAIMER
     *
     * MSP430 code examples are self-contained low-level programs that typically
     * demonstrate a single peripheral function or device feature in a highly
     * concise manner. For this the code may rely on the device's power-on default
     * register values and settings such as the clock configuration and care must
     * be taken when combining code from several examples to avoid potential side
     * effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
     * for an API functional library-approach to peripheral configuration.
     *
     * --/COPYRIGHT--*/
    //******************************************************************************
    //  MSP430FR235x Demo - eUSCI_B0 I2C 4 Hardware I2C slaves
    //
    //  Description: This demo connects two MSP430's via the I2C bus.
    //  This code configures the MSP430 USCI to be addressed as 4 independent I2C
    //  slaves. Each slave has its own interrupt flag and data variable to store
    //  incoming data.
    //  Use with msp430fr235x_uscib0_i2c_15.c
    //  ACLK = REFO = 32768Hz, MCLK = SMCLK = default  = DCO = ~1MHz
    //
    //                                /|\  /|\
    //               MSP430FR2355      10k  10k     MSP430FR2355
    //                   slave         |    |        master
    //             -----------------   |    |   -----------------
    //            |     P1.2/UCB0SDA|<-|----|->|P1.2/UCB0SDA     |
    //            |                 |  |       |                 |
    //            |                 |  |       |                 |
    //            |     P1.3/UCB0SCL|<-|------>|P1.3/UCB0SCL     |
    //            |                 |          |                 |
    //
    //   Cash Hao
    //   Texas Instruments Inc.
    //   November 2016
    //   Built with IAR Embedded Workbench v6.50.0 & Code Composer Studio v6.2.0
    //******************************************************************************
    
    #include <msp430.h>
    
    unsigned char RXData0=0;
    unsigned char RXData1=0;
    unsigned char RXData2=0;
    unsigned char RXData3=0;
    
    int main(void)
    {
        WDTCTL = WDTPW | WDTHOLD;                             // Stop watchdog timer
    
        // Configure Pins for I2C
        P1SEL0 |= BIT2 | BIT3;                                // I2C pins
    
        // Disable the GPIO power-on default high-impedance mode
        // to activate previously configured port settings
        PM5CTL0 &= ~LOCKLPM5;
    
        // Configure USCI_B0 for I2C mode
        UCB0CTLW0 |= UCSWRST;                                 //Software reset enabled
        UCB0CTLW0 |= UCMODE_3;                                //I2C slave mode, SMCLK
        UCB0I2COA0 = 0x0A | UCOAEN;                           //SLAVE0 own address is 0x0A| enable
        UCB0I2COA1 = 0x0B | UCOAEN;                           //SLAVE1 own address is 0x0B| enable
        UCB0I2COA2 = 0x0C | UCOAEN;                           //SLAVE2 own address is 0x0C| enable
        UCB0I2COA3 = 0x0D | UCOAEN;                           //SLAVE3 own address is 0x0D| enable
        UCB0CTLW0 &=~UCSWRST;                                 //clear reset register
    
        UCB0IE |=  UCRXIE0 | UCRXIE1| UCRXIE2 | UCRXIE3;      //receive interrupt enable
    
        __bis_SR_register(LPM0_bits | GIE);                   // Enter LPM0 w/ interrupts
        __no_operation();
    }
    
    #if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
    #pragma vector = USCI_B0_VECTOR
    __interrupt void USCIB0_ISR(void)
    #elif defined(__GNUC__)
    void __attribute__ ((interrupt(USCI_B0_VECTOR))) USCIB0_ISR (void)
    #else
    #error Compiler not supported!
    #endif
    {
       switch(__even_in_range(UCB0IV,USCI_I2C_UCBIT9IFG))
        {
          case USCI_NONE: break;                                   // Vector 0: No interrupts break;
          case USCI_I2C_UCALIFG: break;                                   // Vector 2: ALIFG break;
          case USCI_I2C_UCNACKIFG: break;                                   // Vector 4: NACKIFG break;
          case USCI_I2C_UCSTTIFG: break;                                   // Vector 6: STTIFG break;
          case USCI_I2C_UCSTPIFG: break;                                   // Vector 8: STPIFG break;
          case USCI_I2C_UCRXIFG3:                                          // SLAVE3
            RXData3 = UCB0RXBUF;
            break;                                            // Vector 10: RXIFG3 break;
          case USCI_I2C_UCTXIFG3: break;                                   // Vector 14: TXIFG3 break;
          case USCI_I2C_UCRXIFG2:                                          // SLAVE2
            RXData2 = UCB0RXBUF;
            break;                                            // Vector 16: RXIFG2 break;
          case USCI_I2C_UCTXIFG2: break;                                   // Vector 18: TXIFG2 break;
          case USCI_I2C_UCRXIFG1:                                          // SLAVE1
            RXData1 = UCB0RXBUF;
            break;                                            // Vector 20: RXIFG1 break;
          case USCI_I2C_UCTXIFG1: break;                                   // Vector 22: TXIFG1 break;
          case USCI_I2C_UCRXIFG0:                                          // SLAVE0
            RXData0 = UCB0RXBUF;                              // Get RX data
            break;                                            // Vector 24: RXIFG0 break;
          case USCI_I2C_UCTXIFG0: break;                                   // Vector 26: TXIFG0 break;
          case USCI_I2C_UCBCNTIFG: break;                                   // Vector 28: BCNTIFG break;
          case USCI_I2C_UCCLTOIFG: break;                                   // Vector 30: clock low timeout break;
          case USCI_I2C_UCBIT9IFG: break;                                   // Vector 32: 9th bit break;
          default: break;
        }
    
    }
    

  • 你好,这个我有这方面的例程,主机和从机对应的只有单发,单收,(我都调试了,没有出现任何问题)我想要的是主机能发能收,从机也能发也能收,我调试的就是您给的这个例程,做从机,自己模拟IIC master对他进行收发会出现丢字节的现象,

  • 你好,我想用从机接收完数据产生ACK应答或者NACK应答,不知怎么配置下?我这两天测试自己模拟主机与咱们官方提供的从机例程进行通讯会出现丢字节的现象,并且还是特别有规律,用咱们硬件单独提供的master例程去测试硬件slave例程没有出现任何问题,master例程没有是不发送ACK应答,有点想不通是哪里出现的问题
  • 你好,我想用从机接收完数据产生ACK应答或者NACK应答,不知怎么配置下?我这两天测试自己模拟主机与咱们官方提供的从机例程进行通讯会出现丢字节的现象,并且还是特别有规律,用咱们硬件单独提供的master例程去测试硬件slave例程没有出现任何问题,master例程没有是不发送ACK应答,有点想不通是哪里出现的问题