最近在使用CCS8编译MSP432p401r的程序,编译没有报错,但是连接msp432p401r launchpad板调试时弹出如下图所示问题。
之前用IAR编译自己写的程序没有问题,而且能够连接msp432p401r launchpad板调试。
换了CCS8调试时就出现了问题。我看用的cmd文件也没有什么问题,下面是CCS8编译时用的cmd文件
--retain=flashMailbox
MEMORY
{
MAIN (RX) : origin = 0x00000000, length = 0x00040000
INFO (RX) : origin = 0x00200000, length = 0x00004000
#ifdef __TI_COMPILER_VERSION__
#if __TI_COMPILER_VERSION__ >= 15009000
ALIAS
{
SRAM_CODE (RWX): origin = 0x01000000
SRAM_DATA (RW) : origin = 0x20000000
} length = 0x00010000
#else
/* Hint: If the user wants to use ram functions, please observe that SRAM_CODE */
/* and SRAM_DATA memory areas are overlapping. You need to take measures to separate */
/* data from code in RAM. This is only valid for Compiler version earlier than 15.09.0.STS.*/
SRAM_CODE (RWX): origin = 0x01000000, length = 0x00010000
SRAM_DATA (RW) : origin = 0x20000000, length = 0x00010000
#endif
#endif
}
/* The following command line options are set as part of the CCS project. */
/* If you are building using the command line, or for some reason want to */
/* define them here, you can uncomment and modify these lines as needed. */
/* If you are using CCS for building, it is probably better to make any such */
/* modifications in your CCS project and leave this file alone. */
/* */
/* A heap size of 1024 bytes is recommended when you plan to use printf() */
/* for debug output to the console window. */
/* */
/* --heap_size=1024 */
/* --stack_size=512 */
/* --library=rtsv7M4_T_le_eabi.lib */
/* Section allocation in memory */
SECTIONS
{
.intvecs: > 0x00000000
.text : > MAIN
.const : > MAIN
.cinit : > MAIN
.pinit : > MAIN
.init_array : > MAIN
.binit : {} > MAIN
/* The following sections show the usage of the INFO flash memory */
/* INFO flash memory is intended to be used for the following */
/* device specific purposes: */
/* Flash mailbox for device security operations */
.flashMailbox : > 0x00200000
/* TLV table for device identification and characterization */
.tlvTable : > 0x00201000
/* BSL area for device bootstrap loader */
.bslArea : > 0x00202000
.vtable : > 0x20000000
.data : > SRAM_DATA
.bss : > SRAM_DATA
.sysmem : > SRAM_DATA
.stack : > SRAM_DATA (HIGH)
#ifdef __TI_COMPILER_VERSION__
#if __TI_COMPILER_VERSION__ >= 15009000
.TI.ramfunc : {} load=MAIN, run=SRAM_CODE, table(BINIT)
#endif
#endif
}
/* Symbolic definition of the WDTCTL register for RTS */
WDTCTL_SYM = 0x4000480C;