TLV320AIC3254左右声道和MICBIAS电源设置问题

Hi,TI社区员工：

1、目前使用TLV320AIC3254 codec, 在linux下环境下I2S接口，测试音频输出和输入功能，LOR LOL    IN3L  IN3R， 右声道的声音可以正常播放，和录音，但是左声道playback无输出，录音也无法录音，

2、现在MICBIAS使用内部供电输出AVDD,  但在驱动中设置了MICBIAS powerup状态，系统启动后，MICBIAS的电源使终为 down状态，即P1_R51使终为 0x20 而非0x60

下面是linux中驱动的寄存器设置, 关于播放和录音，我检查了DAC的电源，增益，声音大小，静音状态等等， 使用立体声的音频源使终只有右声道 有声音，左声道元输出

请问TI社工人员和其它网友， 可有思路！！！！！

谢谢！！！

static int aic32x4_probe(struct snd_soc_codec *codec)
{
	struct aic32x4_priv *aic32x4 = snd_soc_codec_get_drvdata(codec);
	u32 tmp_reg;

	printk(KERN_ERR "aic32x4: =================probe===============1.1");	

	if (gpio_is_valid(aic32x4->rstn_gpio)) {
		ndelay(10);
		gpio_set_value(aic32x4->rstn_gpio, 1);
	}

	snd_soc_write(codec, AIC32X4_RESET, 0x01);

	/* Power platform configuration */
	//if (aic32x4->power_cfg & AIC32X4_PWR_MICBIAS_2075_LDOIN) {
		snd_soc_write(codec, AIC32X4_MICBIAS, AIC32X4_MICBIAS_LDOIN |
						      AIC32X4_MICBIAS_2075V);
	//}
	if (aic32x4->power_cfg & AIC32X4_PWR_AVDD_DVDD_WEAK_DISABLE)
		snd_soc_write(codec, AIC32X4_PWRCFG, AIC32X4_AVDDWEAKDISABLE);

	tmp_reg = (aic32x4->power_cfg & AIC32X4_PWR_AIC32X4_LDO_ENABLE) ?
			AIC32X4_LDOCTLEN : 0;
	snd_soc_write(codec, AIC32X4_LDOCTL, tmp_reg);

	tmp_reg = snd_soc_read(codec, AIC32X4_CMMODE);
	if (aic32x4->power_cfg & AIC32X4_PWR_CMMODE_LDOIN_RANGE_18_36)
		tmp_reg |= AIC32X4_LDOIN_18_36;
	if (aic32x4->power_cfg & AIC32X4_PWR_CMMODE_HP_LDOIN_POWERED)
		tmp_reg |= AIC32X4_LDOIN2HP;
	snd_soc_write(codec, AIC32X4_CMMODE, tmp_reg);

	/* Mic PGA routing */
	if (aic32x4->micpga_routing & AIC32X4_MICPGA_ROUTE_LMIC_IN2R_10K)
		snd_soc_write(codec, AIC32X4_LMICPGANIN,
				AIC32X4_LMICPGANIN_IN2R_10K);
	else
		snd_soc_write(codec, AIC32X4_LMICPGANIN,
				AIC32X4_LMICPGANIN_CM1L_10K);
	if (aic32x4->micpga_routing & AIC32X4_MICPGA_ROUTE_RMIC_IN1L_10K)
		snd_soc_write(codec, AIC32X4_RMICPGANIN,
				AIC32X4_RMICPGANIN_IN1L_10K);
	else
		snd_soc_write(codec, AIC32X4_RMICPGANIN,
				AIC32X4_RMICPGANIN_CM1R_10K);

	/*
	 * Workaround: for an unknown reason, the ADC needs to be powered up
	 * and down for the first capture to work properly. It seems related to
	 * a HW BUG or some kind of behavior not documented in the datasheet.
	 */
	tmp_reg = snd_soc_read(codec, AIC32X4_ADCSETUP);
	snd_soc_write(codec, AIC32X4_ADCSETUP, tmp_reg |
				AIC32X4_LADC_EN | AIC32X4_RADC_EN);
	snd_soc_write(codec, AIC32X4_ADCSETUP, tmp_reg);

#if 1 //crengby lee change 2019.2.20 from nvidia forums by igal
	snd_soc_write(codec, AIC32X4_CLKMUX, 	0x07);	
	snd_soc_write(codec, AIC32X4_PLLPR, 	0x92);
	snd_soc_write(codec, AIC32X4_PLLJ, 		0x20);	
	snd_soc_write(codec, AIC32X4_PLLDMSB, 	0x00);	
	snd_soc_write(codec, AIC32X4_PLLDLSB, 	0x00);	
		
	snd_soc_write(codec, AIC32X4_NADC, 		0x84);
	snd_soc_write(codec, AIC32X4_MADC, 		0x84);
	
	snd_soc_write(codec, AIC32X4_AOSR, 		0x80);

	snd_soc_write(codec, AIC32X4_NDAC, 		0x84);
	snd_soc_write(codec, AIC32X4_MDAC, 		0x84);
	
	// set D-OSR to 128
	snd_soc_write(codec, AIC32X4_DOSRMSB,	0x00);
	snd_soc_write(codec, AIC32X4_DOSRLSB,	0x80);

	snd_soc_write(codec, AIC32X4_DACSETUP,	0xD4);
		
	snd_soc_write(codec, AIC32X4_LOLROUTE,	0x08); // 0x00 - no sound
	snd_soc_write(codec, AIC32X4_LORROUTE,	0x08); // 0x00 - no sound
		

	// IN3L is routed to Left MICPGA with 10k resistance
	snd_soc_write(codec, AIC32X4_LMICPGAPIN,	0x04);
	// CM is routed to Left MICPGA with 10k resistance
	snd_soc_write(codec, AIC32X4_LMICPGANIN,	0x40);
	// IN3R is routed to Right MICPGA with 10k resistance
	snd_soc_write(codec, AIC32X4_RMICPGAPIN,	0x04);
	// CM is routed to Right MICPGA with 10k resistance
	snd_soc_write(codec, AIC32X4_RMICPGANIN,	0x40);
	// Unmute Right MICPGA, Gain selection of 6dB to
	// make channel gain 0dB, since 20K input	
	//impedance is used single ended
	//w 30 3c 0c
	snd_soc_write(codec, AIC32X4_LMICPGAVOL,	0x0c);
	snd_soc_write(codec, AIC32X4_RMICPGAVOL,	0x0c);

	// Powr up Left and Right ADC
	snd_soc_write(codec, AIC32X4_ADCSETUP, 0xC0);
	// Umute left and right ADC
	snd_soc_write(codec, AIC32X4_ADCFGA, 0x00);
	
	//snd_soc_write(codec, AIC32X4_IFACE3, 0x00);
	// taken from scripts...
	// Disable weak connection of AVDD with DVDD
	snd_soc_write(codec, AIC32X4_PWRCFG, 0x08);

	// Enable Master Analog Power Control
	snd_soc_write(codec, AIC32X4_LDOCTL, 0x01); // 0x08 - disables audio

	// powerup micbias avdd powerup micbias is 2V
	//snd_soc_write(codec, AIC32X4_MICBIAS,	0x60);	

	// Set the REF charging time to 40ms
	snd_soc_write(codec, 0xFB, 0x01);
	
	// Input Common Mode
	snd_soc_write(codec, AIC32X4_CMMODE, 0x00);
	
	// Mute Mixer Amplifier Left & Right
	snd_soc_write(codec, 0x98, 0x28);			//p1_r18 p1_r19写入0x28好像是mute状态
	snd_soc_write(codec, 0x99, 0x28);
	
	snd_soc_write(codec, AIC32X4_OUTPWRCTL,	0x0C);
#endif
	return 0;
}