音频论坛 - 最近的话题

TAS5805M: TAS5805M: PurePath Console 3 Access Denied – Request Manual Approval

Bin Chan — Fri, 30 Oct 2026 03:00:23 GMT

Part Number: TAS5805M

Hello TI Audio Support Team,

We are developing a commercial embedded audio product based on the TAS5805M amplifier and Rockchip RK3576 processor.

My request for PurePath Console 3 (PPC3) access was denied.

I need PPC3 and the TAS5805M device application to configure the amplifier in PBTL mode for a single speaker and generate the DSP configuration for our Linux-based product.

Could you please manually review my access request and grant access to both PPC3 and the TAS5805M device application?

I am based in China. Please also clarify whether any geographical restrictions apply to software access.

Thank you for your assistance.

TAS5825M: 我希望獲得TAS5825M在PPC3的App

Jaff lee — Fri, 30 Oct 2026 00:42:25 GMT

Part Number: TAS5825M

我司目前已經有在使用TAS5825M. 之前的DSP的調整,是使用同事的賬號登錄PPC3並下載TAS5825M APP使用.

現在我希望用我自己的賬號在我自己的電腦登錄PPC3並下載TAS5825M APP.

問題:

1.我在TAS5825MEVM的界面沒有找到TAS5825M APP的申請入口.但是在TAS5828的頁面我可以找到TAS5828M-PPC3-SW的申請入口.

2.我向AI咨詢如何申請TAS5825M APP,AI給了我一個申請入口.我在此入口申請TAS5825M-SW.但是被TI拒絕.

其他資訊:
我已經安裝了PPC3和PPC4.並且用我的賬號登錄.

我的TI賬號是:edll@fy.jazzhipster.com.tw

PCM3140-Q1: PCMD3140 — CH2 always exactly zero on PDMDIN1 pair decoding; PDMIN_CFG bit7 appears inert

Ning Chen — Thu, 29 Oct 2026 17:10:57 GMT

Part Number: PCM3140-Q1
Other Parts Discussed in Thread: PCMD3140

**Part & environment**

| Item | Detail |
|---|---|
| Part | PCMD3140 (TLV320ADC3140-compatible 4-ch PDM codec) |
| Marking / lot | [TO FILL: top marking + lot code] |
| Host | Actions ATS3085S; I2S RX slave, TDM4, 32-bit slots |
| Rates | FS 16 kHz; BCLK 2.048 MHz (128×FS); FSYNC = 1-BCLK-wide pulse (DSP_B style); PDMCLK 3.072 MHz (192×FS) |
| Supplies | AVDD = IOVDD = 1.8 V; AREG pin shorted to AVDD externally (SLEEP_CFG = 0x01, external AREG) |
| I2C | 7-bit 0x4E (write 0x9C); all writes verify by readback |

**Mic wiring (schematic description)**

System:

```
I2C (0x4E)
┌─────────┐ SCL/SDA ─────────────►┌───────────────┐
│ │ │ PCMD3140 │
│ ATS3085S│ BCLK 2.048 MHz ◄───│ SCLK (slave) │
│ I2SRX │ LRCLK 16 kHz pulse◄───│ FSYNC │
│ TDM4/32 │ data (4 slots) ◄───│ DOUT │
└─────────┘ │ │
│ GPO1 ─────────┼─► PDM_CLK 3.072 MHz → all mics
│ GPI1 (PDMDIN1)┼─◄ PDM_DAT0 air mic pair
│ GPI2 (PDMDIN2,┼─◄ PDM_DAT1 bone mic
│ pin 19) │ (MICBIAS muxed pad, via BIAS_CFG)
└───────────────┘
```

Mic module (5-pin connector CON7: VDD / PDM_CLK / PDM_DAT0 / PDM_DAT1 / GND;
L/R select strapped on-module, not routed through the connector):

```
VDD (VDMIC 1.8 V) ──┬─────────────┬─────────────┐
│ │ │
┌───┴──┐ ┌───┴──┐ ┌───┴──┐
PDM_CLK ───────►│ U12 │ │ U14 │ │ U15 │◄── PDM_CLK
(3.072 MHz) │ air │ │ air │ │ bone │
│SEL=GND│ │SEL=VDD│ │single│
└───┬──┘ └───┬──┘ └───┬──┘
│ │ │
▼ ▼ ▼
PDM_DAT0 (shared line, time-division) PDM_DAT1
U12 (L) drives the falling-edge half-cycle,
U14 (R) drives the rising-edge half-cycle (AAC datasheet)
```

- Air mics: 2× AAC SDM0502B-RLSJ261-W02 PDM mics sharing PDM_DAT0, complementary SEL strapping (L→GND, R→VDD)
- Bone-conduction mic: single PDM output on PDM_DAT1 (pin 19 MICBIAS/GPI2 muxed pad, switched to digital input via BIAS_CFG = 0x72)

**Register configuration (power-up sequence, matches datasheet example)**

| Addr | Register | Value | Note |
|---|---|---|---|
| 0x02 | SLEEP_CFG | 0x01 | wake + external AREG |
| 0x07 | ASI_CFG0 | 0x30 | TDM(DSP) format + 32-bit word |
| 0x08 | ASI_CFG1 | 0x00 | TX_OFFSET = 0 |
| 0x0B-0x0E | ASI_CH1-4 | 00/01/02/03 | slots 0-3 ← channels 1-4 |
| 0x1F | PDMCLK_CFG | 0x40 | PDMCLK 3.072 MHz |
| 0x20 | PDMIN_CFG | 0x00 / 0x80 / 0x40 | all three tested (see test 5) |
| 0x22 | GPO_CFG0 | 0x41 | GPO1 = PDMCLK out, push-pull |
| 0x2B | GPI_CFG0 | 0x45 | GPI1=PDMDIN1, GPI2=PDMDIN2 |
| 0x3B | BIAS_CFG | 0x72 | MICBIAS pad → GPI2 digital input, VREF 1.375 V |
| 0x41/0x46/0x4B | CH2/3/4_CFG0 | 0x40 | digital PDM input select |
| 0x73 | IN_CH_EN | 0xF0 | CH1-4 input enable |
| 0x74 | ASI_OUT_CH_EN | 0xF0 | CH1-4 ASI output enable |
| 0x75 | PWR_CFG | 0x60 | ADC+PLL power-up (written last) |

Status reads normal: ASI_STS (0x15) = 0x16 (clock locked, 16 kHz / ratio 128), DEV_STS1 (0x77) = 0xE0 (active).

**Symptom (default routing, GPI_CFG0 = 0x45)**

- CH1: live audio
- CH2: **always exactly 0x0000** (long-run statistics: min = max = 0; not noise, not DC offset)
- CH3 ≡ CH4: bitwise-identical bone mic data

**Experiments**

| # | Test | Result | Interpretation |
|---|---|---|---|
| 1 | Default config, statistics | CH1 live, CH2 exactly 0, CH3≡CH4 | symptom |
| 2 | Blow at either air mic (neither covered) | CH1 rises both times | first read as "mixing"; later corrected to acoustic crosstalk between adjacent mics by tests 3/4 |
| 3 | Cover mic#1, blow mic#2 | CH1 responds | CH1 receives mic#2 |
| 4 | Cover mic#2, blow mic#1 | CH1 silent | **CH1 receives exactly one mic — no mixing** |
| 5 | PDMIN_CFG = 0x00 / 0x80 / 0x40 | readback OK, **zero behavioral change** | datasheet §7.6.1.17 says bit7 swaps the CH1/CH2 latching edges — bit7 has no effect |
| 6 | **GPI swap**: GPI_CFG0 0x45→0x54 (DAT0 pad → CH3/CH4 decoders; DAT1 pad → CH1/CH2) | **CH3, CH4 = the two air mics, independently confirmed by cover-and-blow tests**; CH1 = bone mic (follows tapping); **CH2 still exactly 0** | (a) the air pair is a healthy complementary pair — both phases of DAT0 carry independent data; (b) the DIN2 (CH3/CH4) engine splits phases correctly; (c) **CH2 stays zero regardless of which pad feeds the DIN1 engine** |
| 7 | Earlier removal tests: desolder either air mic | "CH1 still shows values" (no blow-response verification at the time) | believed to be charge-hold / clock-coupling artifacts on the floating half-cycle of the DAT0 net (single net; with one mic removed its phase is undriven) |

**Our suspicion**

1. The air mic pair and its complementary wiring are healthy (test 6);
2. The PDMDIN2 → CH3/CH4 decoding engine works correctly, one phase per channel (test 6);
3. The PDMDIN1 → CH1/CH2 engine is abnormal: CH1 decodes one phase correctly, but the **CH2 path is stuck at zero regardless of input line (test 6) and regardless of PDMIN_CFG (test 5)**;
4. PDMIN_CFG (0x20) bit7/bit6 are writable and read back, but show **no function** on this part, while the datasheet §7.6.1.17 documents bit7 as the CH1/CH2 edge swap.

We therefore suspect the PDMDIN1 second-channel (CH2) decimation path or its ASI output path is defective in this silicon, and the edge-select bits are trimmed/non-functional. Could you confirm whether this is a known erratum, and whether a recommended register configuration or a silicon fix exists?

**Questions**

1. Is "CH2 always zero on PDMDIN1" a known erratum? Any silicon revision dependence?
2. Does PDMIN_CFG (0x20) bit7 function on PCMD3140? If yes, are there write-timing requirements (e.g., must be written before power-up / in a specific state)? Our writes during init (before PWR_CFG) show no effect.
3. Besides IN_CH_EN / ASI_OUT_CH_EN / CH2_CFG0 / ASI_CH2, is any other register gating CH2?
4. Could you provide a reference register dump for "2 PDM mics on PDMDIN1 + 1 mic on PDMDIN2" for us to diff against?
5. Our production workaround: GPI_CFG0 = 0x54 (DAT0 pad decoded by CH3/CH4; DAT1 pad by CH1/CH2; CH1 = bone, CH3/CH4 = air pair, CH2 unused). Any concerns using this as the production configuration?
6. Is BIAS_CFG = 0x72 (MICBIAS pad as GPI2) the recommended way to use pin 19 as the second PDM input?
7. How do we identify the silicon revision from the marking / lot code, for RMA reference?

---

TAS5828M: TAS5828M PPC3 Custom Configuration – How to Set Device B I2C Address?

Jony Chin — Thu, 29 Oct 2026 09:51:41 GMT

Part Number: TAS5828M

Hi TI Team,

We are using PPC3 with TAS5828MEVM to configure two external TAS5828M devices on a customer board.

The customer system uses:

Device A: TAS5828M, I2C address C0, Stereo BTL for Tweeter
Device B: TAS5828M, I2C address C6, Mono PBTL for Woofer
Connection: PC → USB → TAS5828MEVM → I2C → Customer Board

The customer has already verified both TAS5828M devices individually.

When using two TAS5828MEVM boards separately, Device A and Device B can both communicate normally through I2C.

However, when using one TAS5828MEVM as the USB-to-I2C interface and selecting Custom Configuration in PPC3:

Device A works normally.
Device B reports:

“Communication to device B has failed. Device writes to Device B will not happen.”

Since both devices have already been verified individually, we would like to clarify the I2C address configuration in PPC3 Custom Configuration.

Could you please help confirm:

In TAS5828M PPC3 Custom Configuration, how are the I2C addresses for Device A and Device B assigned?
Can the following address combination be used in the same Custom Configuration?
- Device A = C0
- Device B = C6
If C0 + C6 is supported, where should the Device B I2C address be configured in PPC3?
Does using one TAS5828MEVM as the USB-to-I2C bridge for two external TAS5828M devices require any specific EVM jumper, PDN, or hardware setting?

The customer has also captured SDA/SCL waveforms. Both devices can communicate normally when tested individually.

Please advise the recommended PPC3 configuration for this dual-TAS5828M application.

Thanks.

PUREPATHSTUDIO: PUREPATHSTUDIO 在win11 能安装吗？

cheng wei — Wed, 28 Oct 2026 06:22:41 GMT

Part Number: PUREPATHSTUDIO

PUREPATHSTUDIO 在win11 能安装吗？

OPA2132: 提供焊接温度资料

May Huang — Thu, 15 Oct 2026 09:40:39 GMT

Part Number: OPA2132

dear TI'S

我们在网上没找到31221321R1F/ OPA2132UA/2K5的焊接温度资料。

请帮忙查并提供此料焊接最高温度规格并确认此物料的LOT No 是否标识在表面丝印上，怎么看这个物料是什么时候生产的，谢谢！

TXB0106: TXB0106电平转换信号不正常

qiu yueyang — Wed, 14 Oct 2026 02:10:59 GMT

Part Number: TXB0106

高品质HIFI音频解码产品I2S信号用TXB0106芯片做电平转换3.3V--->1.8V，MCLK主时钟最高频率为49.152MHz。产品信号源输入48K的音频信号时，I2S信号的：BCLK、LRCK、DATA信号都正常，MCLK信号输出不正常，1.8V侧的信号和频率只有3.3V侧的一半，这是什么问题。断开了1.8V侧的接收端也是一样的，请TI工程师帮忙解决一下。如下图：

PUREPATHSTUDIO: 【PurePath Console】There are no models shown on the software interface/home page

degui yang — Mon, 12 Oct 2026 07:05:13 GMT

Part Number: PUREPATHSTUDIO
Other Parts Discussed in Thread: TAS5815

Hi, I'm Degui, an Electronics Engineer from Teufel. I'm currently involved in audio product development, and Audio Amplifier is TAS5815.

Our team need to design calss H setting base on TAS5815 to a boost chip, so we download PurePath Console, but there are no models shown on the software interface/home page

you can see from my picture(PurePath Console 3 and 4 home page), we can not find(or download) TAS5815 model

Can your team help me with PurePath Console to download TAS5815 model?

If you have any questions or need any additional information, please feel free to reach out to me.

Degui Yang
Electronics Engineer
degui.yang@teufel.de
(+86) 13880348103

TAS5805M: TAS5805M: Unable to access PurePath Console 3 / TAS5805M Device App

Yang Zhang — Fri, 09 Oct 2026 07:21:38 GMT

Part Number: TAS5805M

Hello,
I am developing a product using the TAS5805M and need access to PurePath Console 3 and the TAS5805M Device App for DSP configuration and tuning.

However, when I try to download the software from the TI website, my download request is denied with the message that TI is unable to approve the request.

I have already checked my myTI account information, including my name, email address, company, and country/region.

Could you please help me check my account permissions and enable access to the TAS5805M PPC3 software/device app?

Thank you!

PCM9211: PCM9211: SBCK/SLRCK no output on MPIO_A0/A1 in AVR Application 2 mode, while XMCKO on MPIO_A2 works

? ?? — Sun, 27 Sep 2026 01:57:58 GMT

Part Number: PCM9211

Configuration:

· XTI = 24.576 MHz

· Register 24h = 0x14 (XMCKEN=1, XMCKDIV=01, XMCKO = XTI/2 = 12.288 MHz)

· Register 33h = 0x22 (XSBCK=010 = XTI/8 = 3.072 MHz, XSLRCK=010 = XTI/512 = 48 kHz)

· Register 40h = 0xC0 (normal operation)

· Register 6Fh = 0x88 (MPASEL=10, AVR Application 2: SBCK/SLRCK/XMCKO/INT0)

· Register 6Eh = 0x00 (all MPIO_A Hi-Z released)

Observation:

· MPIO_A2 (XMCKO) outputs 12.288 MHz correctly. Changing XMCKDIV in Reg 24h changes the output frequency as expected.

· MPIO_A0 (SBCK) and MPIO_A1 (SLRCK) show no output, measured directly at the chip pins with a scope.

· Register readback of 24h, 33h, 40h, 6Eh, 6Fh all confirms the values above are written correctly.

· GPIO test: configuring MPIO_A as GPIO (Reg 6Fh = 0xC0, Reg 70h = 0x03, Reg 79h = 0x03) and toggling Reg 7Bh successfully drives A0/A1 high and low. This confirms the pins and output drivers are NOT damaged.

· Register 32h (DIR source SBCK/SLRCK) remains at reset value 0x22; DIR is disabled via Reg 40h RXDIS.

Question:

Why do SBCK and SLRCK not appear on MPIO_A0/A1, even though XMCKO works and the pins are proven functional? Is there an additional enable or gating condition for the Secondary BCK/LRCK output path that is not documented in the register descriptions? Does the SBCK/SLRCK output path require any other module (Main Output, AUXOUT, or DIT) to be active to un-gate the clock?

因为原来准备发英文论坛，所以用英文，回复直接用中文即可！

TAC5212EVM-K: TAC5212EVM-K的软件无法获取

? ? — Fri, 25 Sep 2026 16:53:25 GMT

Part Number: TAC5212EVM-K

TAC5212EVM-K买了但是PUREPATHCONSOLE 、TAC5X1X-Q1-SW 软件申请被拒。。。这不是幽默么

约等于付费买次品，这...

OPA2134: OPA2134UA/2K5; 24年老晶圆一切正常使用，25年新晶圆在没有改变电路的情况下，偏置电流大了6000倍

jiahao SUN — Thu, 24 Sep 2026 03:56:32 GMT

Part Number: OPA2134

OPA2134UA/2K5; 24年老晶圆一切正常使用，25年新晶圆在没有改变电路的情况下，偏置电流大了6000倍；想问下TI工程师，这个新晶圆变更是否有对参数进行调整？规格书是否有说明？

TAS3251: 下载调试软件总是说没有权限

simon white — Mon, 21 Sep 2026 00:02:39 GMT

Part Number: TAS3251

权限遭拒

我们目前无法批准您的下载请求。

如果您认为自己被误拒，请通过以下链接联系 TI 客户支持：www.ti.com.cn/.../customer-support.html。请确保您提供的姓名、邮箱、公司及国家/地区信息与 myTI 账户中的信息完全一致。

此致，
德州仪器 (TI)

TAS5805M: TAS5805M: 32-bit I2S @ 64fs + existing PPC3 — program material sounds grainy (silence is clean)

seanchan Chan — Sat, 19 Sep 2026 03:10:18 GMT

Part Number: TAS5805M

Hi Isaac,

We followed your earlier guidance:

Host I2S is 32-bit, 48 kHz, 64×fs, I2S Philips, stereo
After the existing PPC3 table we write SAP_CTRL1 (0x33) = 0x03 only (I2S, 32-bit)
We do not replace the PPC3 process flow
Hi-Z is not used when changing 0x33

Readback after init (book 0, page 0):

0x33=0x03, 0x34=0x00, 0x03=0x03 (Play), 0x37=0x09 (48 kHz), 0x38=0x40 (64×fs), 0x39=0x08, 0x68=0x03, 0x71=0x00

Music is now intelligible (better than 0x33=0x02 with 32-bit @ 64×fs). Remaining issue:

Same tracks were clean when this board used 16-bit I2S/DAC and the same PPC3 table
With 32-bit I2S + 0x33=0x03, silence and quiet passages are clean; grain/sand appears only when the program has energy
Source format is not the limiter: mixer already delivers 32-bit PCM; a silent file in PLAY has no grain

Questions:

Is the existing PPC3 export valid for 32-bit I2S playback, or must we re-export End System Integration with I2S word length = 32-bit?
If the current table can stay, what else is required so 32-bit I2S sounds like the old 16-bit I2S path (other SAP bits, BCK polarity, DSP input format)?
Please give the exact register sequence you recommend for: 48 kHz / 32-bit I2S / 64×fs + keep this PPC3, without audible grain on program.

Thank you.

TAS5832EVM-DOC-CERT: Unable to Install TAS5830 App in PurePath Console 3

ZHIJIE GUO — Thu, 17 Sep 2026 13:49:18 GMT

Part Number: TAS5832EVM-DOC-CERT
Other Parts Discussed in Thread: TAS5830

Hello TI Support Team,

My actual device is TAS5830. Since TAS5830 is not available in the TI Device/Part Number selection list, I selected TAS5832EVM-DOC-CERT only in order to submit this support request.

I am trying to install the TAS5830 EVM App in PurePath Console 3 (PPC3). The TAS5830 App appears under “Available EVM Apps,” but the installation always fails.

PPC3 reports the following error:

“Problems occurred during installation of TAS5830. Refresh Available EVM Apps before trying again.”

I have refreshed the Available EVM Apps and retried the installation many times, but the same error occurs every time. I have also restarted PPC3 and attempted the installation again, but the issue still persists.

Could you please help confirm whether this issue is related to my TI account permissions, the TAS5830 App package, or my PPC3 installation/version?

Screenshots of the issue are attached for reference.

Thank you for your support.

PCM1681-Q1: EVM SCH request

Peng Zhang — Fri, 11 Sep 2026 06:24:22 GMT

Part Number: PCM1681-Q1
Other Parts Discussed in Thread: PCM1681

Hi TEam,

TYW need to use PCM1681 as truck audio, and want to reference our EVM to help design, pls help support me with the EVM sch and PCB design files, thanks!

BR,

Peng

TAS5825M: 关于tas5825m使用一段时间后全部功放无声音输出问题

shangu yun — Thu, 10 Sep 2026 06:57:54 GMT

Part Number: TAS5825M

关于tas5825m使用一段时间后功放所有声道无音频输出问题

硬件外围电路参照datasheet（下图）。GPIO0,1,2对外无连接，MCU仅使用IIC与tas5825m通信。PVDD=24V; LRCK=48kHz; SCLK=3.072MHz。PDN默认上拉，关闭时下拉PDN。由于经常发烫问题，将输出电感改为15uH。负载阻抗= 4Ω。
当前软件配置：开关频率 Fsw=384kHz；调制方式 Hybrid。

问题：使用6个tas5825m作为6个声道一起使用，但使用过一段时间后全部功放无音频输出。断电重启也没有效果。芯片也没有烧毁，请问会是什么原因造成的？怎么解决呢？

OPA2134: OPA2134UA/2K5 不同晶圆批次输入偏置电流差异巨大，寻求原厂工艺变更确认

jiahao SUN — Fri, 04 Sep 2026 09:18:55 GMT

Part Number: OPA2134

各位TI工程师好：

我们在音频信号调理电路使用OPA2134UA/2K5，在完全相同测试硬件、±12V供电、25℃室温条件下，观察到不同晶圆批次器件输入偏置电流出现巨大差异：

1、2024‑06晶圆批次样品：实测输入偏置电流与规格书典型值5pA一致，整机工作正常；

2、2024‑09之后晶圆批次样品：实测输入偏置高出规格典型值约6000倍，直接造成终端设备功能异常。已做交叉换片验证：仅更换运放，其余电路完全不变，好坏样品现象可复现，确认差异来自器件本身，测试采用FET输入运放标准偏置电流测试电路。

想向TI确认3个问题：

1、2024年9月之后OPA2134是否存在晶圆工艺改版，会影响输入偏置电流参数？

2、OPA2134UA/2K5在25℃条件下，生产端允许的输入偏置电流分布区间是多少？

3、如果该参数偏移属于工艺允许波动，电路层面有什么适配建议？

TAS5832EVM-DOC-CERT: 申请TAS5825-SW软件来配置寄存器

payton zhu — Fri, 04 Sep 2026 01:34:24 GMT

Part Number: TAS5832EVM-DOC-CERT

TI 团队

你们好！

我现在开发了一套以TAS5825为功放芯片的SOUNDBAR，以经打样出来了。现在要调试音箱，需要用到TAS5825的APP,麻请贵司帮我按排一下，谢谢！

TLV320ADC3101-Q1: 我的TLV320ADC3101-Q1初始化供电过流。

zhou zhx — Wed, 02 Sep 2026 02:55:17 GMT

Part Number: TLV320ADC3101-Q1

我的TLV320ADC3101-Q1初始化供电过流。我测量3路供电都没有短路，都是正常充放电状态。但是上电就过流。不知为啥。

TAC5111: TAC5111 PFAS 資訊

Kuo Chris — Tue, 01 Sep 2026 09:29:26 GMT

Part Number: TAC5111

我司一項新產品要採用 TAC5111,但客戶要求提供 PFAS 的資訊, 可否告知它是否 PFAS free, 如果有,含量是多少ppm,謝謝.

OPA2134: 【质量问题反馈】OPA2134UA/2K5 不同晶圆批次输入偏置电流 IB 异常差异

jiahao SUN — Mon, 31 Aug 2026 03:42:10 GMT

Part Number: OPA2134

TI 工程师您好：

我方客户在使用 OPA2134UA/2K5 运放时，发现明显的批次性能差异，特此向 TI 提交问题，希望贵司协助分析。

1、现象描述

2024 年 06 月晶圆批次（老晶圆）：在客户整机板上工作完全正常，整机功能满足设计要求。
2024 年 09 月之后新晶圆批次：同样硬件电路板、同样整机环境，设备功能失效。

客户板载测试得到输入偏置电流约 30 μA，对比规格书 25℃最大限值 ±100 pA，实测高出约6000 倍。两个输入引脚均观测到大的输入电流；运放交流放大功能正常，输入失调电压很小。

补充说明：该测试是直接在客户整机 PCB 电路板上完成的分压法测试（参考附件 PDF 文档 MA30.3 MK2 测试报告），没有使用屏蔽保护环夹具，不属于实验室仲裁级测试结果，仅作为现象参考。客户已做 A‑B 交换验证：同一块 PCB，换上 24‑06 老晶圆器件整机恢复正常；更换为 24‑09 之后新晶圆器件故障复现。

2、规格书参考条件

器件规格书定义：TA=25℃，Vs=±15V，Vcm=0V

输入偏置电流 IB：最大 ±100 pA；JFET 输入架构。

3、样品信息

料号：OPA2134UA/2K5
正常批次晶圆：2024‑06 晶圆
异常批次晶圆：2024‑09 之后晶圆
可提供：良片、不良片实物，卷带标签照片、丝印照片。

4、客户测试简要说明（对应附件 PDF）

客户拆除板上部分外围元件，保留原整机 PCB，采用分压负载法做偏置电流测试；

交流通路测试：运放交流增益功能正常；
直流偏置电流测试：同相分压理论 3.4V，实测被拉低至 2.4V；计算得到引脚输入电流约 30 μA；反相端反馈电阻压降计算得到约 30 μA 输入电流。

客户排除外部钳位二极管影响，怀疑芯片内部输入级发生变化。

5、我方请求

请 TI 核查：2024‑06 至 2024‑09 之间，OPA2134 是否存在晶圆工艺、die 裸片、ESD 保护结构的变更，是否发布过对应的 PCN 变更通知。
希望开展 FA 失效分析：我们可以寄送已知良品（24‑06 批次）与不良样品（24‑09 后批次）给 TI 实验室做对比测试，在标准屏蔽夹具 25℃条件下直接测量两个批次芯片真实输入偏置电流 IB。
协助定位：是工艺批次漂移、die 改版、ESD 结构变更，还是其他内部因素导致该现象。
输出正式分析结论，评估是否存在批次性风险，给出后续生产处理建议

附件清单

MA30.3 MK2 客户测试报告 PDF（含测试原理图、原始测试数据）
器件丝印
MA30.3 bias current issue.pdf

期待您的回复，如有需要我们可以进一步补充信息。

TAA3040EVM-PDK: TAA3040的采样率

leo zhu — Sat, 29 Aug 2026 03:03:23 GMT

Part Number: TAA3040EVM-PDK
Other Parts Discussed in Thread: TAA3040

TAA3040 的ADC 采样速率 (fS) = 8kHz 至 768kHz，并支持用4 通道模拟麦克风输入或线路输入。

想问下，同时用4个通道模拟麦克风输入时，每个通道的最大采样速率是768kHz，还是768kHz/4 = 192kHz？

OPA2134: 【质量问题反馈】OPA2134UA/2K5 不同晶圆批次输入偏置电流 IB 异常差异

jiahao SUN — Fri, 28 Aug 2026 07:20:00 GMT

Part Number: OPA2134

TI 工程师您好：

我方客户在使用 OPA2134UA/2K5 运放时，发现明显的批次性能差异，特此向 TI 提交问题，希望贵司协助分析。

1、现象描述

2024 年 06 月晶圆批次（老晶圆）：在客户整机板上工作完全正常，整机功能满足设计要求。
2024 年 09 月之后新晶圆批次：同样硬件电路板、同样整机环境，设备功能失效。客户板载测试得到输入偏置电流约 30 μA，对比规格书 25℃最大限值 ±100 pA，实测高出约6000 倍。两个输入引脚均观测到大的输入电流；运放交流放大功能正常，输入失调电压很小。

补充说明：该测试是直接在客户整机 PCB 电路板上完成的分压法测试（参考附件 PDF 文档 MA30.3 MK2 测试报告），没有使用屏蔽保护环夹具，不属于实验室仲裁级测试结果，仅作为现象参考。客户已做 A‑B 交换验证：同一块 PCB，换上 24‑06 老晶圆器件整机恢复正常；更换为 24‑09 之后新晶圆器件故障复现。

2、规格书参考条件

器件规格书定义：TA=25℃，Vs=±15V，Vcm=0V 输入偏置电流 IB：最大 ±100 pA；JFET 输入架构。

3、样品信息

料号：OPA2134UA/2K5
正常批次晶圆：2024‑06 晶圆
异常批次晶圆：2024‑09 之后晶圆
可提供：良片、不良片实物，卷带标签照片、丝印照片。

4、客户测试简要说明（对应附件 PDF）

客户拆除板上部分外围元件，保留原整机 PCB，采用分压负载法做偏置电流测试；

交流通路测试：运放交流增益功能正常；
直流偏置电流测试：同相分压理论 3.4V，实测被拉低至 2.4V；计算得到引脚输入电流约 30 μA；反相端反馈电阻压降计算得到约 30 μA 输入电流。客户排除外部钳位二极管影响，怀疑芯片内部输入级发生变化。

5、我方请求

请 TI 核查：2024‑06 至 2024‑09 之间，OPA2134 是否存在晶圆工艺、die 裸片、ESD 保护结构的变更，是否发布过对应的 PCN 变更通知。
希望开展 FA 失效分析：我们可以寄送已知良品（24‑06 批次）与不良样品（24‑09 后批次）给 TI 实验室做对比测试，在标准屏蔽夹具 25℃条件下直接测量两个批次芯片真实输入偏置电流 IB。
协助定位：是工艺批次漂移、die 改版、ESD 结构变更，还是其他内部因素导致该现象。
输出正式分析结论，评估是否存在批次性风险，给出后续生产处理建议。

附件清单

MA30.3 MK2 客户测试报告 PDF（含测试原理图、原始测试数据）
器件丝印、卷带标签照片（后续补充）

期待您的回复，如有需要我们可以进一步补充信息。MA30.3 bias current issue.pdf

TAS5832EVM-DOC-CERT: 我想申请TAS5825-SW的软件，来配置硬件的初始化寄存器

payton zhu — Thu, 27 Aug 2026 10:33:30 GMT

Part Number: TAS5832EVM-DOC-CERT