https://e2echina.ti.com/support/clock-and-timing/zh-CNTelligent Community 13https://e2echina.ti.com/support/clock-and-timing/f/clock-timing-forum/1075324/ne555-ne555/3871393Mon, 25 May 2026 04:07:00 GMT91561404-af28-475a-b96b-cb6cbaadd097:e70279bc-ba57-4928-a220-cc487ff7a15fy y您好 我的漏脉冲检测电路 R是10k C是10nf 频率为10khz 时间是0.1ms 按照技术手册内容 当输入信号高电平时间大于0.1ms时 输出信号为高电平 当输入信号高电平时间小于0.1ms时 输出信号 是低电平 现在实际电路搭建后 当输入信号高电平时间大于0.1ms时 输出信号为高电平 当输入信号高电平时间小于0.1ms时 输出信号 是方波 为什么会形成这样的现象呢https://e2echina.ti.com/support/clock-and-timing/f/clock-timing-forum/1075324/ne555-ne555/3871368Mon, 25 May 2026 02:35:00 GMT91561404-af28-475a-b96b-cb6cbaadd097:cf776413-6caf-4ef4-a27f-c39fc452f1f4Alice您好， 如图所示，红框对应的是检测到的漏脉冲。如果输出一直是方波，说明检测到了多个漏脉冲，即输入信号高电平时间与RC选择不合适。 选择 RA 和 C，使 RA× C > [最大额定输入高电平时间]。https://e2echina.ti.com/support/clock-and-timing/f/clock-timing-forum/1075324/ne555-ne555Mon, 25 May 2026 01:30:00 GMT91561404-af28-475a-b96b-cb6cbaadd097:dadcdb35-b7a8-49b1-920c-7047256887d4y yPart Number: NE555 l技术人员您好，NE555漏脉冲检测电路，LTspice仿真和实物电路搭建都试过了，最后输出的波形都是方波，求助怎么能出现和技术手册里面一样的现象测试和测量NE555https://e2echina.ti.com/support/clock-and-timing/f/clock-timing-forum/1074247/lmx2592-lmx2592-100m/3871058Fri, 22 May 2026 21:11:00 GMT91561404-af28-475a-b96b-cb6cbaadd097:f9ea7370-9ef8-4ac8-a990-1ea4f9960c2aNoel Fung你好呀， 我们建议使用 TICS Pro ( www.ti.com/.../TICSPRO-SW ) 设置配置，并使用 PLL Sim ( www.ti.com/.../PLLATINUMSIM-SW ) 设计环路滤波器。ECTEhttps://e2echina.ti.com/support/clock-and-timing/f/clock-timing-forum/1074247/lmx2592-lmx2592-100m/3871047Fri, 22 May 2026 21:06:00 GMT91561404-af28-475a-b96b-cb6cbaadd097:02484bdd-8d9c-41dd-b6dc-7ea087fe2805Noel Fung你好呀， 我们建议使用 TICS Pro ( www.ti.com/.../TICSPRO-SW ) 设置配置，并使用 PLL Sim ( www.ti.com/.../PLLATINUMSIM-SW ) 设计环路滤波器。ECTEhttps://e2echina.ti.com/support/clock-and-timing/f/clock-timing-forum/1074247/lmx2592-lmx2592-100m/3871045Fri, 22 May 2026 21:04:00 GMT91561404-af28-475a-b96b-cb6cbaadd097:304cd7d3-a9a3-48a6-b58f-b40098c68599Noel Fung你好呀， 我们建议使用 TICS Pro ( www.ti.com/.../TICSPRO-SW ) 设置配置，并使用 PLL Sim ( www.ti.com/.../PLLATINUMSIM-SW ) 设计环路滤波器。ECTEhttps://e2echina.ti.com/support/clock-and-timing/f/clock-timing-forum/1074247/lmx2592-lmx2592-100m/3867895Sun, 17 May 2026 23:03:00 GMT91561404-af28-475a-b96b-cb6cbaadd097:f1989e33-cd34-448d-b38b-3e854f5a62ecTaylor您好， 已经收到了您的案例，调查需要些时间，感谢您的耐心等待。https://e2echina.ti.com/support/clock-and-timing/f/clock-timing-forum/1073041/lmk04832-lmk04832-single-pll-oscin/3867795Sun, 17 May 2026 10:03:00 GMT91561404-af28-475a-b96b-cb6cbaadd097:bc7744b2-95ad-456e-8dc6-2b64b1e85b1b?? ?感谢回复。 在仅使用OSCIN作为参考时钟输入时， single pll模式下已可以正确输出时钟。 板卡上的下一级LMK04828，CLKIN0接上一级输出的3.84MHz，CLKIN1接上一级输出的245.76MHz，OSCIN不使用。我想使用单PLL2模式或者Distribution模式输出时钟，请帮忙看一下现在的配置，附件中的配置没有时钟输出。 e2echina.ti.com/.../LMK04832_2D00_SINGLE_2D00_PLL2.ziphttps://e2echina.ti.com/support/clock-and-timing/f/clock-timing-forum/1074247/lmx2592-lmx2592-100mSat, 16 May 2026 08:05:00 GMT91561404-af28-475a-b96b-cb6cbaadd097:5510b916-eaf6-4692-977f-099ec9121e78Zhijun ZhangPart Number: LMX2592 尊敬的TI团队： 您好！我的器件为LMX2592，输入参考频率为100MHz，VCO频率为6GHz，输出6GHz，准备选用的是二阶无源滤波器，能为我推荐一组合适的寄存器参数，和C1, C2, R2值吗？已经奋斗了三天了，一直搞不定。多谢TICSPRO-SWLMX2592PLLATINUMSIM-SWhttps://e2echina.ti.com/support/clock-and-timing/f/clock-timing-forum/1073621/lmkdb1108-lmkdb1108-vcross/3865742Fri, 15 May 2026 02:21:00 GMT91561404-af28-475a-b96b-cb6cbaadd097:3abaa84b-a6ab-47d5-8740-672dde9ac1c6Links是的，一般不是 强制条件 ，输入 Vcross variation ≤ 140 mV 是输入信号需要满足的限制；输出 Vcross variation 是器件在规定测试条件下的输出性能指标。 TRANSLATE with x English Arabic Hebrew Polish Bulgarian Hindi Portuguese Catalan Hmong Daw Romanian Chinese Simplified Hungarian Russian Chinese Traditional Indonesian Slovak Czech Italian Slovenian Danish Japanese Spanish Dutch Klingon Swedish English Korean Thai Estonian Latvian Turkish Finnish Lithuanian Ukrainian French Malay Urdu German Maltese Vietnamese Greek Norwegian Welsh Haitian Creole Persian TRANSLATE with COPY THE URL BELOW Back EMBED THE SNIPPET BELOW IN YOUR SITE Enable collaborative features and customize widget: Bing Webmaster Portal Backhttps://e2echina.ti.com/support/clock-and-timing/f/clock-timing-forum/1073621/lmkdb1108-lmkdb1108-vcross/3865643Fri, 15 May 2026 01:26:00 GMT91561404-af28-475a-b96b-cb6cbaadd097:9940631f-52ed-4fe3-aab7-8af871f04a2azicehn liu因此，这不是一个强制条件对吗？也就是数据手册里面的参数并不是强制要求输入Vcross摆动140mV测量输出的Vcross变化https://e2echina.ti.com/support/clock-and-timing/f/clock-timing-forum/1073621/lmkdb1108-lmkdb1108-vcross/3865626Fri, 15 May 2026 01:18:00 GMT91561404-af28-475a-b96b-cb6cbaadd097:e9d352c6-da95-4c98-9e36-98e727f8e6c6Links输入 Vcross 是器件正常工作的输入条件之一. 输出 Vcross 可能受输入 Vcross 影响，但 datasheet 中的输出 Vcross 规格通常是在输入信号满足所有输入规格的前提下保证的。 如果是在做普通功能验证， 不一定必须 。但如果是在做设计 margin、器件 qualification 或替代料验证， 建议按您说的做。 TRANSLATE with x English Arabic Hebrew Polish Bulgarian Hindi Portuguese Catalan Hmong Daw Romanian Chinese Simplified Hungarian Russian Chinese Traditional Indonesian Slovak Czech Italian Slovenian Danish Japanese Spanish Dutch Klingon Swedish English Korean Thai Estonian Latvian Turkish Finnish Lithuanian Ukrainian French Malay Urdu German Maltese Vietnamese Greek Norwegian Welsh Haitian Creole Persian TRANSLATE with COPY THE URL BELOW Back EMBED THE SNIPPET BELOW IN YOUR SITE Enable collaborative features and customize widget: Bing Webmaster Portal Backhttps://e2echina.ti.com/support/clock-and-timing/f/clock-timing-forum/1073621/lmkdb1108-lmkdb1108-vcrossThu, 14 May 2026 23:24:00 GMT91561404-af28-475a-b96b-cb6cbaadd097:174cc01e-37b5-4333-ab1d-a32ffe8d8aeezicehn liuPart Number: LMKDB1108 Hello，Dear Expert, I am a hardware engineer， we are looking for clock.buffer from different supplier，but one parameter makes me confusing， the Vcross，the definition of this spec should be the cross point of the clkp and clkn, and this device require the input vcross variation within 140mV and the output clk cross variation is also have similar requirment,but i want to know will the output vcross be affected by the input vcross? if so, will i need to make the input cross point varied by 140mV，then test the output cross variation? or i just need to make sure the input and output cross varition with the spec limitiation separatelyLMKDB1108https://e2echina.ti.com/support/clock-and-timing/f/clock-timing-forum/1073041/lmk04832-lmk04832-single-pll-oscin/3865322Wed, 13 May 2026 11:39:00 GMT91561404-af28-475a-b96b-cb6cbaadd097:eacf8ed5-f24a-4357-84ba-0884d811ea60Derek Payne我看到您将 RESET 引脚配置为输入。该引脚的状态是什么？LMK04832 是否被该引脚保持复位状态？ 需要将 SYNC_EN 设置为 1 才能启用 SYSREF 分隔符。 在连续 SYSREF 模式下，SYNC_DISSYSREF=0 会导致 SYSREF 分频器的输出被送入分频器复位电路，从而使分频器在每个上升沿都复位。在任何 SYNC 过程完成后，或者如果没有使用 SYNC 过程，则应预先设置 SYNC_DISSYSREF=1。 我没有发现配置方面还有其他问题。原理图或布局方面可能存在其他问题，如果之前的建议不足以解决问题，我们可以进一步探讨。ECTEhttps://e2echina.ti.com/support/clock-and-timing/f/clock-timing-forum/1073253/ne555-ne555/3865263Wed, 13 May 2026 02:33:00 GMT91561404-af28-475a-b96b-cb6cbaadd097:03769fa3-dd08-4a11-8c0e-b2a0caab8a71AliceHello, Do you implement a ABA test on normal board and abnormal board to confirm the issue followed with chip? If the result is the chip, please request failure analyze if the chips are bought directly from www.ti.com .https://e2echina.ti.com/support/clock-and-timing/f/clock-timing-forum/1073253/ne555-ne555/3864212Tue, 12 May 2026 05:53:00 GMT91561404-af28-475a-b96b-cb6cbaadd097:0d000866-de4e-4156-92f7-8e18859f4d35AliceHello, We have received your post and the investigation will take some time. Thanks for your patience.https://e2echina.ti.com/support/clock-and-timing/f/clock-timing-forum/1073253/ne555-ne555Tue, 12 May 2026 05:38:00 GMT91561404-af28-475a-b96b-cb6cbaadd097:8acd8177-7985-4db8-b6fe-033016c15d59guo qinqinPart Number: NE555 "In our NE555 circuit configured as a 1Hz astable oscillator, which drives a 15mA LED and a buzzer, the timing components are a 100kΩ resistor and a 10µF capacitor. Normally, when powered on, the OUT pin goes high for about 2 seconds before starting oscillation. However, on some units, the OUT pin remains high for over 30 seconds before oscillation begins. This is the abnormal behavior."工业自动化NE555https://e2echina.ti.com/support/clock-and-timing/f/clock-timing-forum/1073041/lmk04832-lmk04832-single-pll-oscin/3863407Mon, 11 May 2026 09:00:00 GMT91561404-af28-475a-b96b-cb6cbaadd097:d409520b-7a38-43f4-8984-c7ef85058b72Eirwen已经收到了您的案例，调查需要些时间，感谢您的耐心等待。https://e2echina.ti.com/support/clock-and-timing/f/clock-timing-forum/1073041/lmk04832-lmk04832-single-pll-oscinMon, 11 May 2026 08:28:00 GMT91561404-af28-475a-b96b-cb6cbaadd097:ef889534-6d1f-42c2-9bb0-8fb8e7c1517a?? ?Part Number: LMK04832 Other Parts Discussed in Thread: LMK04828 你好， 我的PCB使用LMK04832，调试阶段CLKIN0/1/2均无输入时钟，OSCIN接TCXO，TCXO的频率为122.88MHz。我使用single pll模式，将PLL1 powerdown，只使用OSCIN输入的122.88M时钟配置PLL2，以生成输出所需的各个时钟。但配置完成后，示波器测试各输出管脚只有一个直流偏置电平，没有任何频率输出。 附件为配置文件，还请帮忙检查一下，为什么没有时钟输出？ 谢谢 LMK04832-SINGLE-PLL-OSCIN.zip无线基础设施LMK04832lmk04828https://e2echina.ti.com/support/clock-and-timing/f/clock-timing-forum/1072359/pllatinumsim-sw/3861287Thu, 07 May 2026 06:39:00 GMT91561404-af28-475a-b96b-cb6cbaadd097:c2f1faf0-6027-40fd-acb8-034d4cca5554Eirwen打开链接 ticsc.service-now.com/csm 点击“申请新的支持”下面的“提交申请”按钮 在新打开的窗口中点击“其他”下面的“创建案例”按钮 在打开的表格中您可以使用中文描述您的问题并且递交。