由于中秋、国庆节假期，帖子审批以及工程师回复将会有所延迟，敬请谅解.

  • State TI Thinks Resolved
  • Locked Locked
  • Replies 3 replies
  • Answers 1 answer
  • Subscribers 10 subscribers
  • Views 537 views
  • Users 0 members are here
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DDC2256A: DCLK和FCLK，两个时钟都需要做FPGA接收时钟，FCLK是否可以不接？

Yuntian Guan
Part Number: DDC2256A

DCLK和FCLK，两个时钟都需要做FPGA接收时钟，FCLK是否可以不接？