接口论坛 - 最近的话题

TXU0304-Q1: TXU0304上电时，异常输出

fangsheng zhu — Fri, 05 Jun 2026 02:41:53 GMT

Part Number: TXU0304-Q1
Other Parts Discussed in Thread: TXU0304

异常条件：

VCCB 1.8V 已上电
VCCA/OE接一起，3.3V后上电
方向A to B

异常场景：

VCCA/OE上电前，A input存在600-700mV的台阶，当VCCA上电的过程中，B 输出了一个脉宽，具体如下图所示

黄色： B 输出绿色：VCCA/OE 蓝色：A输入

脉宽的起始点，对应的VCCA电压只有600mV左右，并没有达到器件最低1.08V的要求，此时为什么B会有输出？

TCA9517: Different Pull-up Voltage on SCLB/SDAB vs. VCCB

Benedikt Auer — Wed, 03 Jun 2026 12:11:58 GMT

Part Number: TCA9517

Hello TI-Team,

we want to use the TCA9517 and have a question regarding the voltage levels.

Is it allowed to use a different pull-up voltage for SCLB/SDAB than the supply voltage VCCB?

In our design:

VCCB (= PWR_1 in picture) is supplied separately
Pull-ups on SCLB/SDAB (= PWR_2 in picture) use a different voltage
We are planning to use two separate 3.3V rails with different power-up sequences. 3.3V pull-up Voltage ramps up before VCCB supply. The current for the pull upvoltage is only <40mA this is why we want to use a different supply
Additionally, we are considering using 5V for VCCB (PWR_1) as an alternative option

Our power-up sequence is:

Option 1: 1.8V (VCCA) => PWR_2 (pull-up voltage for SCLB/SDAB) => PWR_1 (VCCB)

Option 2: 1.8V (VCCA) => PWR_1 (VCCB) => PWR_2 (pull-up voltage for SCLB/SDAB)

Is this configuration valid, or are there any concerns we might have overlooked?

Thank you for your support.

Best regards,

Benedikt

TCA9538: 日系客戶生產訊息調查

Vicky Lin — Wed, 03 Jun 2026 08:28:56 GMT

Part Number: TCA9538

Hi TI Partners,

附件調查是日系客人需求,請參考範例,並回覆

於6/9(二)前回覆

謝謝

DS280DF810EVM: 需要DS280DF810EVM相关资料

Wang Bob — Tue, 02 Jun 2026 08:37:44 GMT

Part Number: DS280DF810EVM

您好，我现在购买了DS280DF810EVM，但是申请到相关的资料被拒绝了，包括：DS280DF810EVM_REVE_schematic.pdf 、DS280DF810EVM_REVE_layout.brd 、DS280DF810EVM_REVE_gerbers.zip 、EVM/s_parameters/ ，能否麻烦发送至我的个人邮箱1279699212@qq.com

DS280DF810EVM: 需要DS280DF810EVM相关资料

Wang Bob — Tue, 02 Jun 2026 08:32:05 GMT

Part Number: DS280DF810EVM

HDC3020: WHY HDC3020 return ffff?

zhuo yuan — Tue, 02 Jun 2026 02:35:37 GMT

Part Number: HDC3020

when I use FPGA to HDC3020 to read temp and humi, first I send 21 30,then i send 24 00,but sendor return ffff to FPGA and ack, it seems that sensor didn't work well,please help analyze ,thanks very much

DS90UB983-Q1: FPD-Link III Configuration Tool下载不了

changfu li — Thu, 28 May 2026 02:49:05 GMT

Part Number: DS90UB983-Q1

麻烦提供FPD-Link III Configuration Tool下载地址

DS90UB983-Q1: FPD-Link III Configuration Tool下载不了

changfu li — Thu, 28 May 2026 02:47:47 GMT

Part Number: DS90UB983-Q1

麻烦提供FPD-Link III Configuration Tool下载地址

DS90UB954-Q1: soc 接收ds90ub954 芯片彩条自输出，图像异常

guoyong huang — Thu, 28 May 2026 01:28:25 GMT

Part Number: DS90UB954-Q1

我按照TI ds90ub954 寄存器配置手册说明（ds90ub954-q1.pdf）第71页，配置彩条输出：ub954_1280x720彩条配置.png
我们soc接收格式是.bus_fmt = MEDIA_BUS_FMT_UYVY8_2X8,
所以修改了这里：

PGEN_CSI_DI – 设置数据类型为 0x1E (YUV422 8-bit), VC=0
WriteI2C(0xB1,0x03) # PGEN_CSI_DI
WriteI2C(0xB2,0x1E)

soc 使用4l2-ctl 抓图
adb shell "v4l2-ctl -d /dev/video0 --set-fmt-video=width=1280,height=720,pixelformat=UYVY --stream-mmap=4 --stream-skip=3 --stream-to=/data/cif.yuv --stream-count=1 --stream-poll"

抓到的图为：cif.yuv

我使用工具打开yuv 图像，看着图像格式不太对，用pixelformat=NV12 格式去抓也一样，不知道该怎么往下找原因了，请帮忙给些建议cif.zip

PCA9554: 上电过程IO口状态异常 Abnormal I/O pin state during power-up

Ankang Liu — Tue, 26 May 2026 12:22:47 GMT

Part Number: PCA9554

PCA9554在上电过程中，IO口的状态会先上升到一定电平，然后在掉下来，在重新稳定至高电平状态，表现异常，为什么会有先上后掉在稳定，不应该直接上升至VCC稳定状态吗

Upon power application, the I/O pins of the PCA9554 show an abnormal voltage waveform: the potential climbs to a specific value initially, then falls, and eventually stabilizes at logic high. Ideally, the voltage should rise steadily to VCC without this dip.

DP83TC812R-Q1: ethercat通信失效

mingyang zhang — Tue, 26 May 2026 09:50:19 GMT

Part Number: DP83TC812R-Q1

您好，

我正常参照贵公司的MCU063B 核心板，贵公司该产品使用标准以太网的DP83822PHY芯片，进行ethercat通信，我想将这个标准以太网的PHY芯片，更换为贵公司的DP83TC812 PHY芯片，使用MII模式，PHY地址为0，芯片配置为从站模式，不使用休眠功能，原理图的设计思路参照贵公司MCU03B的原理图进行设计，PHY与28388D之间进行数据传输。

现在的现象是物理层连接成功，有数据的收发，但是无法建立起ethercat通信，建立通信时，连接灯与数据传输的LED灯交替闪烁，与标准以太网接口现象不同。我已经进行走线的等长处理与阻抗匹配。

我想询问，我目前设计的原理图是否有错误。

谢谢！

TCA9548A: TCA是否支持I2C时钟扩展

?? ? — Tue, 26 May 2026 08:39:49 GMT

Part Number: TCA9548A

我的原理图设计是这样的，主机是ARM的IIC连接到TCA9548A的数据总线上，然后TCA9548A连接到8个从机，在调试过程中经常出现TCA9548A概率性无响应的情况，排查到与通道5接入的VS3K芯片有关系，该芯片只支持1.8V电压域，所以TCA9548A输出后经过了一个电平转换芯片连接至VS3K，我查询了VS3K的规格书上面说明主设备必须要支持IIC clock stretching，我们之前的设计是ARM直接连接至VS3K未出现过此问题，请帮忙解答TCA9548A是否支持时钟扩展机制？或者是不是还有其他可能的原因引起的IIC报错问题？

SN74LVC8T245: Why are the delay parameters listed in the SN74LVC8T245 datasheet much larger than the actual measured values?

yidong liu — Fri, 22 May 2026 10:45:25 GMT

Part Number: SN74LVC8T245

I am using the SN74LVC8T245 for SPI level shifting, with a data rate up to 25MHz. I need the propagation delay to be within 10ns in order to reliably read the MISO data. However, the datasheet shows that the B-to-A delay parameters are basically around 20ns. But when I test using the test circuit in the datasheet, the delay is not that large. Can I use this chip for this application?

TFP410: TI有RGB888转HDMI的芯片推荐吗

chen geng — Fri, 22 May 2026 03:38:06 GMT

Part Number: TFP410

我搜到的TFP410，看了下，文档里没有明确说可以用于RGB888转HDMI信号，I2C接口也只有一个，一般RGB转HDMI接口芯片，都是两个I2C接口，一个接口和CPU连接，用于CPU和接口芯片通信，另一个I2C用于接口芯片和HDMI显示屏通信

DS90UB983-Q1: 983 cs2.0的TI 芯片，patgen是否绑定固定寄存器地址屏参

Chen shaojie — Fri, 22 May 2026 03:36:54 GMT

Part Number: DS90UB983-Q1

我使用的是983 CS2.0串行器，

配置PATGEN的设置如下：

int serAddr = 0x0C;

WriteI2C2(serAddr, 0x40, 0x30);

WriteI2C2(serAddr, 0x41, 0x29);

WriteI2C2(serAddr, 0x42, 0x0C); // 设置PATGEN颜色深度为24bpp用于VP0

WriteI2C2(serAddr, 0x41, 0x28);

WriteI2C2(serAddr, 0x42, 0x95); // 启用VP0上的PATGEN - 注释掉此行以禁用PATGEN并启用端到端视频

WriteI2C2(serAddr, 0x43, 0x00); //#Set number of VPs used = 1

WriteI2C2(serAddr, 0x44, 0x01); //#disable video processors

配置VP0屏参如下：

WriteI2C(serAddr, 0x40, 0x32);

WriteI2C(serAddr, 0x41, 0x01);

WriteI2C(serAddr, 0x42, 0xa8); // 设置VP_SRC_SELECT为Stream 0以使用SST模式

WriteI2C(serAddr, 0x41, 0x02);

WriteI2C(serAddr, 0x42, 0x80); // VID H Active

WriteI2C(serAddr, 0x42, 0x07); // VID H Active

WriteI2C(serAddr, 0x41, 0x10);

WriteI2C(serAddr, 0x42, 0x80); // Horizontal Active

WriteI2C(serAddr, 0x42, 0x07); // Horizontal Active

WriteI2C(serAddr, 0x42, 0x20); // Horizontal Back Porch

WriteI2C(serAddr, 0x42, 0x00); // Horizontal Back Porch

WriteI2C(serAddr, 0x42, 0x20); // Horizontal Sync

WriteI2C(serAddr, 0x42, 0x00); // Horizontal Sync

WriteI2C(serAddr, 0x42, 0x00); // Horizontal Total

WriteI2C(serAddr, 0x42, 0x08); // Horizontal Total

WriteI2C(serAddr, 0x42, 0xd0); // Vertical Active

WriteI2C(serAddr, 0x42, 0x02); // Vertical Active

WriteI2C(serAddr, 0x42, 0x08); // Vertical Back Porch

WriteI2C(serAddr, 0x42, 0x00); // Vertical Back Porch

WriteI2C(serAddr, 0x42, 0x08); // Vertical Sync

WriteI2C(serAddr, 0x42, 0x00); // Vertical Sync

WriteI2C(serAddr, 0x42, 0x2d); // Vertical Front Porch

WriteI2C(serAddr, 0x42, 0x00); // Vertical Front Porch

WriteI2C(serAddr, 0x41, 0x27);

WriteI2C(serAddr, 0x42, 0x00); // HSYNC Polarity = +, VSYNC Polarity = +

问题是之前使用CS1.0的时候，配置PATGEN的WriteI2C2(serAddr, 0x42, 0x0C); 之前写的是WriteI2C2(serAddr, 0x42, 0x08);也查看寄存器手册FPD4_PGCFG_VP0 Register (Address = 0x29) ，差别是第三个bit，Timing Select Control: 1: The Pattern Generator creates its own video timing as configured in the Pattern Generator Total Frame Size, Active Frame Size, Horizontal Sync Width, Vertical Sync Width, Horizontal Back Porch, Vertical Back Porch, and Sync Configuration registers. 0: the Pattern Generator uses external video timing from the pixel clock, Data Enable, Horizontal Sync, and Vertical Sync signals. ，
所以

第一个问题：1.0和2.0中改动了什么，必须得用2.0得设置29寄存器0C才可以亮屏，

第二个问题：外部的Timing和内部的Timing设置有什么区别？

点三个问题：为什么2.0中还需要配置2b寄存器才可以，不配的话屏幕的状态看着不正常，

WriteI2C(serAddr,0x41,0x2a); //Set patgen address

WriteI2C(serAddr,0x42,0x86); //Set patgen address auto increment

WriteI2C(serAddr,0x41,0x2b);

WriteI2C(serAddr,0x42,0x0); //Set patgen THW 2048

WriteI2C(serAddr,0x41,0x2b);

WriteI2C(serAddr,0x42,0x8); //Set patgen THW

WriteI2C(serAddr,0x41,0x2b);

WriteI2C(serAddr,0x42,0x0D); //Set patgen TVW 781

WriteI2C(serAddr,0x41,0x2b);

WriteI2C(serAddr,0x42,0x03); //Set patgen TVW

WriteI2C(serAddr,0x41,0x2b);

WriteI2C(serAddr,0x42,0x80); //Set patgen AHW 1920

WriteI2C(serAddr,0x41,0x2b);

WriteI2C(serAddr,0x42,0x7); //Set patgen AHW

WriteI2C(serAddr,0x41,0x2b);

WriteI2C(serAddr,0x42,0xd0); //Set patgen AVW

WriteI2C(serAddr,0x41,0x2b);

WriteI2C(serAddr,0x42,0x2); //Set patgen AVW

WriteI2C(serAddr,0x41,0x2b);

WriteI2C(serAddr,0x42,0x20); //Set patgen HSW

WriteI2C(serAddr,0x41,0x2b);

WriteI2C(serAddr,0x42,0x0); //Set patgen HSW

WriteI2C(serAddr,0x41,0x2b);

WriteI2C(serAddr,0x42,0x8); //Set patgen VSW

WriteI2C(serAddr,0x41,0x2b);

WriteI2C(serAddr,0x42,0x0); //Set patgen VSW

WriteI2C(serAddr,0x41,0x2b);

WriteI2C(serAddr,0x42,0x20); //Set patgen HBP

WriteI2C(serAddr,0x41,0x2b);

WriteI2C(serAddr,0x42,0x0); //Set patgen HBP

WriteI2C(serAddr,0x41,0x2b);

WriteI2C(serAddr,0x42,0x8); //Set patgen VBP

WriteI2C(serAddr,0x41,0x2b);

WriteI2C(serAddr,0x42,0x0); //Set patgen VBP

WriteI2C(serAddr,0x41,0x2a);

WriteI2C(serAddr,0x42,0x96);

WriteI2C(serAddr,0x41,0x2b);

WriteI2C(serAddr,0x42,0x0); //HSYNC Polarity = +, VSYNC Polarity = +

TCAN1042DEVM: 请问窗口期开始日期，是根据estimatedShipDate计算还是rescheduledshipDate计算？

伟雄邓 — Tue, 19 May 2026 08:27:07 GMT

Part Number: TCAN1042DEVM

您好！

一个订单，TI 回复的schedules/confirmations里面，即有estimatedShipDate又有rescheduledshipDate。

请问窗口期开始日期，是根据estimatedShipDate计算还是rescheduledshipDate计算？

DS250DF810: 请问DS250DF810是否可以支持XILINX FPGA Aurora 64b/66b应用?

user4733960 — Tue, 19 May 2026 05:44:09 GMT

Part Number: DS250DF810
Other Parts Discussed in Thread: DS280BR810

DS250DF810是否可以支持XILINX FPGA Aurora 64b/66b应用? 速率最高25.7812G。

DS90UB988-Q1: 983连接988整根链路的S11和S21测量

meng li — Tue, 19 May 2026 02:17:26 GMT

Part Number: DS90UB988-Q1

你好，关于983连接988整根链路的S11和S21测量，由下图可知

PCB BUdget的-16+4.4*log(f/fmax)的标准，测量路径为解串器Slave的视频信号插座开始，到解串器芯片引脚输入处结束的这条链路。

Cable assembly - Budget的-10dB的标准，测量路径为加串器到解串器的同轴线缆开始，到解串器芯片引脚输入处结束的这条链路

第一个问题是，我以上理解是否正确呢？

第二个问题是，我现在需要测量的测量路径为加串器983的芯片引脚输出处开始，经过加串器到解串器的同轴线缆，最终在解串器芯片引脚输入处结束，这条链路的S11参数和S21参数测量的标准是什么呢？

麻烦解答一下，感谢

TCA9535: 2个TCA9535同时使用时出现输出控制失控的问题

user5337145 — Tue, 19 May 2026 01:59:43 GMT

Part Number: TCA9535

如图，2片的TCA9535同时使用，SCL和SDA并联，然后上拉到10k电阻，串个47R电阻到单片机的I2C口，第一个TCA9535所有口都设置为输出，输出都是通过一个电阻1k控制光耦TLP521。第二个TCA9535的P10-P14设置为输入，上拉电阻10k到电源然后外接信号检测（目前外面都无信号进来，因此输入都是检测到高电平)。2个芯片的地址分别是000和001。所有的初始化指令及控制指令都是发送I2C写寄存器后，同时读取寄存器，确保写入成功寄存器。

现在出现的问题是，个别输出口明明设置输出高电平了，实际上是低电平，或者明明低电平了，实际上又是高电平。我用单片机跟踪程序发送输出后也有正常的应答信号，但是实际上输出不是写入的值。而且这个问题不是一上电就这样，有时候运行到一半出问题。然后重启下就有好了。目前找不到该怎么排查问题，望协助

TCA9548A: TCA9548A输出接电平转换IC级联问题

?? ? — Mon, 18 May 2026 02:09:09 GMT

Part Number: TCA9548A

主3.3V I2C接TCA9548， TCA9548的vdd接3.3V电平，输出8路I2C都上拉3.3V，其中一路I2C，接了3.3V转1.8V的电平转换IC，这时会把TCA9548的I2C拉死，clk无输出，这时把VDD改为1.8V就可以正常通讯，这个是什么原因，试过把电平转换高压侧的3.3V上拉去掉，也可以（就是把TCA9548输出的这路从I2C的这路上拉去掉，也不会死掉）

DP83826E: sch review

Jeff Wang — Sun, 17 May 2026 15:05:44 GMT

Part Number: DP83826E

Hi,

could you help review byd dp83826e sch?

DP83826ERHBR sch.pdf

best regards,

jeff wang

DS320PR410: DS320PR410 SigCon Architect Profile Updater cannot be downloaded

tao honggang — Fri, 15 May 2026 08:45:09 GMT

Part Number: DS320PR410

I will work with the DS320PR410 and have installed the SigCon Architect EVM GUI v3.0.0.14 software on my system.

To properly configure the device within the software, I understand that I need the specific DS320PR410 SigCon Architect Profile Updater. I have tried to download it from the official TI website using the link typically associated with it (e.g., the link for tool DS320PR410-SIGCON-PROFILE), but I have been unable to access it successfully.

Could anyone kindly point me to the correct and currently active link for downloading this essential profile updater?

Thank you very much for your time and support.

DS320PR410: The DS320PR410 SigCon Architect Profile Updater cannot be downloaded

tao honggang — Fri, 15 May 2026 08:34:50 GMT

Part Number: DS320PR410

I will work with the DS320PR410 and have installed the SigCon Architect EVM GUI v3.0.0.14 software on my system.

Could anyone kindly point me to the correct and currently active link for downloading this essential profile updater?

Thank you very much for your time and support.

DS320PR410: The DS320PR410 SigCon Architect Profile Updater cannot be downloaded

tao honggang — Fri, 15 May 2026 08:32:55 GMT

Part Number: DS320PR410

I will work with the DS320PR410 and have installed the SigCon Architect EVM GUI v3.0.0.14 software on my system.

Could anyone kindly point me to the correct and currently active link for downloading this essential profile updater?

Thank you very much for your time and support.

TFP401A: TFP401A的问题

user1252639 — Fri, 15 May 2026 02:06:12 GMT

Part Number: TFP401A
Other Parts Discussed in Thread: SN75LVDS83B, , TFP401

应用：

RK3576核心板输出HDMI信号，转成RGB，再通过转SN75LVDS83B转成LVDS，然后接屏。

问题：

首先使用LT8619C将HDMI转成RGB，显示正常；

换成TFP401A转RGB，其他电路完全一样，显示异常；
排查：

通过FPGA抓取TFP401A的输出控制信号，发现，DE信号异常，比如：在场同步期间DE信号应该无效才对，但是抓取的波形显示，DE会有高脉冲，持续可能在100多个时钟周期，另外，将TFP401A输出的RGB转成VGA显示正常(VGA显示使用行场同步信号，不用DE)，所以判断，DE信号异常就是问题的根源，但同样的核心板，LT8519C就完全正常，这说明问题出在TFP401A身上！！有人知道为什么呢？？？