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[参考译文] TMS320F28379D:通用电机控制实验室移植问题

Guru**** 633105 points
Other Parts Discussed in Thread: TMS320F28379D, DRV8323, BOOSTXL-DRV8323RS
请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1103381/tms320f28379d-universal-motor-control-lab-porting-issue

器件型号:TMS320F28379D
主题中讨论的其他器件: DRV8323BOOSTXL-DRV8323RS

我正在尝试将 通用电机控制实验室代码(围绕 F280025C 构建)移植到 TMS320F28379D 控制器。   我在移植时没有更改链接器命令文件。

我收到此函数的错误。

//初始化用户参数  
user_setMotor1Params (obj->userParamsHandle);

我的程序到达此函数的断点、但当我尝试步入函数时、CCS IDE 会禁用运行控制按钮、并且程序计数器位置未知。 CPU 复位或重新启动按钮也被禁用。  当我打开 映射文件时,没有为 USER_setMotor1Params()分配 ROM 位置。  如何解决此问题

******************************************************************************
             TMS320C2000 Linker PC v21.6.0                     
******************************************************************************
>> Linked Sat May 21 13:39:08 2022

OUTPUT FILE NAME:   <NextGenMotorController.out>
ENTRY POINT SYMBOL: "code_start"  address: 00080000


MEMORY CONFIGURATION

         name            origin    length      used     unused   attr    fill
----------------------  --------  ---------  --------  --------  ----  --------
PAGE 0:
  BOOT_RSVD             00000002   00000126  00000000  00000126  RWIX
  RAMM0S                00000128   00000118  00000100  00000018  RWIX
  RAMM1D                00000240   000005b8  00000260  00000358  RWIX
  RAMM1_RSVD            000007f8   00000008  00000000  00000008  RWIX
  RAMLS4                0000a000   00000600  000005a8  00000058  RWIX
  RAMLS567              0000a600   00001a00  00001039  000009c7  RWIX
  RAMGS0                0000c000   000007f8  00000220  000005d8  RWIX
  RAMGS0_RSVD           0000c7f8   00000008  00000000  00000008  RWIX
  BEGIN                 00080000   00000002  00000002  00000000  RWIX
  FLASHBANK0_BOOT       00080002   00000ffe  00000000  00000ffe  RWIX
  FLASHBANK0_CODE       00081000   0000d000  00005209  00007df7  RWIX
  FLASHBANK0_DATA       0008e000   00001000  00000000  00001000  RWIX
  FLASHBANK0_SECT15     0008f000   00000ff0  00000000  00000ff0  RWIX
  FLASHBANK0_SEC15_RSVD 0008fff0   00000010  00000000  00000010  RWIX
  BOOTROM               003f0000   00008000  00000000  00008000  RWIX
  BOOTROM_EXT           003f8000   00007fc0  00000000  00007fc0  RWIX
  RESET                 003fffc0   00000002  00000000  00000002  RWIX

PAGE 1:
  ADCARESULT            00000b00   00000018  00000000  00000018  RWIX
  ADCBRESULT            00000b20   00000018  00000000  00000018  RWIX
  ADCCRESULT            00000b40   00000018  00000000  00000018  RWIX
  ADCDRESULT            00000b60   00000018  00000000  00000018  RWIX
  CPUTIMER0             00000c00   00000008  00000000  00000008  RWIX
  CPUTIMER1             00000c08   00000008  00000000  00000008  RWIX
  CPUTIMER2             00000c10   00000008  00000000  00000008  RWIX
  PIECTRL               00000ce0   0000001a  00000000  0000001a  RWIX
  PIEVECTTABLE          00000d00   00000200  00000000  00000200  RWIX
  DMA                   00001000   00000200  00000000  00000200  RWIX
  CLA1                  00001400   00000080  00000000  00000080  RWIX
  CLB1LOGICCFG          00003000   00000052  00000000  00000052  RWIX
  CLB1LOGICCTRL         00003100   00000040  00000000  00000040  RWIX
  CLB1DATAEXCH          00003200   00000200  00000000  00000200  RWIX
  CLB2LOGICCFG          00003400   00000052  00000000  00000052  RWIX
  CLB2LOGICCTRL         00003500   00000040  00000000  00000040  RWIX
  CLB2DATAEXCH          00003600   00000200  00000000  00000200  RWIX
  CLB3LOGICCFG          00003800   00000052  00000000  00000052  RWIX
  CLB3LOGICCTRL         00003900   00000040  00000000  00000040  RWIX
  CLB3DATAEXCH          00003a00   00000200  00000000  00000200  RWIX
  CLB4LOGICCFG          00003c00   00000052  00000000  00000052  RWIX
  CLB4LOGICCTRL         00003d00   00000040  00000000  00000040  RWIX
  CLB4DATAEXCH          00003e00   00000200  00000000  00000200  RWIX
  EPWM1                 00004000   00000100  00000000  00000100  RWIX
  EPWM2                 00004100   00000100  00000000  00000100  RWIX
  EPWM3                 00004200   00000100  00000000  00000100  RWIX
  EPWM4                 00004300   00000100  00000000  00000100  RWIX
  EPWM5                 00004400   00000100  00000000  00000100  RWIX
  EPWM6                 00004500   00000100  00000000  00000100  RWIX
  EPWM7                 00004600   00000100  00000000  00000100  RWIX
  EPWM8                 00004700   00000100  00000000  00000100  RWIX
  EPWM9                 00004800   00000100  00000000  00000100  RWIX
  EPWM10                00004900   00000100  00000000  00000100  RWIX
  EPWM11                00004a00   00000100  00000000  00000100  RWIX
  EPWM12                00004b00   00000100  00000000  00000100  RWIX
  ECAP1                 00005000   00000020  00000000  00000020  RWIX
  ECAP2                 00005020   00000020  00000000  00000020  RWIX
  ECAP3                 00005040   00000020  00000000  00000020  RWIX
  ECAP4                 00005060   00000020  00000000  00000020  RWIX
  ECAP5                 00005080   00000020  00000000  00000020  RWIX
  ECAP6                 000050a0   00000020  00000000  00000020  RWIX
  EQEP1                 00005100   00000022  00000000  00000022  RWIX
  EQEP2                 00005140   00000022  00000000  00000022  RWIX
  EQEP3                 00005180   00000022  00000000  00000022  RWIX
  DACA                  00005c00   00000008  00000000  00000008  RWIX
  DACB                  00005c10   00000008  00000000  00000008  RWIX
  DACC                  00005c20   00000008  00000000  00000008  RWIX
  CMPSS1                00005c80   00000020  00000000  00000020  RWIX
  CMPSS2                00005ca0   00000020  00000000  00000020  RWIX
  CMPSS3                00005cc0   00000020  00000000  00000020  RWIX
  CMPSS4                00005ce0   00000020  00000000  00000020  RWIX
  CMPSS5                00005d00   00000020  00000000  00000020  RWIX
  CMPSS6                00005d20   00000020  00000000  00000020  RWIX
  CMPSS7                00005d40   00000020  00000000  00000020  RWIX
  CMPSS8                00005d60   00000020  00000000  00000020  RWIX
  SDFM1                 00005e00   00000080  00000000  00000080  RWIX
  SDFM2                 00005e80   00000080  00000000  00000080  RWIX
  MCBSPA                00006000   00000024  00000000  00000024  RWIX
  MCBSPB                00006040   00000024  00000000  00000024  RWIX
  SPIA                  00006100   00000010  00000000  00000010  RWIX
  SPIB                  00006110   00000010  00000000  00000010  RWIX
  ***                  00006120   00000010  00000000  00000010  RWIX
  UPP                   00006200   00000048  00000000  00000048  RWIX
  WD                    00007000   0000002b  00000000  0000002b  RWIX
  NMIINTRUPT            00007060   00000007  00000000  00000007  RWIX
  XINT                  00007070   0000000b  00000000  0000000b  RWIX
  SCIA                  00007200   00000010  00000000  00000010  RWIX
  SCIB                  00007210   00000010  00000000  00000010  RWIX
  SCIC                  00007220   00000010  00000000  00000010  RWIX
  SCID                  00007230   00000010  00000000  00000010  RWIX
  I2CA                  00007300   00000022  00000000  00000022  RWIX
  I2CB                  00007340   00000022  00000000  00000022  RWIX
  ADCA                  00007400   00000080  00000000  00000080  RWIX
  ADCB                  00007480   00000080  00000000  00000080  RWIX
  ADCC                  00007500   00000080  00000000  00000080  RWIX
  ADCD                  00007580   00000080  00000000  00000080  RWIX
  INPUTXBAR             00007900   00000020  00000000  00000020  RWIX
  XBAR                  00007920   00000020  00000000  00000020  RWIX
  SYNCSOC               00007940   00000006  00000000  00000006  RWIX
  DMACLASRCSEL          00007980   0000001a  00000000  0000001a  RWIX
  EPWMXBAR              00007a00   00000040  00000000  00000040  RWIX
  CLBXBAR               00007a40   00000040  00000000  00000040  RWIX
  OUTPUTXBAR            00007a80   00000040  00000000  00000040  RWIX
  GPIOCTRL              00007c00   00000180  00000000  00000180  RWIX
  GPIODATA              00007f00   00000030  00000000  00000030  RWIX
  EMIF1                 00047000   00000070  00000000  00000070  RWIX
  EMIF2                 00047800   00000070  00000000  00000070  RWIX
  CANA                  00048000   00000200  00000000  00000200  RWIX
  CANB                  0004a000   00000200  00000000  00000200  RWIX
  IPC                   00050000   00000024  00000000  00000024  RWIX
  FLASHPUMPSEMAPHORE    00050024   00000002  00000000  00000002  RWIX
  DEVCFG                0005d000   0000012e  00000000  0000012e  RWIX
  ANALOGSUBSYS          0005d180   00000048  00000000  00000048  RWIX
  CLKCFG                0005d200   00000032  00000000  00000032  RWIX
  CPUSYS                0005d300   00000082  00000000  00000082  RWIX
  ROMPREFETCH           0005e608   00000002  00000000  00000002  RWIX
  DCSMZ1                0005f000   00000024  00000000  00000024  RWIX
  DCSMZ2                0005f040   00000024  00000000  00000024  RWIX
  DCSMCOMMON            0005f070   00000008  00000000  00000008  RWIX
  MEMCFG                0005f400   00000080  00000000  00000080  RWIX
  EMIF1CONFIG           0005f480   00000020  00000000  00000020  RWIX
  EMIF2CONFIG           0005f4a0   00000020  00000000  00000020  RWIX
  ACCESSPROTECTION      0005f4c0   00000040  00000000  00000040  RWIX
  MEMORYERROR           0005f500   00000040  00000000  00000040  RWIX
  ROMWAITSTATE          0005f540   00000002  00000000  00000002  RWIX
  FLASH0CTRL            0005f800   00000182  00000000  00000182  RWIX
  FLASH0ECC             0005fb00   00000028  00000000  00000028  RWIX


SECTION ALLOCATION MAP

 output                                  attributes/
section   page    origin      length       input sections
--------  ----  ----------  ----------   ----------------
.reset     0    003fffc0    00000000     DSECT

ctrlfuncs 
*          0    0000a600    00000000     UNINITIALIZED

codestart 
*          0    00080000    00000002     
                  00080000    00000002     F2837xD_CodeStartBranch.obj (codestart)

.text      0    00081050    00004148     
                  00081050    00000aa9     motor1_drive.obj (.text)
                  00081af9    00000001     fast_full_lib_eabi.lib : est_flib_priv.obj (.text:EST_checkForErrors)
                  00081afa    000007c8     hal.obj (.text)
                  000822c2    000006af     motor_common.obj (.text)
                  00082971    00000435     user_mtr1.obj (.text)
                  00082da6    0000040d     fast_full_lib_eabi.lib : est_flib_priv.obj (.text:EST_setParams)
                  000831b3    00000285                            : est_flib_priv.obj (.text:EST_updateState)
                  00083438    00000207     spi.obj (.text)
                  0008363f    000001c5     sys_main.obj (.text)
                  00083804    000001be     fast_full_lib_eabi.lib : est_flib_priv.obj (.text:EST_reset)
                  000839c2    0000018c     gpio.obj (.text)
                  00083b4e    0000017c     drv8323s.obj (.text)
                  00083cca    00000176     epwm.obj (.text)
                  00083e40    0000015c     interrupt.obj (.text)
                  00083f9c    0000010f     fast_full_lib_eabi.lib : est_Traj_flib_priv.obj (.text:EST_Traj_configure)
                  000840ab    000000ff     sci.obj (.text)
                  000841aa    000000c4     fast_full_lib_eabi.lib : est_flib_priv.obj (.text:EST_init)
                  0008426e    000000c2     xbar.obj (.text)
                  00084330    000000be     dac128s085.obj (.text)
                  000843ee    000000b1     i2c.obj (.text)
                  0008449f    000000ab     fast_full_lib_eabi.lib : est_Traj_flib_priv.obj (.text:EST_Traj_setParams)
                  0008454a    00000086                            : est_Dir_flib_priv.obj (.text:EST_Dir_setLpFilterParams)
                  000845d0    00000077                            : user_flib_priv.obj (.text:USER_setParams_priv)
                  00084647    00000064     cmpss.obj (.text)
                  000846ab    0000005c     fast_full_lib_eabi.lib : est_Flux_flib_priv.obj (.text:EST_Flux_setParams)
                  00084707    00000059                            : est_Traj_flib_priv.obj (.text:EST_Traj_updateState)
                  00084760    0000004e                            : est_Freq_flib_priv.obj (.text:EST_Freq_setParams)
                  000847ae    0000004a                            : est_Dir_flib_priv.obj (.text:EST_Dir_setHpFilterParams)
                  000847f8    0000004a                            : est_Flux_ab_flib_priv.obj (.text:EST_Flux_ab_setDerFilterParams)
                  00084842    0000004a                            : est_Iab_flib_priv.obj (.text:EST_Iab_setLpFilterParams)
                  0008488c    0000004a                            : est_Idq_flib_priv.obj (.text:EST_Idq_setLpFilterParams)
                  000848d6    0000004a                            : est_Vdq_flib_priv.obj (.text:EST_Vdq_setLpFilterParams)
                  00084920    00000045                            : est_RsOnLine_flib_priv.obj (.text:EST_RsOnLine_setParams)
                  00084965    0000003f                            : est_Ls_flib_priv.obj (.text:EST_Ls_setParams)
                  000849a4    0000003d                            : est_RsOnLine_flib_priv.obj (.text:EST_RsOnLine_setLpFilterParams)
                  000849e1    0000003a                            : est_Flux_flib_priv.obj (.text:EST_Flux_updateState)
                  00084a1b    00000035                            : est_Ls_flib_priv.obj (.text:EST_Ls_updateState)
                  00084a50    00000033                            : est_Rr_flib_priv.obj (.text:EST_Rr_updateState)
                  00084a83    00000033                            : est_Rs_flib_priv.obj (.text:EST_Rs_updateState)
                  00084ab6    00000031                            : est_Dir_flib_priv.obj (.text:EST_Dir_init)
                  00084ae7    00000031     rts2800_fpu32_eabi.lib : copy_decompress_lzss.c.obj (.text:decompress:lzss)
                  00084b18    0000002e     fast_full_lib_eabi.lib : est_Iab_flib_priv.obj (.text:EST_Iab_resetLpFilters)
                  00084b46    0000002b     rts2800_fpu32_eabi.lib : autoinit.c.obj (.text:__TI_auto_init_nobinit_nopinit)
                  00084b71    0000002a     fast_full_lib_eabi.lib : est_Freq_flib_priv.obj (.text:EST_Freq_setDerFilterParams)
                  00084b9b    0000002a                            : est_Freq_flib_priv.obj (.text:EST_Freq_setLpFilterParams)
                  00084bc5    0000002a                            : est_Vdq_flib_priv.obj (.text:EST_Vdq_resetLpFilters)
                  00084bef    00000029                            : est_OneOverDcBus_flib_priv.obj (.text:EST_OneOverDcBus_setParams)
                  00084c18    00000029                            : est_RsOnLine_flib_priv.obj (.text:EST_RsOnLine_init)
                  00084c41    00000029                            : est_flib_priv.obj (.text:EST_setFluxBeta_lp)
                  00084c6a    00000029     rts2800_fpu32_eabi.lib : exit.c.obj (.text)
                  00084c93    00000028     fast_full_lib_eabi.lib : est_flib_priv.obj (.text:EST_computeTorque_Nm)
                  00084cbb    00000026                            : est_Angle_flib_priv.obj (.text:EST_Angle_setParams)
                  00084ce1    00000026                            : est_Idq_flib_priv.obj (.text:EST_Idq_resetLpFilters)
                  00084d07    00000024     filter_fo.obj (.text)
                  00084d2b    00000021     cpu_time.obj (.text)
                  00084d4c    0000001e     fast_full_lib_eabi.lib : est_flib_priv.obj (.text:EST_computeLmag_H)
                  00084d6a    0000001d     rts2800_fpu32_eabi.lib : memcpy.c.obj (.text)
                  00084d87    0000001c     fast_full_lib_eabi.lib : est_Dir_flib_priv.obj (.text:EST_Dir_resetLpFilters)
                  00084da3    0000001c                            : est_Rr_flib_priv.obj (.text:EST_Rr_setParams)
                  00084dbf    0000001c                            : est_Rs_flib_priv.obj (.text:EST_Rs_setParams)
                  00084ddb    0000001c                            : est_Traj_flib_priv.obj (.text:EST_Traj_init)
                  00084df7    0000001c                            : est_flib_priv.obj (.text:EST_setFreqBetaOmega_der)
                  00084e13    0000001b                            : est_flib_priv.obj (.text:EST_setFlux_ab_betaOmega_der)
                  00084e2e    00000018                            : est_Traj_flib_priv.obj (.text:EST_Traj_reset)
                  00084e46    00000017     rts2800_fpu32_eabi.lib : boot28.asm.obj (.text)
                  00084e5d    00000016     fast_full_lib_eabi.lib : est_Flux_ab_flib_priv.obj (.text:EST_Flux_ab_init)
                  00084e73    00000016                            : est_Freq_flib_priv.obj (.text:EST_Freq_init)
                  00084e89    00000016                            : est_Iab_flib_priv.obj (.text:EST_Iab_init)
                  00084e9f    00000016                            : est_Iab_flib_priv.obj (.text:EST_Iab_setParams)
                  00084eb5    00000016                            : est_Idq_flib_priv.obj (.text:EST_Idq_init)
                  00084ecb    00000016                            : est_Vdq_flib_priv.obj (.text:EST_Vdq_init)
                  00084ee1    00000015                            : est_flib_priv.obj (.text:EST_setFreqBeta_lp)
                  00084ef6    00000015                            : est_flib_priv.obj (.text:EST_setIab_beta_lp)
                  00084f0b    00000015                            : est_flib_priv.obj (.text:EST_setIdq_beta_lp)
                  00084f20    00000015                            : est_flib_priv.obj (.text:EST_setVdq_beta_lp)
                  00084f35    00000013                            : est_Idq_flib_priv.obj (.text:EST_Idq_setParams)
                  00084f48    00000013     angle_gen.obj (.text)
                  00084f5b    00000012     fast_full_lib_eabi.lib : est_Vdq_flib_priv.obj (.text:EST_Vdq_setParams)
                  00084f6d    00000012                            : est_flib_priv.obj (.text:EST_initEst)
                  00084f7f    00000010                            : est_Dir_flib_priv.obj (.text:EST_Dir_resetHpFilters)
                  00084f8f    00000010                            : est_Flux_ab_flib_priv.obj (.text:EST_Flux_ab_resetDerFilters)
                  00084f9f    0000000f                            : est_Flux_flib_priv.obj (.text:EST_Flux_init)
                  00084fae    0000000f                            : est_OneOverDcBus_flib_priv.obj (.text:EST_OneOverDcBus_init)
                  00084fbd    0000000f                            : est_all_setup_flib_priv.obj (.text:EST_setFreqLFP_sf)
                  00084fcc    0000000e                            : est_flib_priv.obj (.text:EST_getFlux_Wb)
                  00084fda    0000000e                            : est_flib_priv.obj (.text:EST_getFm_lp_Hz)
                  00084fe8    0000000c                            : est_all_setup_flib_priv.obj (.text:EST_setBemf_sf)
                  00084ff4    0000000c                            : est_all_setup_flib_priv.obj (.text:EST_setOneOverFluxGain_sf)
                  00085000    0000000c     rts2800_fpu32_eabi.lib : args_main.c.obj (.text)
                  0008500c    0000000b     fast_full_lib_eabi.lib : est_Dir_flib_priv.obj (.text:EST_Dir_setParams)
                  00085017    0000000a                            : est_Flux_ab_flib_priv.obj (.text:EST_Flux_ab_setParams)
                  00085021    00000009                            : est_flib_priv.obj (.text:EST_setAngle_rad)
                  0008502a    00000009                            : inverse_flib_priv.obj (.text:INVERSE_setParams)
                  00085033    00000009     rts2800_fpu32_eabi.lib : _lock.c.obj (.text)
                  0008503c    00000008     fast_full_lib_eabi.lib : est_flib_priv.obj (.text:EST_enableTraj)
                  00085044    00000008                            : est_flib_priv.obj (.text:EST_getLs_d_H)
                  0008504c    00000008                            : est_flib_priv.obj (.text:EST_getLs_q_H)
                  00085054    00000008                            : est_flib_priv.obj (.text:EST_getRr_Ohm)
                  0008505c    00000008                            : est_flib_priv.obj (.text:EST_getRsOnLine_Ohm)
                  00085064    00000008                            : est_flib_priv.obj (.text:EST_getRs_Ohm)
                  0008506c    00000008                            : est_flib_priv.obj (.text:EST_setFlag_enablePowerWarp)
                  00085074    00000008                            : est_flib_priv.obj (.text:EST_setRsOnLineId_A)
                  0008507c    00000008                            : est_flib_priv.obj (.text:EST_setRsOnLineId_mag_A)
                  00085084    00000008                            : est_flib_priv.obj (.text:EST_setRsOnLine_Ohm)
                  0008508c    00000008     F2837xD_CodeStartBranch.obj (.text)
                  00085094    00000008     rts2800_fpu32_eabi.lib : copy_decompress_none.c.obj (.text:decompress:none)
                  0008509c    00000007     fast_full_lib_eabi.lib : est_Eab_flib_priv.obj (.text:EST_Eab_setParams)
                  000850a3    00000007                            : est_Flux_flib_priv.obj (.text:EST_Flux_setWaitTimes)
                  000850aa    00000007                            : est_Freq_flib_priv.obj (.text:EST_Freq_resetDerFilter)
                  000850b1    00000007                            : est_Freq_flib_priv.obj (.text:EST_Freq_resetLpFilter)
                  000850b8    00000007                            : est_Ls_flib_priv.obj (.text:EST_Ls_setWaitTimes)
                  000850bf    00000007                            : est_Rr_flib_priv.obj (.text:EST_Rr_setWaitTimes)
                  000850c6    00000007                            : est_Rs_flib_priv.obj (.text:EST_Rs_setWaitTimes)
                  000850cd    00000007                            : est_flib_priv.obj (.text:EST_configureTraj)
                  000850d4    00000007                            : est_flib_priv.obj (.text:EST_disableTraj)
                  000850db    00000007                            : est_flib_priv.obj (.text:EST_isIdle)
                  000850e2    00000007                            : est_flib_priv.obj (.text:EST_isLockRotor)
                  000850e9    00000007                            : est_flib_priv.obj (.text:EST_setWaitTimes)
                  000850f0    00000007                            : est_flib_priv.obj (.text:EST_updateTrajState)
                  000850f7    00000007     rts2800_fpu32_eabi.lib : memset.c.obj (.text)
                  000850fe    00000006     fast_full_lib_eabi.lib : est_Traj_flib_priv.obj (.text:EST_Traj_isError)
                  00085104    00000006                            : est_flib_priv.obj (.text:EST_isError)
                  0008510a    00000006                            : est_flib_priv.obj (.text:EST_isTrajError)
                  00085110    00000006     cputimer.obj (.text)
                  00085116    00000006     rts2800_fpu32_eabi.lib : copy_zero_init.c.obj (.text:decompress:ZI)
                  0008511c    00000005     fast_full_lib_eabi.lib : est_Edq_flib_priv.obj (.text:EST_Edq_setEdq_V)
                  00085121    00000005                            : est_Flux_dq_flib_priv.obj (.text:EST_Flux_dq_setFlux_Wb)
                  00085126    00000005                            : est_Vab_flib_priv.obj (.text:EST_Vab_setVab_V)
                  0008512b    00000005                            : est_flib_priv.obj (.text:EST_enable)
                  00085130    00000005                            : est_flib_priv.obj (.text:EST_getTrajState)
                  00085135    00000004                            : est_Angle_flib_priv.obj (.text:EST_Angle_init)
                  00085139    00000004                            : est_Eab_flib_priv.obj (.text:EST_Eab_init)
                  0008513d    00000004                            : est_Edq_flib_priv.obj (.text:EST_Edq_init)
                  00085141    00000004                            : est_Flux_dq_flib_priv.obj (.text:EST_Flux_dq_init)
                  00085145    00000004                            : est_Ls_flib_priv.obj (.text:EST_Ls_init)
                  00085149    00000004                            : est_Rr_flib_priv.obj (.text:EST_Rr_init)
                  0008514d    00000004                            : est_Rs_flib_priv.obj (.text:EST_Rs_init)
                  00085151    00000004                            : est_Vab_flib_priv.obj (.text:EST_Vab_init)
                  00085155    00000004                            : est_flib_priv.obj (.text:EST_disable)
                  00085159    00000004                            : est_flib_priv.obj (.text:EST_getFlag_enableRsOnLine_inline)
                  0008515d    00000004                            : est_flib_priv.obj (.text:EST_getRoverL_rps_inline)
                  00085161    00000004                            : est_flib_priv.obj (.text:EST_isMotorIdentified)
                  00085165    00000004                            : est_flib_priv.obj (.text:EST_setFlag_bypassLockRotor)
                  00085169    00000004                            : est_flib_priv.obj (.text:EST_setFlag_enableForceAngle)
                  0008516d    00000004                            : est_flib_priv.obj (.text:EST_setFlag_enableRsOnLine_inline)
                  00085171    00000004                            : est_flib_priv.obj (.text:EST_setFlag_enableRsRecalc)
                  00085175    00000004                            : est_flib_priv.obj (.text:EST_setFlag_updateRs)
                  00085179    00000004                            : inverse_flib_priv.obj (.text:INVERSE_init)
                  0008517d    00000004     clarke.obj (.text)
                  00085181    00000004     ipark.obj (.text)
                  00085185    00000004     park.obj (.text)
                  00085189    00000004     pi.obj (.text)
                  0008518d    00000004     svgen.obj (.text)
                  00085191    00000004     traj.obj (.text)
                  00085195    00000002     rts2800_fpu32_eabi.lib : pre_init.c.obj (.text)
                  00085197    00000001                            : startup.c.obj (.text)

.TI.ramfunc 
*          0    00085198    00001039     RUN ADDR = 0000a600
                  00085198    0000072c     fast_full_lib_eabi.lib : est_flib_priv.obj (.TI.ramfunc:EST_runEst)
                  000858c4    0000052b     motor1_drive.obj (.TI.ramfunc:retain)
                  00085def    00000213     fast_full_lib_eabi.lib : est_all_identify_flib_priv.obj (.TI.ramfunc:EST_configureTrajState)
                  00086002    000000ae                            : est_flib_priv.obj (.TI.ramfunc:EST_run)
                  000860b0    0000007f                            : est_all_run_flib_priv.obj (.TI.ramfunc:EST_setupTrajState)
                  0008612f    0000005d                            : est_Traj_flib_priv.obj (.TI.ramfunc:EST_Traj_run)
                  0008618c    00000015                            : est_flib_priv.obj (.TI.ramfunc:EST_doSpeedCtrl)
                  000861a1    00000009                            : est_flib_priv.obj (.TI.ramfunc:EST_getIntValue_spd_Hz)
                  000861aa    00000008                            : est_flib_priv.obj (.TI.ramfunc:EST_doCurrentCtrl)
                  000861b2    00000008                            : est_flib_priv.obj (.TI.ramfunc:EST_getIdRated_A)
                  000861ba    00000007                            : est_flib_priv.obj (.TI.ramfunc:EST_getIntValue_Id_A)
                  000861c1    00000006                            : est_flib_priv.obj (.TI.ramfunc:EST_runTraj)
                  000861c7    00000004                            : est_flib_priv.obj (.TI.ramfunc:EST_isEnabled)
                  000861cb    00000004     sysctl.obj (.TI.ramfunc)
                  000861cf    00000002     fast_full_lib_eabi.lib : est_flib_priv.obj (.TI.ramfunc:EST_getState)

ramfuncs   0    000861d1    00000000     UNINITIALIZEDRUN ADDR = 0000b639

dclfuncs   0    000861d1    00000000     UNINITIALIZEDRUN ADDR = 0000b639

dcl32funcs 
*          0    000861d1    00000000     UNINITIALIZEDRUN ADDR = 0000b639

.cinit     0    000861d4    0000003c     
                  000861d4    00000009     (.cinit..data.load) [load image, compression = lzss]
                  000861dd    00000001     --HOLE-- [fill = 0]
                  000861de    00000006     (__TI_handler_table)
                  000861e4    00000004     (.cinit.est_data.load) [load image, compression = zero_init]
                  000861e8    00000004     (.cinit.foc_data.load) [load image, compression = zero_init]
                  000861ec    00000004     (.cinit.motor_data.load) [load image, compression = zero_init]
                  000861f0    00000004     (.cinit.sys_data.load) [load image, compression = zero_init]
                  000861f4    00000004     (.cinit.user_data.load) [load image, compression = zero_init]
                  000861f8    00000018     (__TI_cinit_table)

.const     0    00081000    0000004c     
                  00081000    00000040     fast_full_lib_eabi.lib : est_flib_priv.obj (.const)
                  00081040    00000004                            : est_Iab_flib_priv.obj (.const)
                  00081044    00000004                            : est_Idq_flib_priv.obj (.const)
                  00081048    00000004                            : est_Vdq_flib_priv.obj (.const)

.init_array 
*          0    00081000    00000000     UNINITIALIZED

.stack     0    00000128    00000100     UNINITIALIZED
                  00000128    00000100     --HOLE--

.data      0    00000496    0000000a     UNINITIALIZED
                  00000496    00000006     rts2800_fpu32_eabi.lib : exit.c.obj (.data)
                  0000049c    00000002                            : _lock.c.obj (.data:_lock)
                  0000049e    00000002                            : _lock.c.obj (.data:_unlock)

est_data   0    0000a000    000005a8     UNINITIALIZED
                  0000a000    000005a8     fast_full_lib_eabi.lib : est_flib_priv.obj (est_data)

user_data 
*          0    00000240    0000016c     UNINITIALIZED
                  00000240    00000142     motor1_drive.obj (user_data)
                  00000382    0000002a     motor_common.obj (user_data)

foc_data   0    000003c0    000000d6     UNINITIALIZED
                  000003c0    000000d6     motor1_drive.obj (foc_data)

sys_data   0    0000c000    00000074     UNINITIALIZED
                  0000c000    00000074     sys_main.obj (sys_data)

vibc_data 
*          0    0000c000    00000000     UNINITIALIZED

dmaBuf_data 
*          0    0000c000    00000000     UNINITIALIZED

datalog_data 
*          0    0000c000    00000000     UNINITIALIZED

graph_data 
*          0    0000c000    00000000     UNINITIALIZED

sfra_data 
*          0    0000c000    00000000     UNINITIALIZED

SFRA_F32_Data 
*          0    0000c000    00000000     UNINITIALIZED

ctrl_data 
*          0    0000c074    00000000     UNINITIALIZED

motor_data 
*          0    0000c080    000001a0     UNINITIALIZED
                  0000c080    000001a0     motor1_drive.obj (motor_data)

MODULE SUMMARY

       Module                           code    ro data   rw data
       ------                           ----    -------   -------
    .\
       sys_main.obj                     453     0         116    
    +--+--------------------------------+-------+---------+---------+
       Total:                           453     0         116    
                                                                 
    .\src_board\
       hal.obj                          1992    0         0      
       user_mtr1.obj                    1077    0         0      
       drv8323s.obj                     380     0         0      
       dac128s085.obj                   190     0         0      
    +--+--------------------------------+-------+---------+---------+
       Total:                           3639    0         0      
                                                                 
    .\src_control\
       motor1_drive.obj                 5375    0         952    
       motor_common.obj                 1711    0         42     
    +--+--------------------------------+-------+---------+---------+
       Total:                           7086    0         994    
                                                                 
    .\src_device\
       F2837xD_CodeStartBranch.obj      10      0         0      
    +--+--------------------------------+-------+---------+---------+
       Total:                           10      0         0      
                                                                 
    .\src_driver\
       spi.obj                          519     0         0      
       gpio.obj                         396     0         0      
       epwm.obj                         374     0         0      
       interrupt.obj                    348     0         0      
       sci.obj                          255     0         0      
       xbar.obj                         194     0         0      
       i2c.obj                          177     0         0      
       cmpss.obj                        100     0         0      
       sysctl.obj                       8       0         0      
       cputimer.obj                     6       0         0      
    +--+--------------------------------+-------+---------+---------+
       Total:                           2377    0         0      
                                                                 
    .\src_foc\
       filter_fo.obj                    36      0         0      
       cpu_time.obj                     33      0         0      
       angle_gen.obj                    19      0         0      
       clarke.obj                       4       0         0      
       ipark.obj                        4       0         0      
       park.obj                         4       0         0      
       pi.obj                           4       0         0      
       svgen.obj                        4       0         0      
       traj.obj                         4       0         0      
    +--+--------------------------------+-------+---------+---------+
       Total:                           112     0         0      
                                                                 
    C:\ti\DockingF28379D\C2000Ware_MotorControl_SDK_4_00_00_00\libraries\observers\est_lib\lib\fast_full_lib_eabi.lib
       est_flib_priv.obj                6960    64        1448   
       est_all_identify_flib_priv.obj   1062    0         0      
       est_Traj_flib_priv.obj           775     0         0      
       est_Dir_flib_priv.obj            312     0         0      
       est_all_run_flib_priv.obj        254     0         0      
       est_Freq_flib_priv.obj           198     0         0      
       est_Flux_flib_priv.obj           172     0         0      
       est_RsOnLine_flib_priv.obj       171     0         0      
       est_Iab_flib_priv.obj            164     4         0      
       est_Vdq_flib_priv.obj            156     4         0      
       est_Idq_flib_priv.obj            153     4         0      
       est_Ls_flib_priv.obj             127     0         0      
       est_Flux_ab_flib_priv.obj        122     0         0      
       user_flib_priv.obj               119     0         0      
       est_Rr_flib_priv.obj             90      0         0      
       est_Rs_flib_priv.obj             90      0         0      
       est_OneOverDcBus_flib_priv.obj   56      0         0      
       est_Angle_flib_priv.obj          42      0         0      
       est_all_setup_flib_priv.obj      39      0         0      
       inverse_flib_priv.obj            13      0         0      
       est_Eab_flib_priv.obj            11      0         0      
       est_Edq_flib_priv.obj            9       0         0      
       est_Flux_dq_flib_priv.obj        9       0         0      
       est_Vab_flib_priv.obj            9       0         0      
    +--+--------------------------------+-------+---------+---------+
       Total:                           11113   76        1448   
                                                                 
    C:\ti\ccs1110\ccs\tools\compiler\ti-cgt-c2000_21.6.0.LTS\lib\rts2800_fpu32_eabi.lib
       copy_decompress_lzss.c.obj       49      0         0      
       exit.c.obj                       41      0         6      
       autoinit.c.obj                   43      0         0      
       memcpy.c.obj                     29      0         0      
       boot28.asm.obj                   23      0         0      
       _lock.c.obj                      9       0         4      
       args_main.c.obj                  12      0         0      
       copy_decompress_none.c.obj       8       0         0      
       memset.c.obj                     7       0         0      
       copy_zero_init.c.obj             6       0         0      
       pre_init.c.obj                   2       0         0      
       startup.c.obj                    1       0         0      
    +--+--------------------------------+-------+---------+---------+
       Total:                           230     0         10     
                                                                 
       Stack:                           0       0         256    
       Linker Generated:                0       59        0      
    +--+--------------------------------+-------+---------+---------+
       Grand Total:                     25020   135       2824   


LINKER GENERATED COPY TABLES

__TI_cinit_table @ 000861f8 records: 6, size/record: 4, table size: 24
	.data: load addr=000861d4, load size=00000009 bytes, run addr=00000496, run size=0000000a bytes, compression=lzss
	est_data: load addr=000861e4, load size=00000004 bytes, run addr=0000a000, run size=000005a8 bytes, compression=zero_init
	foc_data: load addr=000861e8, load size=00000004 bytes, run addr=000003c0, run size=000000d6 bytes, compression=zero_init
	motor_data: load addr=000861ec, load size=00000004 bytes, run addr=0000c080, run size=000001a0 bytes, compression=zero_init
	sys_data: load addr=000861f0, load size=00000004 bytes, run addr=0000c000, run size=00000074 bytes, compression=zero_init
	user_data: load addr=000861f4, load size=00000004 bytes, run addr=00000240, run size=0000016c bytes, compression=zero_init


LINKER GENERATED HANDLER TABLE

__TI_handler_table @ 000861de records: 3, size/record: 2, table size: 6
	index: 0, handler: __TI_decompress_lzss
	index: 1, handler: __TI_decompress_none
	index: 2, handler: __TI_zero_init


GLOBAL DATA SYMBOLS: SORTED BY DATA PAGE

address     data page           name
--------    ----------------    ----
00000128       4 (00000100)     __stack

00000240       9 (00000240)     halMtr_M1

00000280       a (00000280)     userParams_M1

00000382       e (00000380)     halHandle
00000384       e (00000380)     hal

000003c0       f (000003c0)     ipark_V_M1
000003c4       f (000003c0)     park_I_M1
000003c8       f (000003c0)     park_V_M1
000003cc       f (000003c0)     svgen_M1
000003d0       f (000003c0)     clarke_V_M1
000003d6       f (000003c0)     clarke_I_M1
000003dc       f (000003c0)     angleGen_M1
000003e4       f (000003c0)     traj_spd_M1
000003ee       f (000003c0)     drvicVars_M1

00000400      10 (00000400)     pi_Id_M1
00000410      10 (00000400)     pi_Iq_M1
00000420      10 (00000400)     pi_spd_M1

00000440      11 (00000440)     motorSetVars_M1

00000496      12 (00000480)     __TI_enable_exit_profile_output
00000498      12 (00000480)     __TI_cleanup_ptr
0000049a      12 (00000480)     __TI_dtors_ptr
0000049c      12 (00000480)     _lock
0000049e      12 (00000480)     _unlock

0000a000     280 (0000a000)     est

0000c000     300 (0000c000)     cpuTimeHandle
0000c002     300 (0000c000)     dac128sHandle
0000c004     300 (0000c000)     systemVars
0000c014     300 (0000c000)     cpuTime

0000c040     301 (0000c040)     dac128s

0000c080     302 (0000c080)     motorHandle_M1

0000c0c0     303 (0000c0c0)     motorVars_M1


GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name 

page  address   name                           
----  -------   ----                           
0     00084f55  ANGLE_GEN_init                 
0     00084f48  ANGLE_GEN_setParams            
0     00084c6a  C$$EXIT                        
0     0008517d  CLARKE_init                    
0     00084693  CMPSS_configFilterHigh         
0     0008467b  CMPSS_configFilterLow          
0     00084666  CMPSS_configLatchOnPWMSYNC     
0     00084647  CMPSS_configRamp               
0     00085110  CPUTimer_setEmulationMode      
0     00084d46  CPU_TIME_init                  
0     00084d2b  CPU_TIME_reset                 
0     000843e4  DAC128S_init                   
0     000843a2  DAC128S_setupSPI               
0     0008437e  DAC128S_writeCommand           
0     00084330  DAC128S_writeData              
0     00083c93  DRV8323_enable                 
0     00083c8c  DRV8323_getDeadTime            
0     00083c86  DRV8323_getPWMMode             
0     00083c80  DRV8323_getPeakSinkCurHS       
0     00083c7a  DRV8323_getPeakSinkCurLS       
0     00083c74  DRV8323_getPeakSourCurHS       
0     00083c6e  DRV8323_getPeakSourCurLS       
0     00083c67  DRV8323_getPeakSourTime        
0     00083c61  DRV8323_getVDSDeglitch         
0     00083c5e  DRV8323_init                   
0     00083c27  DRV8323_readData               
0     00083bad  DRV8323_readSPI                
0     00083c25  DRV8323_setGPIOCSNumber        
0     00083c23  DRV8323_setGPIOENNumber        
0     00083c21  DRV8323_setSPIHandle           
0     00083bea  DRV8323_setupSPI               
0     00083b74  DRV8323_writeData              
0     00083b4e  DRV8323_writeSPI               
0     00083cd3  EPWM_configureSignal           
0     00083cca  EPWM_setEmulationMode          
0     00085135  EST_Angle_init                 
0     00084cbb  EST_Angle_setParams            
0     00084ab6  EST_Dir_init                   
0     00084f7f  EST_Dir_resetHpFilters         
0     00084d87  EST_Dir_resetLpFilters         
0     000847ae  EST_Dir_setHpFilterParams      
0     0008454a  EST_Dir_setLpFilterParams      
0     0008500c  EST_Dir_setParams              
0     00085139  EST_Eab_init                   
0     0008509c  EST_Eab_setParams              
0     0008513d  EST_Edq_init                   
0     0008511c  EST_Edq_setParams              
0     00084e5d  EST_Flux_ab_init               
0     00084f8f  EST_Flux_ab_resetDerFilters    
0     000847f8  EST_Flux_ab_setDerFilterParams 
0     00085017  EST_Flux_ab_setParams          
0     00085141  EST_Flux_dq_init               
0     00085121  EST_Flux_dq_setParams          
0     00084f9f  EST_Flux_init                  
0     000846ab  EST_Flux_setParams             
0     000850a3  EST_Flux_setWaitTimes          
0     000849e1  EST_Flux_updateState           
0     00084e73  EST_Freq_init                  
0     000850aa  EST_Freq_resetDerFilter        
0     000850b1  EST_Freq_resetLpFilter         
0     00084b71  EST_Freq_setDerFilterParams    
0     00084b9b  EST_Freq_setLpFilterParams     
0     00084760  EST_Freq_setParams             
0     00084e89  EST_Iab_init                   
0     00084b18  EST_Iab_resetLpFilters         
0     00084842  EST_Iab_setLpFilterParams      
0     00084e9f  EST_Iab_setParams              
0     00084eb5  EST_Idq_init                   
0     00084ce1  EST_Idq_resetLpFilters         
0     0008488c  EST_Idq_setLpFilterParams      
0     00084f35  EST_Idq_setParams              
0     00085145  EST_Ls_init                    
0     00084965  EST_Ls_setParams               
0     000850b8  EST_Ls_setWaitTimes            
0     00084a1b  EST_Ls_updateState             
0     00084fae  EST_OneOverDcBus_init          
0     00084bef  EST_OneOverDcBus_setParams     
0     00085149  EST_Rr_init                    
0     00084da3  EST_Rr_setParams               
0     000850bf  EST_Rr_setWaitTimes            
0     00084a50  EST_Rr_updateState             
0     00084c18  EST_RsOnLine_init              
0     000849a4  EST_RsOnLine_setLpFilterParams 
0     00084920  EST_RsOnLine_setParams         
0     0008514d  EST_Rs_init                    
0     00084dbf  EST_Rs_setParams               
0     000850c6  EST_Rs_setWaitTimes            
0     00084a83  EST_Rs_updateState             
0     00083f9c  EST_Traj_configure             
0     00084ddb  EST_Traj_init                  
0     000850fe  EST_Traj_isError               
0     00084e2e  EST_Traj_reset                 
0     0000b597  EST_Traj_run                   
0     0008449f  EST_Traj_setParams             
0     00084707  EST_Traj_updateState           
0     00085151  EST_Vab_init                   
0     00085126  EST_Vab_setParams              
0     00084ecb  EST_Vdq_init                   
0     00084bc5  EST_Vdq_resetLpFilters         
0     000848d6  EST_Vdq_setLpFilterParams      
0     00084f5b  EST_Vdq_setParams              
0     00081af9  EST_checkForErrors             
0     00084d4c  EST_computeLmag_H              
0     00084c93  EST_computeTorque_Nm           
0     000850cd  EST_configureTraj              
0     0000b257  EST_configureTrajState         
0     00085155  EST_disable                    
0     000850d4  EST_disableTraj                
0     0000b612  EST_doCurrentCtrl              
0     0000b5f4  EST_doSpeedCtrl                
0     0008512b  EST_enable                     
0     0008503c  EST_enableTraj                 
0     00085159  EST_getFlag_enableRsOnLine     
0     00084fcc  EST_getFlux_Wb                 
0     00084fda  EST_getFm_lp_Hz                
0     0000b61a  EST_getIdRated_A               
0     0000b622  EST_getIntValue_Id_A           
0     0000b609  EST_getIntValue_spd_Hz         
0     00085044  EST_getLs_d_H                  
0     0008504c  EST_getLs_q_H                  
0     0008515d  EST_getRoverL_rps              
0     00085054  EST_getRr_Ohm                  
0     0008505c  EST_getRsOnLine_Ohm            
0     00085064  EST_getRs_Ohm                  
0     0000b637  EST_getState                   
0     00085130  EST_getTrajState               
0     000841aa  EST_init                       
0     00084f6d  EST_initEst                    
0     0000b62f  EST_isEnabled                  
0     00085104  EST_isError                    
0     000850db  EST_isIdle                     
0     000850e2  EST_isLockRotor                
0     00085161  EST_isMotorIdentified          
0     0008510a  EST_isTrajError                
0     00083804  EST_reset                      
0     0000b46a  EST_run                        
0     0000b629  EST_runTraj                    
0     00085021  EST_setAngle_rad               
0     00084fe8  EST_setBemf_sf                 
0     00085165  EST_setFlag_bypassLockRotor    
0     00085169  EST_setFlag_enableForceAngle   
0     0008506c  EST_setFlag_enablePowerWarp    
0     0008516d  EST_setFlag_enableRsOnLine     
0     00085171  EST_setFlag_enableRsRecalc     
0     00085175  EST_setFlag_updateRs           
0     00084c41  EST_setFluxBeta_lp             
0     00084e13  EST_setFlux_ab_betaOmega_der   
0     00084df7  EST_setFreqBetaOmega_der       
0     00084ee1  EST_setFreqBeta_lp             
0     00084fbd  EST_setFreqLFP_sf              
0     00084ef6  EST_setIab_beta_lp             
0     00084f0b  EST_setIdq_beta_lp             
0     00084ff4  EST_setOneOverFluxGain_sf      
0     00082da6  EST_setParams                  
0     00085074  EST_setRsOnLineId_A            
0     0008507c  EST_setRsOnLineId_mag_A        
0     00085084  EST_setRsOnLine_Ohm            
0     00084f20  EST_setVdq_beta_lp             
0     000850e9  EST_setWaitTimes               
0     0000b518  EST_setupTrajState             
0     000831b3  EST_updateState                
0     000850f0  EST_updateTrajState            
0     00084d28  FILTER_FO_getDenCoeffs         
0     00084d1f  FILTER_FO_getInitialConditions 
0     00084d19  FILTER_FO_getNumCoeffs         
0     00084d15  FILTER_FO_init                 
0     00084d12  FILTER_FO_setDenCoeffs         
0     00084d0c  FILTER_FO_setInitialConditions 
0     00084d07  FILTER_FO_setNumCoeffs         
0     00083b3c  GPIO_getDirectionMode          
0     00083b10  GPIO_getPadConfig              
0     00083af1  GPIO_getQualificationMode      
0     00083ad0  GPIO_setAnalogMode             
0     00083ab0  GPIO_setDirectionMode          
0     00083a90  GPIO_setInterruptPin           
0     00083a6e  GPIO_setMasterCore             
0     00083a2f  GPIO_setPadConfig              
0     000839ff  GPIO_setPinConfig              
0     000839dd  GPIO_setQualificationMode      
0     000839c2  GPIO_setQualificationPeriod    
0     0008228d  HAL_MTR1_init                  
0     0008228c  HAL_MTR_setParams              
0     00082285  HAL_clearDataRAM               
0     00082281  HAL_disableGlobalInts          
0     00082279  HAL_disableWdog                
0     00082267  HAL_enableCtrlInts             
0     00082262  HAL_enableDRV                  
0     0008225f  HAL_enableDebugInt             
0     0008225b  HAL_enableGlobalInts           
0     00082205  HAL_init                       
0     00082200  HAL_readDRVData                
0     000821e7  HAL_setMtrCMPSSDACValue        
0     000821e6  HAL_setParams                  
0     000821cd  HAL_setTriggerPrams            
0     0008219a  HAL_setupADCTriggerTimer       
0     0008213a  HAL_setupCMPSSs                
0     0008211f  HAL_setupCPUUsageTimer         
0     0008210e  HAL_setupDMA                   
0     00082109  HAL_setupDRVSPI                
0     00081e76  HAL_setupGPIOs                 
0     00081e60  HAL_setupGate                  
0     00081def  HAL_setupI2CA                  
0     00081d1d  HAL_setupMtrFaults             
0     00081bbf  HAL_setupPWMs                  
0     00081b6d  HAL_setupSCIA                  
0     00081b2c  HAL_setupSPI                   
0     00081b02  HAL_setupTimeBaseTimer         
0     00081afd  HAL_writeDRVData               
0     0008448e  I2C_clearInterruptStatus       
0     00084477  I2C_configureModuleFrequency   
0     0008445e  I2C_disableInterrupt           
0     00084447  I2C_enableInterrupt            
0     0008443a  I2C_getInterruptStatus         
0     000843ee  I2C_initMaster                 
0     00085179  INVERSE_init                   
0     0008502a  INVERSE_setParams              
0     00085181  IPARK_init                     
0     00083f50  Interrupt_disable              
0     00083ea2  Interrupt_enable               
0     00083e5f  Interrupt_initModule           
0     00083e42  Interrupt_initVectorTable      
0     00085185  PARK_init                      
0     00085189  PI_init                        
abs   000861d1  RamfuncsLoadEnd                
abs   00001039  RamfuncsLoadSize               
abs   00085198  RamfuncsLoadStart              
abs   0000b639  RamfuncsRunEnd                 
abs   00001039  RamfuncsRunSize                
abs   0000a600  RamfuncsRunStart               
0     0008418e  SCI_clearInterruptStatus       
0     00084174  SCI_disableInterrupt           
0     0008415a  SCI_enableInterrupt            
0     0008413a  SCI_getInterruptStatus         
0     0008411a  SCI_readCharArray              
0     000840f2  SCI_setBaud                    
0     000840d1  SCI_setConfig                  
0     000840cd  SCI_setWakeFlag                
0     000840ab  SCI_writeCharArray             
0     00083621  SPI_clearInterruptStatus       
0     00083609  SPI_disableInterrupt           
0     000835f1  SPI_enableInterrupt            
0     000835db  SPI_getInterruptStatus         
0     00083438  SPI_pollingFIFOTransaction     
0     000835c2  SPI_pollingNonFIFOTransaction  
0     000835a1  SPI_receive16Bits              
0     00083578  SPI_receive24Bits              
0     00083549  SPI_receive32Bits              
0     0008353e  SPI_setBaudRate                
0     0008351f  SPI_setConfig                  
0     000834fe  SPI_transmit24Bits             
0     000834e2  SPI_transmit32Bits             
0     0008518d  SVGEN_init                     
0     0000b633  SysCtl_delay                   
0     00085191  TRAJ_init                      
0     00082971  USER_setMotor1Params           
0     000845d0  USER_setParams_priv            
0     0008430d  XBAR_clearInputFlag            
0     000842e3  XBAR_getInputFlagStatus        
0     000842bc  XBAR_setCLBMuxConfig           
0     00084295  XBAR_setEPWMMuxConfig          
0     0008426e  XBAR_setOutputMuxConfig        
0     000861f8  __TI_CINIT_Base                
0     00086210  __TI_CINIT_Limit               
0     00086210  __TI_CINIT_Warm                
0     000861de  __TI_Handler_Table_Base        
0     000861e4  __TI_Handler_Table_Limit       
0     00000228  __TI_STACK_END                 
abs   00000100  __TI_STACK_SIZE                
0     00084b46  __TI_auto_init_nobinit_nopinit 
0     00000498  __TI_cleanup_ptr               
0     00084ae7  __TI_decompress_lzss           
0     00085094  __TI_decompress_none           
0     0000049a  __TI_dtors_ptr                 
0     00000496  __TI_enable_exit_profile_output
abs   ffffffff  __TI_pprof_out_hndl            
abs   ffffffff  __TI_prof_data_size            
abs   ffffffff  __TI_prof_data_start           
0     00085116  __TI_zero_init                 
n/a   UNDEFED   __c_args__                     
0     00081afa  __error__                      
0     00000128  __stack                        
0     00085000  _args_main                     
0     00084e46  _c_int00                       
0     0000049c  _lock                          
0     0008503b  _nop                           
0     00085037  _register_lock                 
0     00085033  _register_unlock               
0     00085197  _system_post_cinit             
0     00085195  _system_pre_init               
0     0000049e  _unlock                        
0     00084c6a  abort                          
0     000003dc  angleGen_M1                    
0     000828b2  calculateRMSData               
0     000003d6  clarke_I_M1                    
0     000003d0  clarke_V_M1                    
0     00080000  code_start                     
0     000827ff  collectRMSData                 
0     0000c014  cpuTime                        
0     0000c000  cpuTimeHandle                  
abs   00000496  ctrlVarsLoadEnd                
abs   00000256  ctrlVarsLoadSize               
abs   00000240  ctrlVarsLoadStart              
0     0000a600  ctrlfuncsLoadEnd               
abs   00000000  ctrlfuncsLoadSize              
0     0000a600  ctrlfuncsLoadStart             
0     0000a600  ctrlfuncsRunEnd                
abs   00000000  ctrlfuncsRunSize               
0     0000a600  ctrlfuncsRunStart              
0     0000c040  dac128s                        
0     0000c002  dac128sHandle                  
0     000003ee  drvicVars_M1                   
0     0000a000  est                            
0     00084c6c  exit                           
abs   0000c000  extVarsLoadEnd                 
abs   00000000  extVarsLoadSize                
abs   0000c000  extVarsLoadStart               
0     00000384  hal                            
0     00000382  halHandle                      
0     00000240  halMtr_M1                      
0     00081769  initMotor1CtrlParameters       
0     0008174d  initMotor1Handles              
0     000003c0  ipark_V_M1                     
0     0008363f  main                           
0     00084d6a  memcpy                         
0     000850f7  memset                         
0     0000ad2c  motor1CtrlISR                  
0     0000c080  motorHandle_M1                 
0     00000440  motorSetVars_M1                
abs   0000c220  motorVarsLoadEnd               
abs   00000220  motorVarsLoadSize              
abs   0000c000  motorVarsLoadStart             
0     0000c0c0  motorVars_M1                   
0     000003c4  park_I_M1                      
0     000003c8  park_V_M1                      
0     00000400  pi_Id_M1                       
0     00000410  pi_Iq_M1                       
0     00000420  pi_spd_M1                      
0     0008277e  resetMotorControl              
0     00082758  restartMotorControl            
0     00081458  runMotor1Control               
0     00081050  runMotor1OffsetsCalculation    
0     00082555  runMotorMonitor                
0     000824fc  runRsOnLine                    
0     000824e3  setupClarke_I                  
0     000824cf  setupClarke_V                  
0     000823c5  setupControllers               
0     00082357  setupCurrentControllers        
0     00082342  stopMotorControl               
0     000003cc  svgen_M1                       
0     0000c004  systemVars                     
0     000003e4  traj_spd_M1                    
0     000822c2  updateGlobalVariables          
0     00000280  userParams_M1                  


GLOBAL SYMBOLS: SORTED BY Symbol Address 

page  address   name                           
----  -------   ----                           
0     00000128  __stack                        
0     00000228  __TI_STACK_END                 
0     00000240  halMtr_M1                      
0     00000280  userParams_M1                  
0     00000382  halHandle                      
0     00000384  hal                            
0     000003c0  ipark_V_M1                     
0     000003c4  park_I_M1                      
0     000003c8  park_V_M1                      
0     000003cc  svgen_M1                       
0     000003d0  clarke_V_M1                    
0     000003d6  clarke_I_M1                    
0     000003dc  angleGen_M1                    
0     000003e4  traj_spd_M1                    
0     000003ee  drvicVars_M1                   
0     00000400  pi_Id_M1                       
0     00000410  pi_Iq_M1                       
0     00000420  pi_spd_M1                      
0     00000440  motorSetVars_M1                
0     00000496  __TI_enable_exit_profile_output
0     00000498  __TI_cleanup_ptr               
0     0000049a  __TI_dtors_ptr                 
0     0000049c  _lock                          
0     0000049e  _unlock                        
0     0000a000  est                            
0     0000a600  ctrlfuncsLoadEnd               
0     0000a600  ctrlfuncsLoadStart             
0     0000a600  ctrlfuncsRunEnd                
0     0000a600  ctrlfuncsRunStart              
0     0000ad2c  motor1CtrlISR                  
0     0000b257  EST_configureTrajState         
0     0000b46a  EST_run                        
0     0000b518  EST_setupTrajState             
0     0000b597  EST_Traj_run                   
0     0000b5f4  EST_doSpeedCtrl                
0     0000b609  EST_getIntValue_spd_Hz         
0     0000b612  EST_doCurrentCtrl              
0     0000b61a  EST_getIdRated_A               
0     0000b622  EST_getIntValue_Id_A           
0     0000b629  EST_runTraj                    
0     0000b62f  EST_isEnabled                  
0     0000b633  SysCtl_delay                   
0     0000b637  EST_getState                   
0     0000c000  cpuTimeHandle                  
0     0000c002  dac128sHandle                  
0     0000c004  systemVars                     
0     0000c014  cpuTime                        
0     0000c040  dac128s                        
0     0000c080  motorHandle_M1                 
0     0000c0c0  motorVars_M1                   
0     00080000  code_start                     
0     00081050  runMotor1OffsetsCalculation    
0     00081458  runMotor1Control               
0     0008174d  initMotor1Handles              
0     00081769  initMotor1CtrlParameters       
0     00081af9  EST_checkForErrors             
0     00081afa  __error__                      
0     00081afd  HAL_writeDRVData               
0     00081b02  HAL_setupTimeBaseTimer         
0     00081b2c  HAL_setupSPI                   
0     00081b6d  HAL_setupSCIA                  
0     00081bbf  HAL_setupPWMs                  
0     00081d1d  HAL_setupMtrFaults             
0     00081def  HAL_setupI2CA                  
0     00081e60  HAL_setupGate                  
0     00081e76  HAL_setupGPIOs                 
0     00082109  HAL_setupDRVSPI                
0     0008210e  HAL_setupDMA                   
0     0008211f  HAL_setupCPUUsageTimer         
0     0008213a  HAL_setupCMPSSs                
0     0008219a  HAL_setupADCTriggerTimer       
0     000821cd  HAL_setTriggerPrams            
0     000821e6  HAL_setParams                  
0     000821e7  HAL_setMtrCMPSSDACValue        
0     00082200  HAL_readDRVData                
0     00082205  HAL_init                       
0     0008225b  HAL_enableGlobalInts           
0     0008225f  HAL_enableDebugInt             
0     00082262  HAL_enableDRV                  
0     00082267  HAL_enableCtrlInts             
0     00082279  HAL_disableWdog                
0     00082281  HAL_disableGlobalInts          
0     00082285  HAL_clearDataRAM               
0     0008228c  HAL_MTR_setParams              
0     0008228d  HAL_MTR1_init                  
0     000822c2  updateGlobalVariables          
0     00082342  stopMotorControl               
0     00082357  setupCurrentControllers        
0     000823c5  setupControllers               
0     000824cf  setupClarke_V                  
0     000824e3  setupClarke_I                  
0     000824fc  runRsOnLine                    
0     00082555  runMotorMonitor                
0     00082758  restartMotorControl            
0     0008277e  resetMotorControl              
0     000827ff  collectRMSData                 
0     000828b2  calculateRMSData               
0     00082971  USER_setMotor1Params           
0     00082da6  EST_setParams                  
0     000831b3  EST_updateState                
0     00083438  SPI_pollingFIFOTransaction     
0     000834e2  SPI_transmit32Bits             
0     000834fe  SPI_transmit24Bits             
0     0008351f  SPI_setConfig                  
0     0008353e  SPI_setBaudRate                
0     00083549  SPI_receive32Bits              
0     00083578  SPI_receive24Bits              
0     000835a1  SPI_receive16Bits              
0     000835c2  SPI_pollingNonFIFOTransaction  
0     000835db  SPI_getInterruptStatus         
0     000835f1  SPI_enableInterrupt            
0     00083609  SPI_disableInterrupt           
0     00083621  SPI_clearInterruptStatus       
0     0008363f  main                           
0     00083804  EST_reset                      
0     000839c2  GPIO_setQualificationPeriod    
0     000839dd  GPIO_setQualificationMode      
0     000839ff  GPIO_setPinConfig              
0     00083a2f  GPIO_setPadConfig              
0     00083a6e  GPIO_setMasterCore             
0     00083a90  GPIO_setInterruptPin           
0     00083ab0  GPIO_setDirectionMode          
0     00083ad0  GPIO_setAnalogMode             
0     00083af1  GPIO_getQualificationMode      
0     00083b10  GPIO_getPadConfig              
0     00083b3c  GPIO_getDirectionMode          
0     00083b4e  DRV8323_writeSPI               
0     00083b74  DRV8323_writeData              
0     00083bad  DRV8323_readSPI                
0     00083bea  DRV8323_setupSPI               
0     00083c21  DRV8323_setSPIHandle           
0     00083c23  DRV8323_setGPIOENNumber        
0     00083c25  DRV8323_setGPIOCSNumber        
0     00083c27  DRV8323_readData               
0     00083c5e  DRV8323_init                   
0     00083c61  DRV8323_getVDSDeglitch         
0     00083c67  DRV8323_getPeakSourTime        
0     00083c6e  DRV8323_getPeakSourCurLS       
0     00083c74  DRV8323_getPeakSourCurHS       
0     00083c7a  DRV8323_getPeakSinkCurLS       
0     00083c80  DRV8323_getPeakSinkCurHS       
0     00083c86  DRV8323_getPWMMode             
0     00083c8c  DRV8323_getDeadTime            
0     00083c93  DRV8323_enable                 
0     00083cca  EPWM_setEmulationMode          
0     00083cd3  EPWM_configureSignal           
0     00083e42  Interrupt_initVectorTable      
0     00083e5f  Interrupt_initModule           
0     00083ea2  Interrupt_enable               
0     00083f50  Interrupt_disable              
0     00083f9c  EST_Traj_configure             
0     000840ab  SCI_writeCharArray             
0     000840cd  SCI_setWakeFlag                
0     000840d1  SCI_setConfig                  
0     000840f2  SCI_setBaud                    
0     0008411a  SCI_readCharArray              
0     0008413a  SCI_getInterruptStatus         
0     0008415a  SCI_enableInterrupt            
0     00084174  SCI_disableInterrupt           
0     0008418e  SCI_clearInterruptStatus       
0     000841aa  EST_init                       
0     0008426e  XBAR_setOutputMuxConfig        
0     00084295  XBAR_setEPWMMuxConfig          
0     000842bc  XBAR_setCLBMuxConfig           
0     000842e3  XBAR_getInputFlagStatus        
0     0008430d  XBAR_clearInputFlag            
0     00084330  DAC128S_writeData              
0     0008437e  DAC128S_writeCommand           
0     000843a2  DAC128S_setupSPI               
0     000843e4  DAC128S_init                   
0     000843ee  I2C_initMaster                 
0     0008443a  I2C_getInterruptStatus         
0     00084447  I2C_enableInterrupt            
0     0008445e  I2C_disableInterrupt           
0     00084477  I2C_configureModuleFrequency   
0     0008448e  I2C_clearInterruptStatus       
0     0008449f  EST_Traj_setParams             
0     0008454a  EST_Dir_setLpFilterParams      
0     000845d0  USER_setParams_priv            
0     00084647  CMPSS_configRamp               
0     00084666  CMPSS_configLatchOnPWMSYNC     
0     0008467b  CMPSS_configFilterLow          
0     00084693  CMPSS_configFilterHigh         
0     000846ab  EST_Flux_setParams             
0     00084707  EST_Traj_updateState           
0     00084760  EST_Freq_setParams             
0     000847ae  EST_Dir_setHpFilterParams      
0     000847f8  EST_Flux_ab_setDerFilterParams 
0     00084842  EST_Iab_setLpFilterParams      
0     0008488c  EST_Idq_setLpFilterParams      
0     000848d6  EST_Vdq_setLpFilterParams      
0     00084920  EST_RsOnLine_setParams         
0     00084965  EST_Ls_setParams               
0     000849a4  EST_RsOnLine_setLpFilterParams 
0     000849e1  EST_Flux_updateState           
0     00084a1b  EST_Ls_updateState             
0     00084a50  EST_Rr_updateState             
0     00084a83  EST_Rs_updateState             
0     00084ab6  EST_Dir_init                   
0     00084ae7  __TI_decompress_lzss           
0     00084b18  EST_Iab_resetLpFilters         
0     00084b46  __TI_auto_init_nobinit_nopinit 
0     00084b71  EST_Freq_setDerFilterParams    
0     00084b9b  EST_Freq_setLpFilterParams     
0     00084bc5  EST_Vdq_resetLpFilters         
0     00084bef  EST_OneOverDcBus_setParams     
0     00084c18  EST_RsOnLine_init              
0     00084c41  EST_setFluxBeta_lp             
0     00084c6a  C$$EXIT                        
0     00084c6a  abort                          
0     00084c6c  exit                           
0     00084c93  EST_computeTorque_Nm           
0     00084cbb  EST_Angle_setParams            
0     00084ce1  EST_Idq_resetLpFilters         
0     00084d07  FILTER_FO_setNumCoeffs         
0     00084d0c  FILTER_FO_setInitialConditions 
0     00084d12  FILTER_FO_setDenCoeffs         
0     00084d15  FILTER_FO_init                 
0     00084d19  FILTER_FO_getNumCoeffs         
0     00084d1f  FILTER_FO_getInitialConditions 
0     00084d28  FILTER_FO_getDenCoeffs         
0     00084d2b  CPU_TIME_reset                 
0     00084d46  CPU_TIME_init                  
0     00084d4c  EST_computeLmag_H              
0     00084d6a  memcpy                         
0     00084d87  EST_Dir_resetLpFilters         
0     00084da3  EST_Rr_setParams               
0     00084dbf  EST_Rs_setParams               
0     00084ddb  EST_Traj_init                  
0     00084df7  EST_setFreqBetaOmega_der       
0     00084e13  EST_setFlux_ab_betaOmega_der   
0     00084e2e  EST_Traj_reset                 
0     00084e46  _c_int00                       
0     00084e5d  EST_Flux_ab_init               
0     00084e73  EST_Freq_init                  
0     00084e89  EST_Iab_init                   
0     00084e9f  EST_Iab_setParams              
0     00084eb5  EST_Idq_init                   
0     00084ecb  EST_Vdq_init                   
0     00084ee1  EST_setFreqBeta_lp             
0     00084ef6  EST_setIab_beta_lp             
0     00084f0b  EST_setIdq_beta_lp             
0     00084f20  EST_setVdq_beta_lp             
0     00084f35  EST_Idq_setParams              
0     00084f48  ANGLE_GEN_setParams            
0     00084f55  ANGLE_GEN_init                 
0     00084f5b  EST_Vdq_setParams              
0     00084f6d  EST_initEst                    
0     00084f7f  EST_Dir_resetHpFilters         
0     00084f8f  EST_Flux_ab_resetDerFilters    
0     00084f9f  EST_Flux_init                  
0     00084fae  EST_OneOverDcBus_init          
0     00084fbd  EST_setFreqLFP_sf              
0     00084fcc  EST_getFlux_Wb                 
0     00084fda  EST_getFm_lp_Hz                
0     00084fe8  EST_setBemf_sf                 
0     00084ff4  EST_setOneOverFluxGain_sf      
0     00085000  _args_main                     
0     0008500c  EST_Dir_setParams              
0     00085017  EST_Flux_ab_setParams          
0     00085021  EST_setAngle_rad               
0     0008502a  INVERSE_setParams              
0     00085033  _register_unlock               
0     00085037  _register_lock                 
0     0008503b  _nop                           
0     0008503c  EST_enableTraj                 
0     00085044  EST_getLs_d_H                  
0     0008504c  EST_getLs_q_H                  
0     00085054  EST_getRr_Ohm                  
0     0008505c  EST_getRsOnLine_Ohm            
0     00085064  EST_getRs_Ohm                  
0     0008506c  EST_setFlag_enablePowerWarp    
0     00085074  EST_setRsOnLineId_A            
0     0008507c  EST_setRsOnLineId_mag_A        
0     00085084  EST_setRsOnLine_Ohm            
0     00085094  __TI_decompress_none           
0     0008509c  EST_Eab_setParams              
0     000850a3  EST_Flux_setWaitTimes          
0     000850aa  EST_Freq_resetDerFilter        
0     000850b1  EST_Freq_resetLpFilter         
0     000850b8  EST_Ls_setWaitTimes            
0     000850bf  EST_Rr_setWaitTimes            
0     000850c6  EST_Rs_setWaitTimes            
0     000850cd  EST_configureTraj              
0     000850d4  EST_disableTraj                
0     000850db  EST_isIdle                     
0     000850e2  EST_isLockRotor                
0     000850e9  EST_setWaitTimes               
0     000850f0  EST_updateTrajState            
0     000850f7  memset                         
0     000850fe  EST_Traj_isError               
0     00085104  EST_isError                    
0     0008510a  EST_isTrajError                
0     00085110  CPUTimer_setEmulationMode      
0     00085116  __TI_zero_init                 
0     0008511c  EST_Edq_setParams              
0     00085121  EST_Flux_dq_setParams          
0     00085126  EST_Vab_setParams              
0     0008512b  EST_enable                     
0     00085130  EST_getTrajState               
0     00085135  EST_Angle_init                 
0     00085139  EST_Eab_init                   
0     0008513d  EST_Edq_init                   
0     00085141  EST_Flux_dq_init               
0     00085145  EST_Ls_init                    
0     00085149  EST_Rr_init                    
0     0008514d  EST_Rs_init                    
0     00085151  EST_Vab_init                   
0     00085155  EST_disable                    
0     00085159  EST_getFlag_enableRsOnLine     
0     0008515d  EST_getRoverL_rps              
0     00085161  EST_isMotorIdentified          
0     00085165  EST_setFlag_bypassLockRotor    
0     00085169  EST_setFlag_enableForceAngle   
0     0008516d  EST_setFlag_enableRsOnLine     
0     00085171  EST_setFlag_enableRsRecalc     
0     00085175  EST_setFlag_updateRs           
0     00085179  INVERSE_init                   
0     0008517d  CLARKE_init                    
0     00085181  IPARK_init                     
0     00085185  PARK_init                      
0     00085189  PI_init                        
0     0008518d  SVGEN_init                     
0     00085191  TRAJ_init                      
0     00085195  _system_pre_init               
0     00085197  _system_post_cinit             
0     000861de  __TI_Handler_Table_Base        
0     000861e4  __TI_Handler_Table_Limit       
0     000861f8  __TI_CINIT_Base                
0     00086210  __TI_CINIT_Limit               
0     00086210  __TI_CINIT_Warm                
abs   00000000  ctrlfuncsLoadSize              
abs   00000000  ctrlfuncsRunSize               
abs   00000000  extVarsLoadSize                
abs   00000100  __TI_STACK_SIZE                
abs   00000220  motorVarsLoadSize              
abs   00000240  ctrlVarsLoadStart              
abs   00000256  ctrlVarsLoadSize               
abs   00000496  ctrlVarsLoadEnd                
abs   00001039  RamfuncsLoadSize               
abs   00001039  RamfuncsRunSize                
abs   0000a600  RamfuncsRunStart               
abs   0000b639  RamfuncsRunEnd                 
abs   0000c000  extVarsLoadEnd                 
abs   0000c000  extVarsLoadStart               
abs   0000c000  motorVarsLoadStart             
abs   0000c220  motorVarsLoadEnd               
abs   00085198  RamfuncsLoadStart              
abs   000861d1  RamfuncsLoadEnd                
abs   ffffffff  __TI_pprof_out_hndl            
abs   ffffffff  __TI_prof_data_size            
abs   ffffffff  __TI_prof_data_start           
n/a   UNDEFED   __c_args__                     

[353 symbols]
f28002x_flash_lib_is_eabi.cmd
/*
// FILE:    f28002x_flash_lib_is_eabi.cmd
//
// TITLE:   Linker Command File For F280025 examples that run out of Flash
//
//
//          Keep in mind that L4, L5,L6 and L7 are protected by the code
//          security module.
//
//          What this means is in most cases you will want to move to
//          another memory map file which has more memory defined.
//
*/

MEMORY
{
   BEGIN           	  : origin = 0x00080000, length = 0x00000002
   BOOT_RSVD	      : origin = 0x00000002, length = 0x00000126

/* RAMLS5        	  : origin = 0x0000A800, length = 0x00000800 */
/* RAMLS6    		  : origin = 0x0000B000, length = 0x00000800 */
/* RAMLS7        	  : origin = 0x0000B800, length = 0x00000800 */
   RAMLS567    		  : origin = 0x0000A600, length = 0x00001A00

   /* Flash sectors */
   /* BANK 0 */
/* FLASHBANK0_SECT0	  : origin = 0x00080002, length = 0x00000FFE */
   FLASHBANK0_BOOT	  : origin = 0x00080002, length = 0x00000FFE	/* remote update */
/* FLASHBANK0_SECT1	  : origin = 0x00081000, length = 0x00001000 */
/* FLASHBANK0_SECT2	  : origin = 0x00082000, length = 0x00001000 */
/* FLASHBANK0_SECT3	  : origin = 0x00083000, length = 0x00001000 */
/* FLASHBANK0_SECT4	  : origin = 0x00084000, length = 0x00001000 */
/* FLASHBANK0_SECT5	  : origin = 0x00085000, length = 0x00001000 */
/* FLASHBANK0_SECT6	  : origin = 0x00086000, length = 0x00001000 */
/* FLASHBANK0_SECT7	  : origin = 0x00087000, length = 0x00001000 */
/* FLASHBANK0_SECT8	  : origin = 0x00088000, length = 0x00001000 */
/* FLASHBANK0_SECT9	  : origin = 0x00089000, length = 0x00001000 */
/* FLASHBANK0_SECT10  : origin = 0x0008A000, length = 0x00001000 */
/* FLASHBANK0_SECT11  : origin = 0x0008B000, length = 0x00001000 */
/* FLASHBANK0_SECT12  : origin = 0x0008C000, length = 0x00001000 */
/* FLASHBANK0_SECT13  : origin = 0x0008D000, length = 0x00001000 */
   FLASHBANK0_CODE	  : origin = 0x00081000, length = 0x0000D000	/* control code */

/* FLASHBANK0_SECT14  : origin = 0x0008E000, length = 0x00001000 */
   FLASHBANK0_DATA 	  : origin = 0x0008E000, length = 0x00001000	/* constant data */

   FLASHBANK0_SECT15  : origin = 0x0008F000, length = 0x000FF0
   FLASHBANK0_SEC15_RSVD	: origin = 0x08FFF0, length = 0x000010  /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

   BOOTROM			  : origin = 0x003F0000, length = 0x00008000
   BOOTROM_EXT		  : origin = 0x003F8000, length = 0x00007FC0
   RESET           	  : origin = 0x003FFFC0, length = 0x00000002

   RAMM0S          	  : origin = 0x00000128, length = 0x00000118	/* stack, on-chip RAM block M0 part */
   RAMM1D         	  : origin = 0x00000240, length = 0x000005B8	/* on-chip RAM block M0 part & M1 */
   RAMM1_RSVD         : origin = 0x000007F8, length = 0x00000008    /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

   RAMGS0     	   	  : origin = 0x0000C000, length = 0x000007F8
   RAMGS0_RSVD        : origin = 0x0000C7F8, length = 0x00000008    /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

   RAMLS4        	  : origin = 0x0000A000, length = 0x00000600
}


SECTIONS
{
   .reset           : > RESET, 				   	TYPE = DSECT
   codestart		: > BEGIN,     		 	   	ALIGN(4)


   GROUP
   {
#if defined(SFRA_ENABLE)
       .TI.ramfunc
       {
         -l sfra_f32_tmu_eabi.lib<sfra_f32_tmu_collect.obj> (.text)
         -l sfra_f32_tmu_eabi.lib<sfra_f32_tmu_inject.obj> (.text)
       }
#else
	   .TI.ramfunc
#endif
       ramfuncs
       	/* Digital Controller Library functions */
       dclfuncs
       dcl32funcs
   }          LOAD = FLASHBANK0_CODE
              RUN = RAMLS567,
              LOAD_START(RamfuncsLoadStart),
              LOAD_SIZE(RamfuncsLoadSize),
              LOAD_END(RamfuncsLoadEnd),
              RUN_START(RamfuncsRunStart),
              RUN_SIZE(RamfuncsRunSize),
              RUN_END(RamfuncsRunEnd),
              ALIGN(2)

	ctrlfuncs : {
	            }
	          LOAD = FLASHBANK0_CODE
              RUN = RAMLS567,
              LOAD_START(ctrlfuncsLoadStart),
              LOAD_SIZE(ctrlfuncsLoadSize),
              LOAD_END(ctrlfuncsLoadEnd),
              RUN_START(ctrlfuncsRunStart),
              RUN_SIZE(ctrlfuncsRunSize),
              RUN_END(ctrlfuncsRunEnd),
              ALIGN(2)

   .text            : > FLASHBANK0_CODE,	ALIGN(8)
   .cinit           : > FLASHBANK0_CODE,	ALIGN(4)
   .switch          : > FLASHBANK0_CODE,	ALIGN(4)
   .cio				: > FLASHBANK0_CODE
   .pinit           : > FLASHBANK0_CODE,	ALIGN(4)
   .const           : > FLASHBANK0_CODE,  	ALIGN(4)
   .init_array      : > FLASHBANK0_CODE, 	ALIGN(4)

   .stack           : > RAMM0S
   .bss             : > RAMM1D
   .bss:output      : > RAMM1D
   .bss:cio         : > RAMM1D
   .data            : > RAMM1D
   .sysmem          : > RAMM1D

     est_data             	 : > RAMLS4
}

SECTIONS
{
   prms_data 		      : > FLASHBANK0_DATA

   GROUP
   {
      user_data
	  foc_data
   }
   		LOAD = RAMM1D
        LOAD_START(ctrlVarsLoadStart),
        LOAD_SIZE(ctrlVarsLoadSize),
        LOAD_END(ctrlVarsLoadEnd)

   GROUP
   {
      sys_data
      ctrl_data
      motor_data
   }
        LOAD = RAMGS0
        LOAD_START(motorVarsLoadStart),
        LOAD_SIZE(motorVarsLoadSize),
        LOAD_END(motorVarsLoadEnd)


   GROUP
   {
	  vibc_data
	  dmaBuf_data

      datalog_data
      graph_data

      sfra_data
      SFRA_F32_Data
   }
        LOAD = RAMGS0
        LOAD_START(extVarsLoadStart),
        LOAD_SIZE(extVarsLoadSize),
        LOAD_END(extVarsLoadEnd)
}
/*
//===========================================================================
// End of file.
//===========================================================================
*/
f2837xd_dcsm_lnk_eabi.cmd
/* this linker command file is to be included if user wants to use the DCSM
 * feature on the device DCSM  means Dual Zone Code Security Module. This
 * linker command file works as an addendum ot the already existing Flash/RAM
 * linker command file that the project has.
 * The sections in the *_ZoneSelectBlock.asm source file is linked as per the
 * commands given in the file NOTE - please note fill=0xFFFF, this helps if
 * users include this file in the project by mistake and doesn't provide the
 * needed proper *_ZoneSelectBlock.asm sources.
 * Please refer to the Blinky DCSM example for proper usage of this.
 *
 * Once users are confident t`hat they want to program the passwords in OTP, the
 * DSECT section type can be removed.
 *
*/

MEMORY
{
PAGE 0 :  /* Program Memory */

   /* BANK0 */
   /* B0 Z1 OTP.  LinkPointers */
   B0_DCSM_OTP_Z1_LINKPOINTER   : origin = 0x78000, length = 0x00000C
   /* B0 Z1 OTP.  GPREG1/GPREG2 */
   B0_DCSM_OTP_Z1_GPREG         : origin = 0x7800C, length = 0x000004
   /* B0 Z1 OTP.  PSWDLOCK/RESERVED */
   B0_DCSM_OTP_Z1_PSWDLOCK	    : origin = 0x78010, length = 0x000004
   /* B0 Z1 OTP.  CRCLOCK/RESERVED */
   B0_DCSM_OTP_Z1_CRCLOCK	    : origin = 0x78014, length = 0x000004
   /* B0 Z1 OTP.  GPREG3/BOOTCTRL */
   B0_DCSM_OTP_Z1_BOOTCTRL	    : origin = 0x7801C, length = 0x000004

   /* DCSM Z1 Zone Select Contents (!!Movable!!) */
   /* B0 Z1 OTP.  Z1 password locations / Flash and RAM partitioning */
   B0_DCSM_ZSEL_Z1_P0	        : origin = 0x78020, length = 0x000010

   /* B0 Z2 OTP.  LinkPointers */
   B0_DCSM_OTP_Z2_LINKPOINTER	: origin = 0x78200, length = 0x00000C
   /* B0 Z2 OTP.  GPREG1/GPREG2 */
   B0_DCSM_OTP_Z2_GPREG	        : origin = 0x7820C, length = 0x000004
   /* B0 Z2 OTP.  PSWDLOCK/RESERVED */
   B0_DCSM_OTP_Z2_PSWDLOCK	    : origin = 0x78210, length = 0x000004
   /* B0 Z2 OTP.  CRCLOCK/RESERVED */
   B0_DCSM_OTP_Z2_CRCLOCK	    : origin = 0x78214, length = 0x000004
   /* B0 Z2 OTP.  GPREG3/BOOTCTRL */
   B0_DCSM_OTP_Z2_BOOTCTRL	    : origin = 0x7821C, length = 0x000004

   /* DCSM Z1 Zone Select Contents (!!Movable!!) */
   /* B0 Z2 OTP.  Z2 password locations / Flash and RAM partitioning  */
   B0_DCSM_ZSEL_Z2_P0	        : origin = 0x78220, length = 0x000010


   /* BANK1 */
   /* B1 Z1 OTP.  LinkPointers */
   B1_DCSM_OTP_Z1_LINKPOINTER	: origin = 0x78400, length = 0x00000C

   /* DCSM B1 Z1 Zone Select Contents (!!Movable!!) */
   /* B1 Z1 OTP.  Flash partitioning */
   B1_DCSM_ZSEL_Z1_P0	        : origin = 0x78420, length = 0x000010

   /* B1 Z2 OTP.  LinkPointers */
   B1_DCSM_OTP_Z2_LINKPOINTER	: origin = 0x78600, length = 0x00000C

   /* DCSM B1 Z1 Zone Select Contents (!!Movable!!) */
   /* B1 Z2 OTP.  Flash partitioning  */
   B1_DCSM_ZSEL_Z2_P0	        : origin = 0x78620, length = 0x000010
}

SECTIONS
{
   b0_dcsm_otp_z1_linkpointer 	: > B0_DCSM_OTP_Z1_LINKPOINTER		PAGE = 0, type = DSECT
   b0_dcsm_otp_z1_gpreg			: > B0_DCSM_OTP_Z1_GPREG			PAGE = 0, type = DSECT
   b0_dcsm_otp_z1_pswdlock		: > B0_DCSM_OTP_Z1_PSWDLOCK			PAGE = 0, type = DSECT
   b0_dcsm_otp_z1_crclock		: > B0_DCSM_OTP_Z1_CRCLOCK			PAGE = 0, type = DSECT
   b0_dcsm_otp_z1_bootctrl		: > B0_DCSM_OTP_Z1_BOOTCTRL			PAGE = 0, type = DSECT
   b0_dcsm_zsel_z1				: > B0_DCSM_ZSEL_Z1_P0				PAGE = 0, type = DSECT

   b0_dcsm_otp_z2_linkpointer	: > B0_DCSM_OTP_Z2_LINKPOINTER		PAGE = 0, type = DSECT
   b0_dcsm_otp_z2_gpreg			: > B0_DCSM_OTP_Z2_GPREG			PAGE = 0, type = DSECT
   b0_dcsm_otp_z2_pswdlock		: > B0_DCSM_OTP_Z2_PSWDLOCK			PAGE = 0, type = DSECT
   b0_dcsm_otp_z2_crclock		: > B0_DCSM_OTP_Z2_CRCLOCK			PAGE = 0, type = DSECT
   b0_dcsm_otp_z2_bootctrl		: > B0_DCSM_OTP_Z2_BOOTCTRL			PAGE = 0, type = DSECT
   b0_dcsm_zsel_z2				: > B0_DCSM_ZSEL_Z2_P0				PAGE = 0, type = DSECT

   b1_dcsm_otp_z1_linkpointer 	: > B1_DCSM_OTP_Z1_LINKPOINTER		PAGE = 0, type = DSECT
   b1_dcsm_zsel_z1				: > B1_DCSM_ZSEL_Z1_P0				PAGE = 0, type = DSECT

   b1_dcsm_otp_z2_linkpointer	: > B1_DCSM_OTP_Z2_LINKPOINTER		PAGE = 0, type = DSECT
   b1_dcsm_zsel_z2				: > B1_DCSM_ZSEL_Z2_P0				PAGE = 0, type = DSECT
}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    我不确定您所指的是什么 ROM。 USER_setMotor1Params 在 USER_mtr1.c 中实现并加载到正常闪存地址(我可以在您的映射文件中看到它)。 没关系。

    您是否在设备上启用了任何安全功能?

    当您单步进入函数时、在反汇编中会看到什么? 使用汇编步骤而不是常规步骤会有什么不同?

    惠特尼

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    此问题是由与28xx25无关的某些函数引起的、必须对2837d 进行注释。 解决此问题后、我认为我的 drv8323s SPI 接口存在问题。  我的代码运行正常、直到我在  drv8323s.c 函数中遇到 SPI_writeDataBlockingNonFIFO (obj->spiHandle、ctrlWord)中的断点。 代码卡在 DRV8323_readSPI()函数内的以下 while 循环中。

    //等待两个字填充 RX FIFO,否则将发生等待超时
    while (RxFifoCnt < SPI_FIFO_RX1)  

    RxFifoCnt = SPI_getRxFIFOStatus (obj->spiHandle);

    if (++WaitTimeOut > 0xFFe)

    obj->rxTimeOut = true;

    我已经修改  了28xx25的通用电机控制实验室文件 、以便将 2837d 扩展坞卡和 drv8323s 用作驱动程序。

    另一个问题:在何处将 drv8323s 评估套件(J4、pin18)上的 nSCS 引脚连接到 2837d。 在通用电机实验示例中、建议将 J4上的引脚4和引脚18短接"使用 跳线将 J4-4连接到 J4-18、以将 DRV_SCS 连接到 SPI_STE"。

     

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    我认为 F28002x 上需要跳线、因为连接到 nSCS 的引脚没有 SPI_STE 作为引脚多路复用选项。 这在您的情况下不是必需的。 您只是将 BOOSTXL-DRV8323RS 连接到 F2837x controlCARD 和集线站、对吗?

    您选择将哪些 GPIO 用于 SPI? 我假设 F28002x 和 F2837x 之间的引脚多路复用器选项足够不同、您需要选择不同的选项。 您是否有示波器或逻辑分析仪、或者可以连接到 SPI 信号以查看可能发生的情况?

    惠特尼

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    是的、我 将 BOOSTXL-DRV8323RS 接线至 F2837x controlCARD 和集线站。 我看到使能引脚变为高电平、但我看不到时钟。

    这是我的 GPIO 配置(hal.c 已连接)。

    引脚功能 O 范围状态 DRV8323RS 28379d 卡 扩展坞
    启用 DRV8323RS J3引脚9   GPIO28 78
    SPI:芯片选择 J4-PIN18 GPIO61 126.
    SPI:MOSI J4引脚12 (SDI) GPIO58 108.
    SPI:MISO J4引脚14 (SDO) GPIO59. 110
    SPI:CLK J3引脚13 (CLK) GPIO60 125.

     

    DRV8323RS 使能

    //! \brief 定义用于启用电源模块的 GPIO

    // GPIO29->连接 到 BOOSTXL-DRV8323RS 上的 J3引脚9
    #define MTR1_GATE _EN_GPIO 29

    // GPIO29->M1_DRV_ENABLE*
    GPIO_setPinConfig (GPIO_29_GPIO29);
    GPIO_writePin (29、1);
    GPIO_setDirectionMode (29、GPIO_DIR_MODE_OUT);
    GPIO_setPadConfig (29、GPIO_PIN_TYPE_STD);

    // GPIO61->Connect to J4 PIN18 on BOOSTXL-DRV8323RS
    GPIO_setPinConfig (GPIO_61_SPISTEA);
    GPIO_setDirectionMode (61、GPIO_DIR_MODE_OUT);
    GPIO_setPadConfig (61、GPIO_PIN_TYPE_STD);

    // GPIO60->连接 到 BOOSTXL-DRV8323RS 上的 J3引脚13
    GPIO_setPinConfig (GPIO_60_SPICLKA);
    GPIO_setDirectionMode (60、GPIO_DIR_MODE_OUT);
    GPIO_setPadConfig (60、GPIO_PIN_TYPE_PULLUP);

    // GPIO58->SPISIMOA->连接 到 BOOSTXL-DRV8323RS 上的 J4引脚12
    GPIO_setPinConfig (GPIO_58_SPISIMOA);
    GPIO_setDirectionMode (58、GPIO_DIR_MODE_OUT);
    GPIO_setPadConfig (58、GPIO_PIN_TYPE_PULLUP);

    // GPIO59->SPISOMIA ->连接 到 BOOSTXL-DRV8323RS 上的 J4引脚14
    GPIO_setPinConfig (GPIO_59_SPISOMIA);
    GPIO_setDirectionMode (59、GPIO_DIR_MODE_IN);
    GPIO_setPadConfig (59、GPIO_PIN_TYPE_PULLUP);

    //#############################################################################
    // $TI Release: MotorControl SDK v4.00.00.00 $
    // $Release Date: Thu Feb 17 18:05:20 CST 2022 $
    // $Copyright:
    // Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
    //
    // Redistribution and use in source and binary forms, with or without
    // modification, are permitted provided that the following conditions
    // are met:
    //
    //   Redistributions of source code must retain the above copyright
    //   notice, this list of conditions and the following disclaimer.
    //
    //   Redistributions in binary form must reproduce the above copyright
    //   notice, this list of conditions and the following disclaimer in the
    //   documentation and/or other materials provided with the
    //   distribution.
    //
    //   Neither the name of Texas Instruments Incorporated nor the names of
    //   its contributors may be used to endorse or promote products derived
    //   from this software without specific prior written permission.
    //
    // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
    // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
    // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
    // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
    // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
    // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
    // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
    // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
    // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
    // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
    // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    // $
    //#############################################################################
    
    //
    //! \file   solutions/universal_motorcontrol_lab/f28002x/drivers/hal_all.c
    //! \brief  Contains the various functions related to the HAL object
    //!
    //
    
    //
    // the includes
    //
    #include "user.h"
    
    //
    // drivers
    //
    
    // modules
    
    // platforms
    #include "hal.h"
    #include "hal_obj.h"
    
    // libraries
    #include "datalogIF.h"
    
    #ifdef _FLASH
    #pragma CODE_SECTION(Flash_initModule, ".TI.ramfunc");
    #endif
    
    // **************************************************************************
    // the defines
    
    
    // **************************************************************************
    // the globals
    
    
    // **************************************************************************
    // the functions
    
    void HAL_disableGlobalInts(HAL_Handle handle)
    {
        // disable global interrupts
        Interrupt_disableMaster();
    
        return;
    } // end of HAL_disableGlobalInts() function
    
    void HAL_disableWdog(HAL_Handle halHandle)
    {
        // disable watchdog
        SysCtl_disableWatchdog();
    
        return;
    } // end of HAL_disableWdog() function
    
    void HAL_enableCtrlInts(HAL_Handle handle)
    {
        // Acknowledge interrupt from PIE group
        Interrupt_clearACKGroup(MTR1_INT_ACK_GROUP);
    
        // enable the PIE interrupts associated with the ADC interrupts
        Interrupt_enable(MTR1_PIE_INT_NUM);    // motor_1
    
        // enable the ADC interrupts for motor_1
        ADC_enableInterrupt(MTR1_ADC_INT_BASE, MTR1_ADC_INT_NUM);
    
        // enable the cpu interrupt for PWM and interrupts
        Interrupt_enableInCPU(MTR1_CPU_INT_NUM);        // motor_1
    
        return;
    } // end of HAL_enableCtrlInts() function
    
    // No HAL_enableADCIntsToTriggerCLA() in this device
    
    void HAL_enableDebugInt(HAL_Handle handle)
    {
    
        // enable debug events
        ERTM;
    
        return;
    } // end of HAL_enableDebugInt() function
    
    void HAL_enableGlobalInts(HAL_Handle handle)
    {
    
        // enable global interrupts
        Interrupt_enableMaster();
    
        return;
    } // end of HAL_enableGlobalInts() function
    
    
    HAL_Handle HAL_init(void *pMemory,const size_t numBytes)
    {
        HAL_Handle handle;
        HAL_Obj *obj;
    
        if(numBytes < sizeof(HAL_Obj))
        {
            return((HAL_Handle)NULL);
        }
    
        // assign the handle
        handle = (HAL_Handle)pMemory;
    
        // assign the object
        obj = (HAL_Obj *)handle;
    
        // disable watchdog
        SysCtl_disableWatchdog();
    
        // Two ADC modules in this device
        // initialize the ADC handles
        obj->adcHandle[0] = ADCA_BASE;
        obj->adcHandle[1] = ADCC_BASE;
    
        // initialize the ADC results
        obj->adcResult[0] = ADCARESULT_BASE;
        obj->adcResult[1] = ADCCRESULT_BASE;
    
        // No DAC modules in this device
        // No CLA module in this device
    
        // initialize SCI handle
        obj->sciHandle = SCIA_BASE;             //!< the SCIA handle
    
        // initialize CAN handle
        obj->canHandle = CANA_BASE;             //!< the SCIA handle
    
        // initialize DMA handle
        obj->dmaHandle = DMA_BASE;              //!< the DMA handle
    
        // initialize DMA channel handle
        obj->dmaChHandle[0] = DMA_CH3_BASE;     //!< the DMA Channel handle
        obj->dmaChHandle[1] = DMA_CH4_BASE;     //!< the DMA Channel handle
        obj->dmaChHandle[2] = DMA_CH5_BASE;     //!< the DMA Channel handle
        obj->dmaChHandle[3] = DMA_CH6_BASE;     //!< the DMA Channel handle
    
        // initialize timer handles
        obj->timerHandle[0] = CPUTIMER0_BASE;
        obj->timerHandle[1] = CPUTIMER1_BASE;
        obj->timerHandle[2] = CPUTIMER2_BASE;
    
    #ifdef EPWMDAC_MODE
        // initialize pwmdac handles
        obj->pwmDACHandle[0] = EPWMDAC1_BASE;
        obj->pwmDACHandle[1] = EPWMDAC2_BASE;
        obj->pwmDACHandle[2] = EPWMDAC3_BASE;
        obj->pwmDACHandle[3] = EPWMDAC3_BASE;
    #endif  // EPWMDAC_MODE
    
        return(handle);
    } // end of HAL_init() function
    
    HAL_MTR_Handle HAL_MTR1_init(void *pMemory, const size_t numBytes)
    {
        HAL_MTR_Handle handle;
        HAL_MTR_Obj *obj;
    
        if(numBytes < sizeof(HAL_MTR_Obj))
        {
            return((HAL_MTR_Handle)NULL);
        }
    
        // assign the handle
        handle = (HAL_MTR_Handle)pMemory;
    
        // assign the object
        obj = (HAL_MTR_Obj *)handle;
    
        // initialize PWM handles for Motor 1
        obj->pwmHandle[0] = MTR1_PWM_U_BASE;        //!< the PWM handle
        obj->pwmHandle[1] = MTR1_PWM_V_BASE;        //!< the PWM handle
        obj->pwmHandle[2] = MTR1_PWM_W_BASE;        //!< the PWM handle
    
        // initialize CMPSS handle
    #if defined(MOTOR1_ISBLDC)
        obj->cmpssHandle[0] = MTR1_CMPSS_IDC_BASE;  //!< the CMPSS handle
    #elif defined(MOTOR1_DCLINKSS)
        obj->cmpssHandle[0] = MTR1_CMPSS_IDC_BASE;  //!< the CMPSS handle
    #else   // !(MOTOR1_ISBLDC || MOTOR1_DCLINKSS)
        obj->cmpssHandle[0] = MTR1_CMPSS_U_BASE;    //!< the CMPSS handle
        obj->cmpssHandle[1] = MTR1_CMPSS_V_BASE;    //!< the CMPSS handle
        obj->cmpssHandle[2] = MTR1_CMPSS_W_BASE;    //!< the CMPSS handle
    #endif  // !(MOTOR1_ISBLDC || MOTOR1_DCLINKSS)
    
    #if defined(HALL_ENABLE) && defined(CMD_CAP_EN)
    #error HALL and CMD_CAP can't be enabled at the same time
    #elif defined(HALL_ENABLE)
        // initialize CAP handles for Motor 1
        obj->capHandle[0] = MTR1_CAP_U_BASE;        //!< the CAP handle
        obj->capHandle[1] = MTR1_CAP_V_BASE;        //!< the CAP handle
        obj->capHandle[2] = MTR1_CAP_W_BASE;        //!< the CAP handle
    #elif defined(CMD_CAP_EN)
        obj->capHandle = MTR1_CAP_FREQ_BASE;        //!< the CAP handle
    #endif // HALL_ENABLE || CMD_CAP_EN
    
        // No PGA modules in this device
    
        // Assign gateEnableGPIO
    #if defined(BSXL8353RS_REVA)
        // initialize drv8353 interface
        obj->drvicHandle = DRVIC_init(&obj->drvic);
    
        // initialize SPI handle
        obj->spiHandle = MTR1_SPI_BASE;             //!< the SPI handle
    
        obj->gateEnableGPIO = MTR1_GATE_EN_GPIO;
        // BSXL8353RS_REVA
    #elif defined(BSXL8316RT_REVA)
        // initialize drv8316 interface
        obj->drvicHandle = DRVIC_init(&obj->drvic);
    
        // initialize SPI handle
        obj->spiHandle = MTR1_SPI_BASE;             //!< the SPI handle
    
        obj->gateEnableGPIO = MTR1_GATE_EN_GPIO;
        obj->drvOffGPIO = MTR1_DRV_OFF_GPIO;
        // BSXL8316RT_REVA
    #elif defined(BSXL8323RS_REVA)
        // initialize drv8323 interface
        obj->drvicHandle = DRVIC_init(&obj->drvic);
    
        // initialize SPI handle
        obj->spiHandle = MTR1_SPI_BASE;             //!< the SPI handle
    
        obj->gateEnableGPIO = MTR1_GATE_EN_GPIO;
        obj->gateCalGPIO = MTR1_GATE_CAL_GPIO;
        // BSXL8323RS_REVA
    #elif defined(BSXL8323RH_REVB)
        obj->gateModeGPIO = MTR1_GATE_MODE_GPIO;
        obj->gateGainGPIO = MTR1_GATE_GAIN_GPIO;
        obj->gateCalGPIO = MTR1_GATE_CAL_GPIO;
        obj->gateEnableGPIO = MTR1_GATE_EN_GPIO;
        // BSXL8323RH_REVB
    #elif defined(BSXL3PHGAN_REVA)
        obj->gateEnableGPIO = MTR1_GATE_EN_GPIO;
    #elif defined(HVMTRPFC_REV1P1)
        obj->gateEnableGPIO = MTR1_GATE_EN_GPIO;
    #endif  // Assign gateEnableGPIO
    
        #ifdef QEP_ENABLE
        // initialize QEP driver
        obj->qepHandle = MTR1_QEP_BASE;             // the QEP handle
        #endif  // QEP_ENABLE
    
    #ifdef SST_ENABLE
        obj->sstpwmHandle = EPWM4_BASE;             // the PWM handle for SST
    #endif  //SST_ENABLE
    
        obj->motorNum = MTR_1;
    
        return(handle);
    } // end of HAL_MTR1_init() function
    
    void HAL_setParams(HAL_Handle handle)
    {
        // disable global interrupts
        Interrupt_disableMaster();
    
        // Disable the watchdog
        SysCtl_disableWatchdog();
    
    #ifdef _FLASH
        //
        // Copy time critical code and flash setup code to RAM. This includes the
        // following functions: InitFlash();
        //
        // The RamfuncsLoadStart, RamfuncsLoadSize, and RamfuncsRunStart symbols
        // are created by the linker. Refer to the device .cmd file.
        //
        memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (size_t)&RamfuncsLoadSize);
        memcpy(&ctrlfuncsRunStart, &ctrlfuncsLoadStart, (size_t)&ctrlfuncsLoadSize);
    
        // Call Flash Initialization to setup flash waitstates. This function must
        // reside in RAM.
        Flash_initModule(FLASH0CTRL_BASE, FLASH0ECC_BASE, DEVICE_FLASH_WAITSTATES);
    #endif
    
        // Enable temperature sensor
        ASysCtl_enableTemperatureSensor();
    
        // initialize the interrupt controller
        Interrupt_initModule();
    
        // init vector table
        Interrupt_initVectorTable();
    
    #if defined(BSXL8323RS_REVA) || defined(BSXL8323RH_REVB) || \
        defined(BSXL8353RS_REVA) || defined(BSXL3PHGAN_REVA) || \
        defined(BSXL8316RT_REVA)
        // Set up PLL control and clock dividers
        //
        SysCtl_setClock(DEVICE_SETCLOCK_CFG);
    
    #elif defined(HVMTRPFC_REV1P1)
        // External 20M Crystal on ControlCard
        // Set up PLL control and clock dividers
        // CPU Clock Frequency = 100MHz
        // PLLSYSCLK = 20MHz (XTAL_OSC) * 30 (IMULT) / (2 (REFDIV) * 3 (ODIV) * 1(SYSDIV))
        SysCtl_setClock(SYSCTL_OSCSRC_XTAL | SYSCTL_IMULT(30) |
                        SYSCTL_REFDIV(2) | SYSCTL_ODIV(3) |
                        SYSCTL_SYSDIV(1) | SYSCTL_PLL_ENABLE |
                        SYSCTL_DCC_BASE_0);
    #else
    #error Select the right clock of PLL for the board
    #endif  // PLL Selection
    
        //
        // Make sure the LSPCLK divider is set to the default (divide by 4)
        //
        SysCtl_setLowSpeedClock(SYSCTL_LSPCLK_PRESCALE_4);
    
        // These asserts will check that the #defines for the clock rates in
        // device.h match the actual rates that have been configured. If they do
        // not match, check that the calculations of DEVICE_SYSCLK_FREQ and
        // DEVICE_LSPCLK_FREQ are accurate. Some examples will not perform as
        // expected if these are not correct.
        //
        ASSERT(SysCtl_getClock(DEVICE_OSCSRC_FREQ) == DEVICE_SYSCLK_FREQ);
        ASSERT(SysCtl_getLowSpeedClock(DEVICE_OSCSRC_FREQ) == DEVICE_LSPCLK_FREQ);
    
    #ifndef _FLASH
        //
        // Call Device_cal function when run using debugger
        // This function is called as part of the Boot code. The function is called
        // in the Device_init function since during debug time resets, the boot code
        // will not be executed and the gel script will reinitialize all the
        // registers and the calibrated values will be lost.
        // Sysctl_deviceCal is a wrapper function for Device_Cal
        //
        SysCtl_deviceCal();
    #endif
    
        // setup the peripheral clocks
        //HAL_setupPeripheralClks(handle);
    
        //
        // Lock VREGCTL Register
        // The register VREGCTL is not supported in this device. It is locked to
        // prevent any writes to this register
        //
        //ASysCtl_lockVREG();
    
        // setup the GPIOs
        HAL_setupGPIOs(handle);
    
    
    
    #if defined(EPWMDAC_MODE)
        // setup the PWM DACs
        HAL_setupPWMDACs(handle, USER_SYSTEM_FREQ_MHz);
    #endif  //EPWMDAC_MODE
    
        // setup the ADCs
        HAL_setupADCs(handle);
    
        // Sets up the CPU timer for time base
        HAL_setupTimeBaseTimer(handle, USER_TIME_BASE_FREQ_Hz);
    
        // Sets up the timers for CPU usage diagnostics
        HAL_setupCPUUsageTimer(handle);
    
    #if !defined(SFRA_ENABLE)
        // setup the sci
        HAL_setupSCIA(handle);
    #endif
        // setup the i2c
        HAL_setupI2CA(handle);
    
        // setup the DMA
        HAL_setupDMA();
        return;
    } // end of HAL_setParams()
    
    
    
    
    void HAL_MTR_setParams(HAL_MTR_Handle handle, USER_Params *pUserParams)
    {
        HAL_setNumCurrentSensors(handle, pUserParams->numCurrentSensors);
        HAL_setNumVoltageSensors(handle, pUserParams->numVoltageSensors);
    
        // setup the PWMs
        HAL_setupPWMs(handle);
    
        // setup the CMPSSs
        HAL_setupCMPSSs(handle);
    
    #if defined(HALL_ENABLE) || defined(CMD_CAP_EN)
        // setup the CAPs
        HAL_setupCAPs(handle);
    #endif  // HALL_ENABLE || CMD_CAP_EN
    
        // Setup Gate Enable
    #if defined(BSXL8323RS_REVA) || defined(BSXL8353RS_REVA) || \
        defined(BSXL8316RT_REVA)
        // setup the spi for drv8323/drv8353/drv8316
        HAL_setupSPI(handle);
    
        // setup the drv8323s/drv8353s/drv8316s interface
        HAL_setupGate(handle);
        // BSXL8323RS_REVA || BSXL8353RS_REVA || BSXL8316RT_REVA
    #elif defined(BSXL8323RH_REVB) || defined(BSXL3PHGAN_REVA)
        // setup the drv8323h interface
        HAL_setupGate(handle);
    #elif defined(HVMTRPFC_REV1P1)
        HAL_setupGate(handle);
    #endif  // Setup Gate Enable
    
        #ifdef QEP_ENABLE
        // setup the EQEP
        HAL_setupQEP(handle);
        #endif  // QEP_ENABLE
    
        return;
    } // end of HAL_MTR_setParams() function
    
    
    
    void HAL_setupADCs(HAL_Handle handle)
    {
        HAL_Obj *obj = (HAL_Obj *)handle;
    
        SysCtl_delay(100U);
    #if defined(BSXL8323RS_REVA) || defined(BSXL8323RH_REVB) || \
        defined(BSXL8353RS_REVA) || defined(BSXL3PHGAN_REVA) || \
        defined(BSXL8316RT_REVA)
    //    ADC_setVREF(obj->adcHandle[0], ADC_REFERENCE_INTERNAL, ADC_REFERENCE_3_3V);
    //    ADC_setVREF(obj->adcHandle[1], ADC_REFERENCE_INTERNAL, ADC_REFERENCE_3_3V);
    #elif defined(HVMTRPFC_REV1P1)
        ADC_setVREF(obj->adcHandle[0], ADC_REFERENCE_INTERNAL, ADC_REFERENCE_3_3V);
        ADC_setVREF(obj->adcHandle[1], ADC_REFERENCE_INTERNAL, ADC_REFERENCE_3_3V);
    #else
    #error Select the right clock of PLL for the board
    #endif  // ADC Reference
    
        SysCtl_delay(100U);
    
        // Set main clock scaling factor (50MHz max clock for the ADC module)
        ADC_setPrescaler(obj->adcHandle[0], ADC_CLK_DIV_2_0);
        ADC_setPrescaler(obj->adcHandle[1], ADC_CLK_DIV_2_0);
    
        // set the ADC interrupt pulse generation to end of conversion
        ADC_setInterruptPulseMode(obj->adcHandle[0], ADC_PULSE_END_OF_CONV);
        ADC_setInterruptPulseMode(obj->adcHandle[1], ADC_PULSE_END_OF_CONV);
    
        // set priority of SOCs
        ADC_setSOCPriority(obj->adcHandle[0], ADC_PRI_ALL_HIPRI);
        ADC_setSOCPriority(obj->adcHandle[1], ADC_PRI_ALL_HIPRI);
    
    //    ADC_setSOCPriority(PFC_IAC_ADC_BASE, ADC_PRI_SOC0_HIPRI);
    
        // enable the ADCs
        ADC_enableConverter(obj->adcHandle[0]);
        ADC_enableConverter(obj->adcHandle[1]);
    
        // delay to allow ADCs to power up
        SysCtl_delay(1000U);
    
        //-------------------------------------------------------------------------
    #if defined(MOTOR1_ISBLDC)
        // configure the interrupt sources
        // Interrupt for motor 1
        ADC_setInterruptSource(MTR1_ADC_INT_BASE,
                               MTR1_ADC_INT_NUM, MTR1_ADC_INT_SOC);
    
        // Idc 1st
        ADC_setupSOC(MTR1_IDC1_ADC_BASE, MTR1_IDC1_ADC_SOC_NUM, MTR1_IDC_TRIGGER_SOC,
                     MTR1_IDC1_ADC_CH_NUM, MTR1_ADC_I_SAMPLEWINDOW);
    
        // Configure PPB to eliminate subtraction related calculation
        // PPB is associated with ADCA_SOC0
        ADC_setupPPB(MTR1_IDC1_ADC_BASE, MTR1_IDC1_ADC_PPB_NUM, MTR1_IDC1_ADC_SOC_NUM);
    
        // Write zero to this for now till offset calibration complete
        ADC_setPPBCalibrationOffset(MTR1_IDC1_ADC_BASE, MTR1_IDC1_ADC_PPB_NUM, 0);
    
        // Idc 2nd
        ADC_setupSOC(MTR1_IDC2_ADC_BASE, MTR1_IDC2_ADC_SOC_NUM, MTR1_IDC_TRIGGER_SOC,
                     MTR1_IDC2_ADC_CH_NUM, MTR1_ADC_I_SAMPLEWINDOW);
    
        // Configure PPB to eliminate subtraction related calculation
        // PPB is associated with ADCC_SOC0
        ADC_setupPPB(MTR1_IDC2_ADC_BASE, MTR1_IDC2_ADC_PPB_NUM, MTR1_IDC2_ADC_SOC_NUM);
    
        // Write zero to this for now till offset calibration complete
        ADC_setPPBCalibrationOffset(MTR1_IDC2_ADC_BASE, MTR1_IDC2_ADC_PPB_NUM, 0);
    
        // VSEN_A_M1
        ADC_setupSOC(MTR1_VU_ADC_BASE, MTR1_VU_ADC_SOC_NUM, MTR1_ADC_TRIGGER_SOC,
                     MTR1_VU_ADC_CH_NUM, MTR1_ADC_I_SAMPLEWINDOW);
    
        // VSEN_B_M1
        ADC_setupSOC(MTR1_VV_ADC_BASE, MTR1_VV_ADC_SOC_NUM, MTR1_ADC_TRIGGER_SOC,
                     MTR1_VV_ADC_CH_NUM, MTR1_ADC_I_SAMPLEWINDOW);
    
        // VSEN_C_M1
        ADC_setupSOC(MTR1_VW_ADC_BASE, MTR1_VW_ADC_SOC_NUM, MTR1_ADC_TRIGGER_SOC,
                     MTR1_VW_ADC_CH_NUM, MTR1_ADC_I_SAMPLEWINDOW);
    
        // VSEN_DCBUS_M1-->Trig Interrupt
        ADC_setupSOC(MTR1_VDC_ADC_BASE, MTR1_VDC_ADC_SOC_NUM, MTR1_ADC_TRIGGER_SOC,
                     MTR1_VDC_ADC_CH_NUM, MTR1_ADC_I_SAMPLEWINDOW);
    
    #if defined(CMD_POT_EN)
        // POT_M1
        ADC_setupSOC(MTR1_POT_ADC_BASE, MTR1_POT_ADC_SOC_NUM, MTR1_ADC_TRIGGER_SOC,
                     MTR1_POT_ADC_CH_NUM, MTR1_ADC_I_SAMPLEWINDOW);
    #endif  // CMD_POT_EN
    
    #else // !MOTOR1_ISBLDC
        // configure the SOCs for M1
    #if defined(MOTOR1_DCLINKSS)
        // configure the interrupt sources
        // Interrupt for motor 1
        ADC_setInterruptSource(MTR1_ADC_INT_BASE,
                               MTR1_ADC_INT_NUM, MTR1_ADC_INT_SOC);
    
        // Idc 1st
        ADC_setupSOC(MTR1_IDC1_ADC_BASE, MTR1_IDC1_ADC_SOC_NUM, MTR1_IDC1_TRIGGER_SOC,
                     MTR1_IDC1_ADC_CH_NUM, MTR1_ADC_I_SAMPLEWINDOW);
    
        // Configure PPB to eliminate subtraction related calculation
        // PPB is associated with ADCA_SOC0
        ADC_setupPPB(MTR1_IDC1_ADC_BASE, MTR1_IDC1_ADC_PPB_NUM, MTR1_IDC1_ADC_SOC_NUM);
    
        // Write zero to this for now till offset calibration complete
        ADC_setPPBCalibrationOffset(MTR1_IDC1_ADC_BASE, MTR1_IDC1_ADC_PPB_NUM, 0);
    
        // Idc 2nd
        ADC_setupSOC(MTR1_IDC2_ADC_BASE, MTR1_IDC2_ADC_SOC_NUM, MTR1_IDC2_TRIGGER_SOC,
                     MTR1_IDC2_ADC_CH_NUM, MTR1_ADC_I_SAMPLEWINDOW);
    
        // Configure PPB to eliminate subtraction related calculation
        // PPB is associated with ADCC_SOC0
        ADC_setupPPB(MTR1_IDC2_ADC_BASE, MTR1_IDC2_ADC_PPB_NUM, MTR1_IDC2_ADC_SOC_NUM);
    
        // Write zero to this for now till offset calibration complete
        ADC_setPPBCalibrationOffset(MTR1_IDC2_ADC_BASE, MTR1_IDC2_ADC_PPB_NUM, 0);
    
        // Idc 3rd
        ADC_setupSOC(MTR1_IDC3_ADC_BASE, MTR1_IDC3_ADC_SOC_NUM, MTR1_IDC3_TRIGGER_SOC,
                     MTR1_IDC3_ADC_CH_NUM, MTR1_ADC_I_SAMPLEWINDOW);
    
        // Configure PPB to eliminate subtraction related calculation
        // PPB is associated with ADCA_SOC0
        ADC_setupPPB(MTR1_IDC3_ADC_BASE, MTR1_IDC3_ADC_PPB_NUM, MTR1_IDC3_ADC_SOC_NUM);
    
        // Write zero to this for now till offset calibration complete
        ADC_setPPBCalibrationOffset(MTR1_IDC3_ADC_BASE, MTR1_IDC3_ADC_PPB_NUM, 0);
    
        // Idc 4th
        ADC_setupSOC(MTR1_IDC4_ADC_BASE, MTR1_IDC4_ADC_SOC_NUM, MTR1_IDC4_TRIGGER_SOC,
                     MTR1_IDC4_ADC_CH_NUM, MTR1_ADC_I_SAMPLEWINDOW);
    
        // Configure PPB to eliminate subtraction related calculation
        // PPB is associated with ADCC_SOC0
        ADC_setupPPB(MTR1_IDC4_ADC_BASE, MTR1_IDC4_ADC_PPB_NUM, MTR1_IDC4_ADC_SOC_NUM);
    
        // Write zero to this for now till offset calibration complete
        ADC_setPPBCalibrationOffset(MTR1_IDC4_ADC_BASE, MTR1_IDC4_ADC_PPB_NUM, 0);
    
    #else   // !(MOTOR1_DCLINKSS)
        // configure the interrupt sources
        // Interrupt for motor 1
        ADC_setInterruptSource(MTR1_ADC_INT_BASE,
                               MTR1_ADC_INT_NUM, MTR1_ADC_INT_SOC);
        // ISEN_A_M1
        ADC_setupSOC(MTR1_IU_ADC_BASE, MTR1_IU_ADC_SOC_NUM, MTR1_ADC_TRIGGER_SOC,
                     MTR1_IU_ADC_CH_NUM, MTR1_ADC_I_SAMPLEWINDOW);
    
        // Configure PPB to eliminate subtraction related calculation
        // PPB is associated with ADCA_SOC0
        ADC_setupPPB(MTR1_IU_ADC_BASE, MTR1_IU_ADC_PPB_NUM, MTR1_IU_ADC_SOC_NUM);
    
        // Write zero to this for now till offset calibration complete
        ADC_setPPBCalibrationOffset(MTR1_IU_ADC_BASE, MTR1_IU_ADC_PPB_NUM, 0);
    
        // ISEN_B_M1
        ADC_setupSOC(MTR1_IV_ADC_BASE, MTR1_IV_ADC_SOC_NUM, MTR1_ADC_TRIGGER_SOC,
                     MTR1_IV_ADC_CH_NUM, MTR1_ADC_I_SAMPLEWINDOW);
    
        // Configure PPB to eliminate subtraction related calculation
        // PPB is associated with ADCC_SOC0
        ADC_setupPPB(MTR1_IV_ADC_BASE, MTR1_IV_ADC_PPB_NUM, MTR1_IV_ADC_SOC_NUM);
    
        // Write zero to this for now till offset calibration complete
        ADC_setPPBCalibrationOffset(MTR1_IV_ADC_BASE, MTR1_IV_ADC_PPB_NUM, 0);
    
        // ISEN_C_M1
        ADC_setupSOC(MTR1_IW_ADC_BASE, MTR1_IW_ADC_SOC_NUM, MTR1_ADC_TRIGGER_SOC,
                     MTR1_IW_ADC_CH_NUM, MTR1_ADC_I_SAMPLEWINDOW);
    
        // Configure PPB to eliminate subtraction related calculation
        // PPB is associated with ADCA_SOC0
        ADC_setupPPB(MTR1_IW_ADC_BASE, MTR1_IW_ADC_PPB_NUM, MTR1_IW_ADC_SOC_NUM);
    
        // Write zero to this for now till offset calibration complete
        ADC_setPPBCalibrationOffset(MTR1_IW_ADC_BASE, MTR1_IW_ADC_PPB_NUM, 0);
    #endif   // !(MOTOR1_DCLINKSS)
    
    #if defined(MOTOR1_FAST) || defined(MOTOR1_ISBLDC)
        // VSEN_A_M1
        ADC_setupSOC(MTR1_VU_ADC_BASE, MTR1_VU_ADC_SOC_NUM, MTR1_ADC_TRIGGER_SOC,
                     MTR1_VU_ADC_CH_NUM, MTR1_ADC_I_SAMPLEWINDOW);
    
        // VSEN_B_M1
        ADC_setupSOC(MTR1_VV_ADC_BASE, MTR1_VV_ADC_SOC_NUM, MTR1_ADC_TRIGGER_SOC,
                     MTR1_VV_ADC_CH_NUM, MTR1_ADC_I_SAMPLEWINDOW);
    
        // VSEN_C_M1
        ADC_setupSOC(MTR1_VW_ADC_BASE, MTR1_VW_ADC_SOC_NUM, MTR1_ADC_TRIGGER_SOC,
                     MTR1_VW_ADC_CH_NUM, MTR1_ADC_I_SAMPLEWINDOW);
    #endif  // MOTOR1_FAST || MOTOR1_ISBLDC
    
        // VSEN_DCBUS-->Trig Interrupt
        ADC_setupSOC(MTR1_VDC_ADC_BASE, MTR1_VDC_ADC_SOC_NUM, MTR1_ADC_TRIGGER_SOC,
                     MTR1_VDC_ADC_CH_NUM, MTR1_ADC_V_SAMPLEWINDOW);
    
    #if defined(CMD_POT_EN)
        // POT_M1
        ADC_setupSOC(MTR1_POT_ADC_BASE, MTR1_POT_ADC_SOC_NUM, MTR1_ADC_TRIGGER_SOC,
                     MTR1_POT_ADC_CH_NUM, MTR1_ADC_V_SAMPLEWINDOW);
    #endif  // CMD_POT_EN
    #endif  // !MOTOR1_ISBLDC
    
        return;
    } // end of HAL_setupADCs() function
    
    
    #if defined(HALL_ENABLE) && defined(CMD_CAP_EN)
    #error HALL and CMD_CAP can't be enabled at the same time
    #elif defined(HALL_ENABLE)
    void HAL_setupCAPs(HAL_MTR_Handle handle)
    {
        HAL_MTR_Obj    *obj = (HAL_MTR_Obj *)handle;
        uint16_t  cnt;
    
        for(cnt = 0; cnt < 3; cnt++)
        {
            // Disable ,clear all capture flags and interrupts
            ECAP_disableInterrupt(obj->capHandle[cnt],
                                  (ECAP_ISR_SOURCE_CAPTURE_EVENT_1  |
                                   ECAP_ISR_SOURCE_CAPTURE_EVENT_2  |
                                   ECAP_ISR_SOURCE_CAPTURE_EVENT_3  |
                                   ECAP_ISR_SOURCE_CAPTURE_EVENT_4  |
                                   ECAP_ISR_SOURCE_COUNTER_OVERFLOW |
                                   ECAP_ISR_SOURCE_COUNTER_PERIOD   |
                                   ECAP_ISR_SOURCE_COUNTER_COMPARE));
    
            ECAP_clearInterrupt(obj->capHandle[cnt],
                                (ECAP_ISR_SOURCE_CAPTURE_EVENT_1  |
                                 ECAP_ISR_SOURCE_CAPTURE_EVENT_2  |
                                 ECAP_ISR_SOURCE_CAPTURE_EVENT_3  |
                                 ECAP_ISR_SOURCE_CAPTURE_EVENT_4  |
                                 ECAP_ISR_SOURCE_COUNTER_OVERFLOW |
                                 ECAP_ISR_SOURCE_COUNTER_PERIOD   |
                                 ECAP_ISR_SOURCE_COUNTER_COMPARE));
    
            // Disable CAP1-CAP4 register loads
            ECAP_disableTimeStampCapture(obj->capHandle[cnt]);
    
            // Configure eCAP
            //    Enable capture mode.
            //    One shot mode, stop capture at event 3.
            //    Set polarity of the events to rising, falling, rising edge.
            //    Set capture in time difference mode.
            //    Select input from XBAR4/5/6.
            //    Enable eCAP module.
            //    Enable interrupt.
            ECAP_stopCounter(obj->capHandle[cnt]);
            ECAP_enableCaptureMode(obj->capHandle[cnt]);
    
            ECAP_setCaptureMode(obj->capHandle[cnt], ECAP_CONTINUOUS_CAPTURE_MODE, ECAP_EVENT_3);
    
            ECAP_setEventPolarity(obj->capHandle[cnt], ECAP_EVENT_1, ECAP_EVNT_FALLING_EDGE);
            ECAP_setEventPolarity(obj->capHandle[cnt], ECAP_EVENT_2, ECAP_EVNT_RISING_EDGE);
            ECAP_setEventPolarity(obj->capHandle[cnt], ECAP_EVENT_3, ECAP_EVNT_FALLING_EDGE);
            ECAP_setEventPolarity(obj->capHandle[cnt], ECAP_EVENT_4, ECAP_EVNT_RISING_EDGE);
    
            ECAP_enableCounterResetOnEvent(obj->capHandle[cnt], ECAP_EVENT_1);
            ECAP_enableCounterResetOnEvent(obj->capHandle[cnt], ECAP_EVENT_2);
            ECAP_enableCounterResetOnEvent(obj->capHandle[cnt], ECAP_EVENT_3);
            ECAP_enableCounterResetOnEvent(obj->capHandle[cnt], ECAP_EVENT_4);
    
            ECAP_enableLoadCounter(obj->capHandle[cnt]);
            ECAP_setSyncOutMode(obj->capHandle[cnt], ECAP_SYNC_OUT_SYNCI);
            ECAP_startCounter(obj->capHandle[cnt]);
            ECAP_enableTimeStampCapture(obj->capHandle[cnt]);
            ECAP_reArm(obj->capHandle[cnt]);
        }
    
        XBAR_setInputPin(INPUTXBAR_BASE, MTR1_CAP_U_XBAR, MTR1_HALL_U_GPIO);
        XBAR_setInputPin(INPUTXBAR_BASE, MTR1_CAP_V_XBAR, MTR1_HALL_V_GPIO);
        XBAR_setInputPin(INPUTXBAR_BASE, MTR1_CAP_W_XBAR, MTR1_HALL_W_GPIO);
    
        ECAP_selectECAPInput(obj->capHandle[0], MTR1_CAP_U_INSEL);
        ECAP_selectECAPInput(obj->capHandle[1], MTR1_CAP_V_INSEL);
        ECAP_selectECAPInput(obj->capHandle[2], MTR1_CAP_W_INSEL);
    
        return;
    }
    
    void HAL_resetCAPTimeStamp(HAL_MTR_Handle handle)
    {
        HAL_MTR_Obj    *obj = (HAL_MTR_Obj *)handle;
        uint16_t  cnt;
    
        for(cnt = 0; cnt < 3; cnt++)
        {
            ECAP_setAPWMPeriod(obj->capHandle[cnt], 0);
            ECAP_setAPWMCompare(obj->capHandle[cnt], 0x01FFFFFF);
            ECAP_setAPWMShadowPeriod(obj->capHandle[cnt], 0x01FFFFFF);
            ECAP_setAPWMShadowCompare(obj->capHandle[cnt], 0x01FFFFFF);
        }
    
        return;
    }
    #elif defined(CMD_CAP_EN)
    void HAL_setupCAPs(HAL_MTR_Handle handle)
    {
        HAL_MTR_Obj    *obj = (HAL_MTR_Obj *)handle;
    
        // Disable ,clear all capture flags and interrupts
        ECAP_disableInterrupt(obj->capHandle,
                              (ECAP_ISR_SOURCE_CAPTURE_EVENT_1  |
                               ECAP_ISR_SOURCE_CAPTURE_EVENT_2  |
                               ECAP_ISR_SOURCE_CAPTURE_EVENT_3  |
                               ECAP_ISR_SOURCE_CAPTURE_EVENT_4  |
                               ECAP_ISR_SOURCE_COUNTER_OVERFLOW |
                               ECAP_ISR_SOURCE_COUNTER_PERIOD   |
                               ECAP_ISR_SOURCE_COUNTER_COMPARE));
    
        ECAP_clearInterrupt(obj->capHandle,
                            (ECAP_ISR_SOURCE_CAPTURE_EVENT_1  |
                             ECAP_ISR_SOURCE_CAPTURE_EVENT_2  |
                             ECAP_ISR_SOURCE_CAPTURE_EVENT_3  |
                             ECAP_ISR_SOURCE_CAPTURE_EVENT_4  |
                             ECAP_ISR_SOURCE_COUNTER_OVERFLOW |
                             ECAP_ISR_SOURCE_COUNTER_PERIOD   |
                             ECAP_ISR_SOURCE_COUNTER_COMPARE));
    
        // Disable CAP1-CAP4 register loads
        ECAP_disableTimeStampCapture(obj->capHandle);
    
        // Configure eCAP
        //    Enable capture mode.
        //    One shot mode, stop capture at event 3.
        //    Set polarity of the events to rising, falling, rising edge.
        //    Set capture in time difference mode.
        //    Select input from XBAR4/5/6.
        //    Enable eCAP module.
        //    Enable interrupt.
        ECAP_stopCounter(obj->capHandle);
        ECAP_enableCaptureMode(obj->capHandle);
    
        ECAP_setCaptureMode(obj->capHandle, ECAP_CONTINUOUS_CAPTURE_MODE, ECAP_EVENT_4);
    
        ECAP_setEventPolarity(obj->capHandle, ECAP_EVENT_1, ECAP_EVNT_FALLING_EDGE);
        ECAP_setEventPolarity(obj->capHandle, ECAP_EVENT_2, ECAP_EVNT_RISING_EDGE);
        ECAP_setEventPolarity(obj->capHandle, ECAP_EVENT_3, ECAP_EVNT_FALLING_EDGE);
        ECAP_setEventPolarity(obj->capHandle, ECAP_EVENT_4, ECAP_EVNT_RISING_EDGE);
    
        ECAP_enableCounterResetOnEvent(obj->capHandle, ECAP_EVENT_1);
        ECAP_enableCounterResetOnEvent(obj->capHandle, ECAP_EVENT_2);
        ECAP_enableCounterResetOnEvent(obj->capHandle, ECAP_EVENT_3);
        ECAP_enableCounterResetOnEvent(obj->capHandle, ECAP_EVENT_4);
    
        ECAP_enableLoadCounter(obj->capHandle);
        ECAP_setSyncOutMode(obj->capHandle, ECAP_SYNC_OUT_SYNCI);
        ECAP_startCounter(obj->capHandle);
        ECAP_enableTimeStampCapture(obj->capHandle);
        ECAP_reArm(obj->capHandle);
    
        XBAR_setInputPin(INPUTXBAR_BASE, MTR1_CAP_FREQ_XBAR, MTR1_CAP_FREQ_GPIO);
    
        ECAP_selectECAPInput(obj->capHandle, MTR1_CAP_FREQ_INSEL);
    
        return;
    }
    
    void HAL_resetCAPTimeStamp(HAL_MTR_Handle handle)
    {
        HAL_MTR_Obj    *obj = (HAL_MTR_Obj *)handle;
    
        ECAP_setAPWMPeriod(obj->capHandle, 0);
        ECAP_setAPWMCompare(obj->capHandle, 0x01FFFFFF);
        ECAP_setAPWMShadowPeriod(obj->capHandle, 0x01FFFFFF);
        ECAP_setAPWMShadowCompare(obj->capHandle, 0x01FFFFFF);
    
        return;
    }
    #endif  // HALL_ENABLE || CMD_CAP_EN
    
    // HAL_setupCMPSSs
    void HAL_setupCMPSSs(HAL_MTR_Handle handle)
    {
        HAL_MTR_Obj *obj = (HAL_MTR_Obj *)handle;
    
    #if defined(MOTOR1_ISBLDC) || defined(MOTOR1_DCLINKSS)
        // Refer to the Table 9-2 in Chapter 9 of TMS320F28004x
        // Technical Reference Manual (SPRUI33B), to configure the ePWM X-Bar
    #if defined(BSXL8323RS_REVA) || defined(BSXL8323RH_REVB)
        uint16_t cmpsaDACL = MTR1_CMPSS_DACL_VALUE;
    
        ASysCtl_selectCMPLPMux(MTR1_IDC_CMPLP_SEL, MTR1_IDC_CMPLP_MUX);
    
        // Enable CMPSS and configure the negative input signal to come from the DAC
        CMPSS_enableModule(obj->cmpssHandle[0]);
    
        // NEG signal from DAC for COMP-L
        CMPSS_configLowComparator(obj->cmpssHandle[0], CMPSS_INSRC_DAC);
    
        // Configure the output signals. Both CTRIPH/L and CTRIPOUTH/L will be fed by
        // the asynchronous comparator output.
        // Dig filter output ==> CTRIPL, Dig filter output ==> CTRIPOUTL
        CMPSS_configOutputsLow(obj->cmpssHandle[0],
                               CMPSS_TRIP_FILTER |
                               CMPSS_TRIPOUT_FILTER |
                               CMPSS_INV_INVERTED);
    
        // Configure digital filter. For this example, the maxiumum values will be
        // used for the clock prescale, sample window size, and threshold.
        // Initialize the filter logic and start filtering
        CMPSS_configFilterLow(obj->cmpssHandle[0], 32, 32, 30);
        CMPSS_initFilterLow(obj->cmpssHandle[0]);
    
        // Set up COMPHYSCTL register
        // COMP hysteresis set to 2x typical value
        CMPSS_setHysteresis(obj->cmpssHandle[0], 1);
    
        // Use VDDA as the reference for the DAC and set DAC value to midpoint for
        // arbitrary reference
        CMPSS_configDAC(obj->cmpssHandle[0],
                   CMPSS_DACREF_VDDA | CMPSS_DACVAL_SYSCLK | CMPSS_DACSRC_SHDW);
    
        // Set DAC-L to allowed MAX -ve current
        CMPSS_setDACValueLow(obj->cmpssHandle[0], cmpsaDACL);
    
        // Clear any low comparator digital filter output latch
        CMPSS_clearFilterLatchLow(obj->cmpssHandle[0]);
    #else
    #error This board doesn't support single shunt
    #endif  // BSXL8323RS_REVA || BSXL8323RH_REVB
    #else   // !(MOTOR1_ISBLDC || MOTOR1_DCLINKSS)
        // Refer to the Table 9-2 in Chapter 9 of TMS320F28004x
        // Technical Reference Manual (SPRUI33B), to configure the ePWM X-Bar
        uint16_t cmpsaDACH = MTR1_CMPSS_DACH_VALUE;
        uint16_t cmpsaDACL = MTR1_CMPSS_DACL_VALUE;
    
    #if defined(HVMTRPFC_REV1P1)
        ASysCtl_selectCMPHPMux(MTR1_IU_CMPHP_SEL, MTR1_IU_CMPHP_MUX);
    
        ASysCtl_selectCMPHPMux(MTR1_IV_CMPHP_SEL, MTR1_IV_CMPHP_MUX);
        ASysCtl_selectCMPLPMux(MTR1_IV_CMPLP_SEL, MTR1_IV_CMPLP_MUX);
    
        ASysCtl_selectCMPLPMux(MTR1_IW_CMPLP_SEL, MTR1_IW_CMPLP_MUX);
    
        //----- U Phase ------------------------------------------------------------
        // Enable CMPSS and configure the negative input signal to come from the DAC
        CMPSS_enableModule(obj->cmpssHandle[0]);
    
        // NEG signal from DAC for COMP-H
        CMPSS_configHighComparator(obj->cmpssHandle[0], CMPSS_INSRC_DAC);
    
    
        // Configure the output signals. Both CTRIPH and CTRIPOUTH will be fed by
        // the asynchronous comparator output.
        // Dig filter output ==> CTRIPH, Dig filter output ==> CTRIPOUTH
        CMPSS_configOutputsHigh(obj->cmpssHandle[0],
                                CMPSS_TRIP_FILTER |
                                CMPSS_TRIPOUT_FILTER);
    
        // Configure digital filter. For this example, the maxiumum values will be
        // used for the clock prescale, sample window size, and threshold.
        CMPSS_configFilterHigh(obj->cmpssHandle[0], 32, 32, 30);
        CMPSS_initFilterHigh(obj->cmpssHandle[0]);
    
        // Set up COMPHYSCTL register
        // COMP hysteresis set to 2x typical value
        CMPSS_setHysteresis(obj->cmpssHandle[0], 1);
    
        // Use VDDA as the reference for the DAC and set DAC value to midpoint for
        // arbitrary reference
        CMPSS_configDAC(obj->cmpssHandle[0],
                   CMPSS_DACREF_VDDA | CMPSS_DACVAL_SYSCLK | CMPSS_DACSRC_SHDW);
    
        // Set DAC-H to allowed MAX +ve current
        CMPSS_setDACValueHigh(obj->cmpssHandle[0], cmpsaDACH);
    
        // Clear any high comparator digital filter output latch
        CMPSS_clearFilterLatchHigh(obj->cmpssHandle[0]);
    
        //---------------- V pHase -------------------------------------------------
        // Enable CMPSS and configure the negative input signal to come from the DAC
        CMPSS_enableModule(obj->cmpssHandle[1]);
    
        // NEG signal from DAC for COMP-H
        CMPSS_configHighComparator(obj->cmpssHandle[1], CMPSS_INSRC_DAC);
    
        // NEG signal from DAC for COMP-L
        CMPSS_configLowComparator(obj->cmpssHandle[1], CMPSS_INSRC_DAC);
    
        // Configure the output signals. Both CTRIPH and CTRIPOUTH will be fed by
        // the asynchronous comparator output.
        // Dig filter output ==> CTRIPH, Dig filter output ==> CTRIPOUTH
        CMPSS_configOutputsHigh(obj->cmpssHandle[1],
                                CMPSS_TRIP_FILTER |
                                CMPSS_TRIPOUT_FILTER);
    
        // Dig filter output ==> CTRIPL, Dig filter output ==> CTRIPOUTL
        CMPSS_configOutputsLow(obj->cmpssHandle[1],
                               CMPSS_TRIP_FILTER |
                               CMPSS_TRIPOUT_FILTER |
                               CMPSS_INV_INVERTED);
    
        // Configure digital filter. For this example, the maxiumum values will be
        // used for the clock prescale, sample window size, and threshold.
        CMPSS_configFilterHigh(obj->cmpssHandle[1], 32, 32, 30);
        CMPSS_initFilterHigh(obj->cmpssHandle[1]);
    
        // Initialize the filter logic and start filtering
        CMPSS_configFilterLow(obj->cmpssHandle[1], 32, 32, 30);
        CMPSS_initFilterLow(obj->cmpssHandle[1]);
    
        // Set up COMPHYSCTL register
        // COMP hysteresis set to 2x typical value
        CMPSS_setHysteresis(obj->cmpssHandle[1], 1);
    
        // Use VDDA as the reference for the DAC and set DAC value to midpoint for
        // arbitrary reference
        CMPSS_configDAC(obj->cmpssHandle[1],
                   CMPSS_DACREF_VDDA | CMPSS_DACVAL_SYSCLK | CMPSS_DACSRC_SHDW);
    
        // Set DAC-H to allowed MAX +ve current
        CMPSS_setDACValueHigh(obj->cmpssHandle[1], cmpsaDACH);
    
        // Set DAC-L to allowed MAX -ve current
        CMPSS_setDACValueLow(obj->cmpssHandle[1], cmpsaDACL);
    
        // Clear any high comparator digital filter output latch
        CMPSS_clearFilterLatchHigh(obj->cmpssHandle[1]);
    
        // Clear any low comparator digital filter output latch
        CMPSS_clearFilterLatchLow(obj->cmpssHandle[1]);
    
        //---------------- W Phase -------------------------------------------------
        // Enable CMPSS and configure the negative input signal to come from the DAC
        CMPSS_enableModule(obj->cmpssHandle[2]);
    
        // NEG signal from DAC for COMP-L
        CMPSS_configLowComparator(obj->cmpssHandle[2], CMPSS_INSRC_DAC);
    
        // Configure the output signals. Both CTRIPH and CTRIPOUTH will be fed by
        // the asynchronous comparator output.
        // Dig filter output ==> CTRIPL, Dig filter output ==> CTRIPOUTL
        CMPSS_configOutputsLow(obj->cmpssHandle[2],
                               CMPSS_TRIP_FILTER |
                               CMPSS_TRIPOUT_FILTER |
                               CMPSS_INV_INVERTED);
    
        // Configure digital filter. For this example, the maxiumum values will be
        // used for the clock prescale, sample window size, and threshold.
        // Initialize the filter logic and start filtering
        CMPSS_configFilterLow(obj->cmpssHandle[2], 32, 32, 30);
        CMPSS_initFilterLow(obj->cmpssHandle[2]);
    
        // Set up COMPHYSCTL register
        // COMP hysteresis set to 2x typical value
        CMPSS_setHysteresis(obj->cmpssHandle[2], 1);
    
        // Use VDDA as the reference for the DAC and set DAC value to midpoint for
        // arbitrary reference
        CMPSS_configDAC(obj->cmpssHandle[2],
                   CMPSS_DACREF_VDDA | CMPSS_DACVAL_SYSCLK | CMPSS_DACSRC_SHDW);
    
        // Set DAC-L to allowed MAX -ve current
        CMPSS_setDACValueLow(obj->cmpssHandle[2], cmpsaDACL);
    
        // Clear any low comparator digital filter output latch
        CMPSS_clearFilterLatchLow(obj->cmpssHandle[2]);
    #elif defined(BSXL8323RH_REVB) || defined(BSXL8323RS_REVA) || \
          defined(BSXL8353RS_REVA) || defined(BSXL8316RT_REVA) || \
          defined(BSXL3PHGAN_REVA)
    
        uint16_t  cnt;
    
        //ASysCtl_selectCMPHPMux(MTR1_IU_CMPHP_SEL, MTR1_IU_CMPHP_MUX);
        //ASysCtl_selectCMPLPMux(MTR1_IU_CMPLP_SEL, MTR1_IU_CMPLP_MUX);
    
       // ASysCtl_selectCMPHPMux(MTR1_IV_CMPHP_SEL, MTR1_IV_CMPHP_MUX);
        //ASysCtl_selectCMPLPMux(MTR1_IV_CMPLP_SEL, MTR1_IV_CMPLP_MUX);
    
       // ASysCtl_selectCMPHPMux(MTR1_IW_CMPHP_SEL, MTR1_IW_CMPHP_MUX);
        //ASysCtl_selectCMPLPMux(MTR1_IW_CMPLP_SEL, MTR1_IW_CMPLP_MUX);
    
        for(cnt=0; cnt<3; cnt++)
        {
            // Enable CMPSS and configure the negative input signal to come from the DAC
            CMPSS_enableModule(obj->cmpssHandle[cnt]);
    
            // NEG signal from DAC for COMP-H
            CMPSS_configHighComparator(obj->cmpssHandle[cnt], CMPSS_INSRC_DAC);
    
            // NEG signal from DAC for COMP-L
            CMPSS_configLowComparator(obj->cmpssHandle[cnt], CMPSS_INSRC_DAC);
    
            // Configure the output signals. Both CTRIPH and CTRIPOUTH will be fed by
            // the asynchronous comparator output.
            // Dig filter output ==> CTRIPH, Dig filter output ==> CTRIPOUTH
            CMPSS_configOutputsHigh(obj->cmpssHandle[cnt],
                                    CMPSS_TRIP_FILTER |
                                    CMPSS_TRIPOUT_FILTER);
    
            // Dig filter output ==> CTRIPL, Dig filter output ==> CTRIPOUTL
            CMPSS_configOutputsLow(obj->cmpssHandle[cnt],
                                   CMPSS_TRIP_FILTER |
                                   CMPSS_TRIPOUT_FILTER |
                                   CMPSS_INV_INVERTED);
    
            // Configure digital filter. For this example, the maxiumum values will be
            // used for the clock prescale, sample window size, and threshold.
            CMPSS_configFilterHigh(obj->cmpssHandle[cnt], 32, 32, 30);
            CMPSS_initFilterHigh(obj->cmpssHandle[cnt]);
    
            // Initialize the filter logic and start filtering
            CMPSS_configFilterLow(obj->cmpssHandle[cnt], 32, 32, 30);
            CMPSS_initFilterLow(obj->cmpssHandle[cnt]);
    
            // Set up COMPHYSCTL register
            // COMP hysteresis set to 2x typical value
            CMPSS_setHysteresis(obj->cmpssHandle[cnt], 1);
    
            // Use VDDA as the reference for the DAC and set DAC value to midpoint for
            // arbitrary reference
            CMPSS_configDAC(obj->cmpssHandle[cnt],
                       CMPSS_DACREF_VDDA | CMPSS_DACVAL_SYSCLK | CMPSS_DACSRC_SHDW);
    
            // Set DAC-H to allowed MAX +ve current
            CMPSS_setDACValueHigh(obj->cmpssHandle[cnt], cmpsaDACH);
    
            // Set DAC-L to allowed MAX -ve current
            CMPSS_setDACValueLow(obj->cmpssHandle[cnt], cmpsaDACL);
    
            // Clear any high comparator digital filter output latch
            CMPSS_clearFilterLatchHigh(obj->cmpssHandle[cnt]);
    
            // Clear any low comparator digital filter output latch
            CMPSS_clearFilterLatchLow(obj->cmpssHandle[cnt]);
        }
    #endif  // !HVMTRPFC_REV1P1
    #endif  // !(MOTOR1_ISBLDC || MOTOR1_DCLINKSS)
    
        return;
    } // end of HAL_setupCMPSSs() function
    
    // HAL_setupGate & HAL_enableDRV
    #if defined(BSXL8323RS_REVA) || defined(BSXL8353RS_REVA) || \
        defined(BSXL8316RT_REVA)
    void HAL_enableDRV(HAL_MTR_Handle handle)
    {
        HAL_MTR_Obj *obj = (HAL_MTR_Obj *)handle;
    
        DRVIC_enable(obj->drvicHandle);
    
        return;
    }  // end of HAL_enableDRV() function
    
    void HAL_writeDRVData(HAL_MTR_Handle handle, DRVIC_VARS_t *drvicVars)
    {
        HAL_MTR_Obj  *obj = (HAL_MTR_Obj *)handle;
    
        DRVIC_writeData(obj->drvicHandle, drvicVars);
    
        return;
    }  // end of HAL_writeDRVData() function
    
    
    void HAL_readDRVData(HAL_MTR_Handle handle, DRVIC_VARS_t *drvicVars)
    {
        HAL_MTR_Obj  *obj = (HAL_MTR_Obj *)handle;
    
        DRVIC_readData(obj->drvicHandle, drvicVars);
    
        return;
    }  // end of HAL_readDRVData() function
    
    void HAL_setupDRVSPI(HAL_MTR_Handle handle, DRVIC_VARS_t *drvicVars)
    {
        HAL_MTR_Obj  *obj = (HAL_MTR_Obj *)handle;
    
        DRVIC_setupSPI(obj->drvicHandle, drvicVars);
    
        return;
    }  // end of HAL_setupDRVSPI() function
    
    void HAL_setupGate(HAL_MTR_Handle handle)
    {
        HAL_MTR_Obj *obj = (HAL_MTR_Obj *)handle;
    
        DRVIC_setSPIHandle(obj->drvicHandle, obj->spiHandle);
    
        DRVIC_setGPIOCSNumber(obj->drvicHandle, MTR1_DRV_SPI_CS_GPIO);
        DRVIC_setGPIOENNumber(obj->drvicHandle, MTR1_GATE_EN_GPIO);
    
        return;
    } // HAL_setupGate() function
    
    void HAL_setupSPI(HAL_MTR_Handle handle)
    {
        HAL_MTR_Obj   *obj = (HAL_MTR_Obj *)handle;
    
        // Must put SPI into reset before configuring it
        SPI_disableModule(obj->spiHandle);
    
        // SPI configuration. Use a 500kHz SPICLK and 16-bit word size, 25MHz LSPCLK
        SPI_setConfig(obj->spiHandle, DEVICE_LSPCLK_FREQ, SPI_PROT_POL0PHA0,
                      SPI_MODE_MASTER, 400000, 16);
    
        SPI_disableLoopback(obj->spiHandle);
    
        SPI_setEmulationMode(obj->spiHandle, SPI_EMULATION_FREE_RUN);
    
        SPI_enableFIFO(obj->spiHandle);
        SPI_setTxFifoTransmitDelay(obj->spiHandle, 0x10);
    
        SPI_clearInterruptStatus(obj->spiHandle, SPI_INT_TXFF);
    
        // Configuration complete. Enable the module.
        SPI_enableModule(obj->spiHandle);
    
        return;
    }  // end of HAL_setupSPI() function
    // BSXL8323RS_REVA || BSXL8353RS_REVA || BSXL8316RT_REVA
    #elif defined(BSXL8323RH_REVB)
    void HAL_setupGate(HAL_MTR_Handle handle)
    {
        HAL_MTR_Obj *obj = (HAL_MTR_Obj *)handle;
    
        obj->gateModeGPIO = MTR1_GATE_MODE_GPIO;
        obj->gateGainGPIO = MTR1_GATE_GAIN_GPIO;
        obj->gateEnableGPIO = MTR1_GATE_EN_GPIO;
    
        return;
    } // HAL_setupGate() function
    
    void HAL_enableDRV(HAL_MTR_Handle handle)
    {
        HAL_MTR_Obj *obj = (HAL_MTR_Obj *)handle;
    
    #if defined(MOTOR1_ISBLDC)
        // Set EN_GATE to high for enabling the DRV
        GPIO_writePin(obj->gateEnableGPIO, 1);
    
        // Set MODE to low for setting 3-PWM mode (has a 47k pull down)
        GPIO_setDirectionMode(obj->gateModeGPIO, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(obj->gateModeGPIO, GPIO_PIN_TYPE_STD);
    
        // disable calibrate mode
        GPIO_writePin(obj->gateCalGPIO, 0);
    #else  // !MOTOR1_ISBLDC
        // Set EN_GATE to high for enabling the DRV
        GPIO_writePin(obj->gateEnableGPIO, 1);
    
        // Set MODE to low for setting 6-PWM mode
        GPIO_writePin(obj->gateModeGPIO, 0);
    
        // disable calibrate mode
        GPIO_writePin(obj->gateCalGPIO, 0);
    #endif  // !MOTOR1_ISBLDC
    
        return;
    } // HAL_setupGate() function
    // BSXL8323RH_REVB
    #elif defined(BSXL3PHGAN_REVA)
    void HAL_setupGate(HAL_MTR_Handle handle)
    {
        HAL_MTR_Obj *obj = (HAL_MTR_Obj *)handle;
    
        obj->gateEnableGPIO = MTR1_GATE_EN_GPIO;
    
        return;
    } // HAL_setupGate() function
    
    void HAL_enableDRV(HAL_MTR_Handle handle)
    {
        HAL_MTR_Obj *obj = (HAL_MTR_Obj *)handle;
    
        // Set EN_GATE to low for enabling the DRV
        GPIO_writePin(obj->gateEnableGPIO, 0);
    
        return;
    } // HAL_setupGate() function
    // HVMTRPFC_REV1P1
    #elif defined(HVMTRPFC_REV1P1)
    void HAL_setupGate(HAL_MTR_Handle handle)
    {
        HAL_MTR_Obj *obj = (HAL_MTR_Obj *)handle;
    
        obj->gateEnableGPIO = MTR1_GATE_EN_GPIO;
    
        return;
    } // HAL_setupGate() function
    
    void HAL_enableDRV(HAL_MTR_Handle handle)
    {
        HAL_MTR_Obj *obj = (HAL_MTR_Obj *)handle;
    
        // Set EN_GATE to low for enabling the DRV
        GPIO_writePin(obj->gateEnableGPIO, 0);
    
        return;
    } // HAL_setupGate() function
    // HVMTRPFC_REV1P1
    #else
    #error No HAL_setupGate or HAL_enableDRV
    #endif  // HAL_setupGate & HAL_enableDRV
    
    void HAL_setupMtrFaults(HAL_MTR_Handle handle)
    {
        HAL_MTR_Obj *obj = (HAL_MTR_Obj *)handle;
        uint16_t cnt;
    
        // Configure TRIP 7 to OR the High and Low trips from both
        // comparator 5, 3 & 1, clear everything first
        EALLOW;
        HWREG(XBAR_EPWM_CFG_REG_BASE + MTR1_XBAR_TRIP_ADDRL) = 0;
        HWREG(XBAR_EPWM_CFG_REG_BASE + MTR1_XBAR_TRIP_ADDRH) = 0;
        EDIS;
    
    #if defined(MOTOR1_ISBLDC) || defined(MOTOR1_DCLINKSS)
        // Configure TRIP7 to be CTRIP5H and CTRIP5L using the ePWM X-BAR
        XBAR_setEPWMMuxConfig(MTR1_XBAR_TRIP, MTR1_IDC_XBAR_EPWM_MUX);
    
        // Disable all the mux first
        XBAR_disableEPWMMux(MTR1_XBAR_TRIP, 0xFFFF);
    
        // Enable Mux 0  OR Mux 4 to generate TRIP
        XBAR_enableEPWMMux(MTR1_XBAR_TRIP, MTR1_IDC_XBAR_MUX);
    #else   // !(MOTOR1_ISBLDC || MOTOR1_DCLINKSS)
        // Configure TRIP7 to be CTRIP5H and CTRIP5L using the ePWM X-BAR
        XBAR_setEPWMMuxConfig(MTR1_XBAR_TRIP, MTR1_IU_XBAR_EPWM_MUX);
    
        // Configure TRIP7 to be CTRIP1H and CTRIP1L using the ePWM X-BAR
        XBAR_setEPWMMuxConfig(MTR1_XBAR_TRIP, MTR1_IV_XBAR_EPWM_MUX);
    
        // Configure TRIP7 to be CTRIP3H and CTRIP3L using the ePWM X-BAR
        XBAR_setEPWMMuxConfig(MTR1_XBAR_TRIP, MTR1_IW_XBAR_EPWM_MUX);
    
        // Disable all the mux first
        XBAR_disableEPWMMux(MTR1_XBAR_TRIP, 0xFFFF);
    
        // Enable Mux 0  OR Mux 4 to generate TRIP
        XBAR_enableEPWMMux(MTR1_XBAR_TRIP, MTR1_IU_XBAR_MUX |
                                           MTR1_IV_XBAR_MUX | MTR1_IW_XBAR_MUX);
    #endif  // !(MOTOR1_ISBLDC || MOTOR1_DCLINKSS)
    /* JS
        // configure the input x bar for TZ2 to GPIO, where Over Current is connected
        XBAR_setInputPin(INPUTXBAR_BASE, MTR1_XBAR_INPUT1, MTR1_PM_nFAULT_GPIO);
        XBAR_lockInput(INPUTXBAR_BASE, MTR1_XBAR_INPUT1);
    */
        // Configure Trip Mechanism for the Motor control software
        // -Cycle by cycle trip on CPU halt
        // -One shot fault trip zone
        // These trips need to be repeated for EPWM1 ,2 & 3
    
        for(cnt=0; cnt<3; cnt++)
        {
            EPWM_enableTripZoneSignals(obj->pwmHandle[cnt], MTR1_TZ_OSHT1);
    
    
            EPWM_enableTripZoneSignals(obj->pwmHandle[cnt],
                                       EPWM_TZ_SIGNAL_CBC6);
    
            //enable DC TRIP combinational input
            EPWM_enableDigitalCompareTripCombinationInput(obj->pwmHandle[cnt],
                                                  MTR1_DCTRIPIN, EPWM_DC_TYPE_DCAH);
    
            EPWM_enableDigitalCompareTripCombinationInput(obj->pwmHandle[cnt],
                                                  MTR1_DCTRIPIN, EPWM_DC_TYPE_DCBH);
    
            // Trigger event when DCAH is High
            EPWM_setTripZoneDigitalCompareEventCondition(obj->pwmHandle[cnt],
                                                         EPWM_TZ_DC_OUTPUT_A1,
                                                         EPWM_TZ_EVENT_DCXH_HIGH);
    
            // Trigger event when DCBH is High
            EPWM_setTripZoneDigitalCompareEventCondition(obj->pwmHandle[cnt],
                                                         EPWM_TZ_DC_OUTPUT_B1,
                                                         EPWM_TZ_EVENT_DCXL_HIGH);
    
            // Configure the DCA path to be un-filtered and asynchronous
            EPWM_setDigitalCompareEventSource(obj->pwmHandle[cnt],
                                              EPWM_DC_MODULE_A,
                                              EPWM_DC_EVENT_1,
                                              EPWM_DC_EVENT_SOURCE_FILT_SIGNAL);
    
            // Configure the DCB path to be un-filtered and asynchronous
            EPWM_setDigitalCompareEventSource(obj->pwmHandle[cnt],
                                              EPWM_DC_MODULE_B,
                                              EPWM_DC_EVENT_1,
                                              EPWM_DC_EVENT_SOURCE_FILT_SIGNAL);
    
            EPWM_setDigitalCompareEventSyncMode(obj->pwmHandle[cnt],
                                                EPWM_DC_MODULE_A,
                                                EPWM_DC_EVENT_1,
                                                EPWM_DC_EVENT_INPUT_NOT_SYNCED);
    
            EPWM_setDigitalCompareEventSyncMode(obj->pwmHandle[cnt],
                                                EPWM_DC_MODULE_B,
                                                EPWM_DC_EVENT_1,
                                                EPWM_DC_EVENT_INPUT_NOT_SYNCED);
    
            // Enable DCA as OST
            EPWM_enableTripZoneSignals(obj->pwmHandle[cnt], EPWM_TZ_SIGNAL_DCAEVT1);
    
            // Enable DCB as OST
            EPWM_enableTripZoneSignals(obj->pwmHandle[cnt], EPWM_TZ_SIGNAL_DCBEVT1);
    
            // What do we want the OST/CBC events to do?
            // TZA events can force EPWMxA
            // TZB events can force EPWMxB
            EPWM_setTripZoneAction(obj->pwmHandle[cnt],
                                   EPWM_TZ_ACTION_EVENT_TZA,
                                   EPWM_TZ_ACTION_LOW);
    
            EPWM_setTripZoneAction(obj->pwmHandle[cnt],
                                   EPWM_TZ_ACTION_EVENT_TZB,
                                   EPWM_TZ_ACTION_LOW);
        }
    
    #if defined(MOTOR1_ISBLDC) || defined(MOTOR1_DCLINKSS)
    #if defined(BSXL8323RS_REVA) || defined(BSXL8323RH_REVB)
        // Clear any low comparator digital filter output latch
        CMPSS_clearFilterLatchLow(obj->cmpssHandle[0]);
    #else
    #error This board doesn't support single shunt
    #endif  // BSXL8323RS_REVA || BSXL8323RH_REVB
    #else   // !(MOTOR1_ISBLDC || MOTOR1_DCLINKSS)
    #if defined(HVMTRPFC_REV1P1)
        // Clear any high comparator digital filter output latch
        CMPSS_clearFilterLatchHigh(obj->cmpssHandle[0]);
    
        // Clear any high comparator digital filter output latch
        CMPSS_clearFilterLatchHigh(obj->cmpssHandle[1]);
    
        // Clear any low comparator digital filter output latch
        CMPSS_clearFilterLatchLow(obj->cmpssHandle[1]);
    
        // Clear any low comparator digital filter output latch
        CMPSS_clearFilterLatchLow(obj->cmpssHandle[2]);
    #else // !HVMTRPFC_REV1P1
        for(cnt=0; cnt<3; cnt++)
        {
            // Clear any high comparator digital filter output latch
            CMPSS_clearFilterLatchHigh(obj->cmpssHandle[cnt]);
    
            // Clear any low comparator digital filter output latch
            CMPSS_clearFilterLatchLow(obj->cmpssHandle[cnt]);
    
            // Clear any spurious fault
            EPWM_clearTripZoneFlag(obj->pwmHandle[cnt], HAL_TZFLAG_INTERRUPT_ALL);
        }
    #endif  // !HVMTRPFC_REV1P1
    #endif  // !(MOTOR1_ISBLDC || MOTOR1_DCLINKSS)
    
        // Clear any spurious fault
        EPWM_clearTripZoneFlag(obj->pwmHandle[0], HAL_TZFLAG_INTERRUPT_ALL);
        EPWM_clearTripZoneFlag(obj->pwmHandle[1], HAL_TZFLAG_INTERRUPT_ALL);
        EPWM_clearTripZoneFlag(obj->pwmHandle[2], HAL_TZFLAG_INTERRUPT_ALL);
    
        return;
    } // end of HAL_setupMtrFaults() function
    
    void HAL_setupGPIOs(HAL_Handle handle)
    {
    //------------------------------------------------------------------------------
    #if defined(BSXL8323RS_REVA)
        // GPIO0->EPWM1A->M1_UH*
        GPIO_setPinConfig(GPIO_0_EPWM1A);
        GPIO_setDirectionMode(0, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(0, GPIO_PIN_TYPE_STD);
    
    #if defined(MOTOR1_ISBLDC)
        // GPIO1->M1_UL*
        GPIO_setPinConfig(GPIO_1_GPIO1);
        GPIO_writePin(1, 0);
        GPIO_setDirectionMode(1, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(1, GPIO_PIN_TYPE_STD);
    #else
        // GPIO1->EPWM1B->M1_UL*
        GPIO_setPinConfig(GPIO_1_EPWM1B);
        GPIO_setDirectionMode(1, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(1, GPIO_PIN_TYPE_STD);
    #endif // !MOTOR1_ISBLDC
    
        // GPIO2->EPWM2A->M1_VH*
        GPIO_setPinConfig(GPIO_2_EPWM2A);
        GPIO_setDirectionMode(2, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(2, GPIO_PIN_TYPE_STD);
    
    #if defined(MOTOR1_ISBLDC)
        // GPIO3->M1_VL*
        GPIO_setPinConfig(GPIO_3_GPIO3);
        GPIO_writePin(3, 0);
        GPIO_setDirectionMode(3, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(3, GPIO_PIN_TYPE_STD);
    #else
        // GPIO3->EPWM2B->M1_VL*
        GPIO_setPinConfig(GPIO_3_EPWM2B);
        GPIO_setDirectionMode(3, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(3, GPIO_PIN_TYPE_STD);
    #endif // !MOTOR1_ISBLDC
    
        // GPIO4->EPWM3A->M1_WH*
        GPIO_setPinConfig(GPIO_4_EPWM3A);
        GPIO_setDirectionMode(4, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(4, GPIO_PIN_TYPE_STD);
    
        // GPIO5->Connect to GPIO5 using a jumper wire->M1_DRV_SCS
        GPIO_setPinConfig(GPIO_61_SPISTEA);
        GPIO_setDirectionMode(61, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(61, GPIO_PIN_TYPE_STD);
    
        // GPIO6->EPWM4A->M2_VH*
        GPIO_setPinConfig(GPIO_6_EPWM4A);
        GPIO_setDirectionMode(6, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(6, GPIO_PIN_TYPE_STD);
    
        // GPIO7->EPWM4B->M2_VL*
        GPIO_setPinConfig(GPIO_7_EPWM4B);
        GPIO_setDirectionMode(7, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(7, GPIO_PIN_TYPE_STD);
    
        // GPIO8->Connect to GPIO5 using a jumper wire->M1_DRV_nSCS
    #ifdef DRV_CS_GPIO
        GPIO_setPinConfig(GPIO_8_GPIO8);
        GPIO_writePin(8, 1);
        GPIO_setDirectionMode(8, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(8, GPIO_PIN_TYPE_PULLUP);
    #else
        GPIO_setPinConfig(GPIO_8_GPIO8);
        GPIO_setDirectionMode(8, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(8, GPIO_PIN_TYPE_STD);
    #endif
    
        // GPIO60->M1_DRV_SCLK*
        GPIO_setPinConfig(GPIO_60_SPICLKA);
        GPIO_setDirectionMode(60, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(60, GPIO_PIN_TYPE_PULLUP);
    
        // GPIO58->SPISIMOA->M1_DRV_SDI*
        GPIO_setPinConfig(GPIO_58_SPISIMOA);
        GPIO_setDirectionMode(58, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(58, GPIO_PIN_TYPE_PULLUP);
    
        // GPIO59->SPISOMIA->M1_DRV_SDO*
        GPIO_setPinConfig(GPIO_59_SPISOMIA);
        GPIO_setDirectionMode(59, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(59, GPIO_PIN_TYPE_PULLUP);
    
        // GPIO12->EPWM7A->M2_UH*
        GPIO_setPinConfig(GPIO_157_EPWM7A);
        GPIO_setDirectionMode(157, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(157, GPIO_PIN_TYPE_STD);
    
        // GPIO13->EPWM7B->M2_UL*
        GPIO_setPinConfig(GPIO_158_EPWM7B);
        GPIO_setDirectionMode(158, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(158, GPIO_PIN_TYPE_STD);
    
    #if !defined(ENC_QEP2)
        // GPIO14->HALL_U
        GPIO_setPinConfig(GPIO_14_GPIO14);
        GPIO_setDirectionMode(14, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(14, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(14, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(14, 2);
    #else
        // GPIO14->QEP2_A
        GPIO_setPinConfig(GPIO_14_EQEP2_A);
        GPIO_setDirectionMode(14, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(14, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(14, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(14, 2);
    #endif  // ENC_QEP2
    
    #if defined(MOTOR1_ISBLDC)
        // GPIO15->M1_WL*
        GPIO_setPinConfig(GPIO_15_GPIO15);
        GPIO_writePin(15, 0);
        GPIO_setDirectionMode(15, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(15, GPIO_PIN_TYPE_STD);
    #else
        // GPIO150->EPWM3B->M1_WL*
        GPIO_setPinConfig(GPIO_150_EPWM3B);
        GPIO_setDirectionMode(150, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(150, GPIO_PIN_TYPE_STD);
    #endif // !MOTOR1_ISBLDC
    
    #if !defined(LPD_SITE_J5_J8) && defined(SFRA_ENABLE)
        // GPIO16->SCIA_TX for SFRA
        GPIO_setPinConfig(GPIO_16_SCIA_TX);
        GPIO_setDirectionMode(16, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(16, GPIO_PIN_TYPE_STD);
    
        // GPIO17->SCIA_RX for SFRA
        GPIO_setPinConfig(GPIO_17_SCIA_RX);
        GPIO_setDirectionMode(17, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(17, GPIO_PIN_TYPE_STD);
    #elif defined(LPD_SITE_J5_J8) && defined(SFRA_ENABLE)
    #error SFRA can't be supported in this case
    #else  // !SFRA_ENABLE
        // GPIO16->EPWM5A->M2_WH*
        GPIO_setPinConfig(GPIO_153_EPWM5A);
        GPIO_setDirectionMode(153, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(153, GPIO_PIN_TYPE_STD);
    
        // GPIO17->EPWM5B->M2_WL*
        GPIO_setPinConfig(GPIO_154_EPWM5B);
        GPIO_setDirectionMode(154, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(154, GPIO_PIN_TYPE_STD);
    #endif  // !SFRA_ENABLE
    /* JS
        // GPIO18->Reserve
        GPIO_setPinConfig(GPIO_18_GPIO18_X2);
        GPIO_setDirectionMode(18, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(18, GPIO_PIN_TYPE_STD);
    
        // GPIO19->M1_DRV_LED
        GPIO_setPinConfig(GPIO_19_GPIO19_X1);
        GPIO_writePin(19, 1);
        GPIO_setDirectionMode(19, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(19, GPIO_PIN_TYPE_STD);
    */
        // GPIO22->SPIB_CLK->M2_DRV_SCLK/DAC128S_SDI
        GPIO_setPinConfig(GPIO_65_SPICLKB);
        GPIO_setDirectionMode(65, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(65, GPIO_PIN_TYPE_PULLUP);
    
    #if defined(CMD_CAN_EN) && defined(DAC128S_ENABLE) && defined(DAC128S_SPIB)
        // GPIO23->M2_DRV_VDS
        GPIO_setPinConfig(GPIO_23_SPIB_STE);
        GPIO_writePin(23, 1);
        GPIO_setDirectionMode(23, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(23, GPIO_PIN_TYPE_PULLUP);
    #else   // Command Switch
        // GPIO23->Command Switch Button
        GPIO_setPinConfig(GPIO_23_GPIO23);
        GPIO_setDirectionMode(23, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(23, GPIO_PIN_TYPE_PULLUP);
        GPIO_setQualificationMode(23, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(23, 4);
    #endif  // CMD_CAN_EN & DAC128S_ENABLE & DAC128S_SPIB
    
        // GPIO24->M2_DRV_ENABLE*
        GPIO_setPinConfig(GPIO_24_GPIO24);
        GPIO_writePin(24, 1);
        GPIO_setDirectionMode(24, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(24, GPIO_PIN_TYPE_STD);
    
    #if !defined(ENC_QEP2)
        // GPIO25->HALL_V
        GPIO_setPinConfig(GPIO_25_GPIO25);
        GPIO_setDirectionMode(25, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(25, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(25, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(25, 2);
    #else
        // GPIO25->QEP2_B
        GPIO_setPinConfig(GPIO_25_EQEP2_B);
        GPIO_setDirectionMode(25, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(25, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(25, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(25, 2);
    #endif  // ENC_QEP2
    
    #if !defined(ENC_QEP2)
        // GPIO26->HALL_W
        GPIO_setPinConfig(GPIO_26_GPIO26);
        GPIO_setDirectionMode(26, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(26, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(26, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(26, 4);
    #else
        // GPIO26->QEP2_INDEX
        GPIO_setPinConfig(GPIO_26_EQEP2_INDEX);
        GPIO_setDirectionMode(26, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(26, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(26, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(26, 4);
    #endif  // ENC_QEP2
    
        // GPIO27->M1_DRV_CAL
        GPIO_setPinConfig(GPIO_27_GPIO27);
        GPIO_writePin(27, 0);
        GPIO_setDirectionMode(27, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(27, GPIO_PIN_TYPE_STD);
    
        // GPIO28->M1_DRV_ENABLE
        GPIO_setPinConfig(GPIO_28_GPIO28);
        GPIO_writePin(28, 1);
        GPIO_setDirectionMode(28, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(28, GPIO_PIN_TYPE_STD);
    
        // GPIO29->M1_DRV_ENABLE*
        GPIO_setPinConfig(GPIO_29_GPIO29);
        GPIO_writePin(29, 1);
        GPIO_setDirectionMode(29, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(29, GPIO_PIN_TYPE_STD);
    
        // GPIO30->SPIB_SIMO->DAC128S_SDI*
        GPIO_setPinConfig(GPIO_63_SPISIMOB);
        GPIO_setDirectionMode(63, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(63, GPIO_PIN_TYPE_PULLUP);
    
        // GPIO31->SPIB_SOMI->DAC128S_SDO*
        GPIO_setPinConfig(GPIO_64_SPISOMIB);
        GPIO_setDirectionMode(64, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(64, GPIO_PIN_TYPE_PULLUP);
    
    #if defined(CMD_CAN_EN)
        // GPIO33->CAN_TX
        GPIO_setPinConfig(GPIO_32_CANA_TX);
        GPIO_setDirectionMode(32, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(32, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(32, GPIO_QUAL_ASYNC);
    #else   // !(CMD_CAN_EN)
        // GPIO32->M2_DRV_nSCS/GAIN
        GPIO_setPinConfig(GPIO_32_GPIO32);
        GPIO_setDirectionMode(32, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(32, GPIO_PIN_TYPE_STD);
    #endif  // !(CMD_CAN_EN)
    
    #if defined(CMD_CAN_EN)
        // GPIO33->CAN_RX
        GPIO_setPinConfig(GPIO_33_CANA_RX);
        GPIO_setDirectionMode(33, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(33, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(33, GPIO_QUAL_ASYNC);
    #elif defined(DAC128S_ENABLE) && defined(DAC128S_SPIB)
        // GPIO33->DAC128S_SYNC
        GPIO_setPinConfig(GPIO_66_SPISTEB);
        GPIO_writePin(66, 1);
        GPIO_setDirectionMode(33, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(33, GPIO_PIN_TYPE_PULLUP);
    #else
        // GPIO33->Reserve
        GPIO_setPinConfig(GPIO_33_GPIO33);
        GPIO_setDirectionMode(33, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(33, GPIO_PIN_TYPE_STD);
    #endif  // DAC128S_ENABLE && DAC128S_SPIB
    
        // GPIO34->M1_DRV_nFAULT*
        GPIO_setPinConfig(GPIO_34_GPIO34);
        GPIO_setDirectionMode(34, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(34, GPIO_PIN_TYPE_STD);
    
        // GPIO35
        GPIO_setPinConfig(GPIO_35_GPIO35);
        GPIO_writePin(35, 1);
        GPIO_setDirectionMode(35, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(35, GPIO_PIN_TYPE_STD);
    
    #if !defined(ENC_QEP2)
        // GPIO37->EQEP1_B
        GPIO_setPinConfig(GPIO_11_EQEP1B);
        GPIO_setDirectionMode(11, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(11, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(11, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(11, 2);
    #else
        // GPIO37->HALL_V
        GPIO_setPinConfig(GPIO_37_GPIO37);
        GPIO_setDirectionMode(37, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(37, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(37, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(37, 2);
    #endif  // ENC_QEP2
    
        // GPIO39->Run State
        GPIO_setPinConfig(GPIO_39_GPIO39);
        GPIO_writePin(39, 1);
        GPIO_setDirectionMode(39, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(39, GPIO_PIN_TYPE_STD);
    
        // GPIO40->Freq Capture
        GPIO_setPinConfig(GPIO_40_GPIO40);
        GPIO_setDirectionMode(40, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(40, GPIO_PIN_TYPE_STD);
    
        // GPIO41->M1_DRV_nFAULT
        GPIO_setPinConfig(GPIO_41_GPIO41);
        GPIO_setDirectionMode(41, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(41, GPIO_PIN_TYPE_STD);
    
        // GPIO42->M1_DRV_MODE#
        GPIO_setPinConfig(GPIO_42_GPIO42);
        GPIO_setDirectionMode(42, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(42, GPIO_PIN_TYPE_STD);
    
    #if !defined(ENC_QEP2)
        // GPIO43->EQEP1_INDEX!
        GPIO_setPinConfig(GPIO_24_EQEP2A);
        GPIO_setDirectionMode(24, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(24, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(24, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(24, 2);
    #else
        // GPIO43->HALL_W
        GPIO_setPinConfig(GPIO_43_GPIO43);
        GPIO_setDirectionMode(43, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(43, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(43, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(43, 2);
    #endif  // ENC_QEP2
    
    #if !defined(ENC_QEP2)
        // GPIO44->EQEP1_A
        GPIO_setPinConfig(GPIO_10_EQEP1A);
        GPIO_setDirectionMode(10, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(10, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(10, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(10, 2);
    #else
        // GPIO44->HALL_U
        GPIO_setPinConfig(GPIO_44_GPIO44);
        GPIO_setDirectionMode(44, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(44, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(44, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(44, 2);
    #endif  // ENC_QEP2
    
        // GPIO45->M2_DRV_MODE#, N/A
        GPIO_setPinConfig(GPIO_45_GPIO45);
        GPIO_setDirectionMode(45, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(45, GPIO_PIN_TYPE_STD);
    
        // GPIO46->Reserve
        GPIO_setPinConfig(GPIO_46_GPIO46);
        GPIO_setDirectionMode(46, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(46, GPIO_PIN_TYPE_STD);
        // end of BSXL8323RS_REVA
    
    //------------------------------------------------------------------------------
    #elif defined(BSXL8323RH_REVB)
        // GPIO0->EPWM1A->M1_UH*
        GPIO_setPinConfig(GPIO_0_EPWM1_A);
        GPIO_setDirectionMode(0, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(0, GPIO_PIN_TYPE_STD);
    
        // GPIO1->EPWM1B->M1_UL*
    #if defined(MOTOR1_ISBLDC)
        GPIO_setPinConfig(GPIO_1_GPIO1);
        GPIO_writePin(1, 0);
        GPIO_setDirectionMode(1, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(1, GPIO_PIN_TYPE_STD);
    #else
        GPIO_setPinConfig(GPIO_1_EPWM1_B);
        GPIO_setDirectionMode(1, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(1, GPIO_PIN_TYPE_STD);
    #endif // !MOTOR1_ISBLDC
    
        // GPIO2->EPWM2A->M1_VH*
        GPIO_setPinConfig(GPIO_2_EPWM2_A);
        GPIO_setDirectionMode(2, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(2, GPIO_PIN_TYPE_STD);
    
        // GPIO3->EPWM2B->M1_VL*
    #if defined(MOTOR1_ISBLDC)
        // GPIO3->EPWM2B->M1_VL*
        GPIO_setPinConfig(GPIO_3_GPIO3);
        GPIO_writePin(3, 0);
        GPIO_setDirectionMode(3, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(3, GPIO_PIN_TYPE_STD);
    #else
        // GPIO3->EPWM2B->M1_VL*
        GPIO_setPinConfig(GPIO_3_EPWM2_B);
        GPIO_setDirectionMode(3, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(3, GPIO_PIN_TYPE_STD);
    #endif // !MOTOR1_ISBLDC
    
        // GPIO4->EPWM3A->M1_WH*
        GPIO_setPinConfig(GPIO_4_EPWM3_A);
        GPIO_setDirectionMode(4, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(4, GPIO_PIN_TYPE_STD);
    
    #if defined(DAC128S_ENABLE) && defined(DAC128S_SPIA)
        // GPIO5->DAC128S_SYNC
        GPIO_setPinConfig(GPIO_5_SPIA_STE);
        GPIO_setDirectionMode(5, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(5, GPIO_PIN_TYPE_STD);
    #else
        // GPIO5->Reserve GPIO
        GPIO_setPinConfig(GPIO_5_GPIO5);
        GPIO_setDirectionMode(5, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(5, GPIO_PIN_TYPE_STD);
    #endif  // DAC128S_ENABLE && DAC128S_SPIA
    
        // GPIO6->EPWM4A->M2_VH*
        GPIO_setPinConfig(GPIO_6_EPWM4_A);
        GPIO_setDirectionMode(6, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(6, GPIO_PIN_TYPE_STD);
    
        // GPIO7->EPWM4B->M2_VL*
        GPIO_setPinConfig(GPIO_7_EPWM4_B);
        GPIO_setDirectionMode(7, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(7, GPIO_PIN_TYPE_STD);
    
        // GPIO8->M1_DRV_nSCS/GAIN (has a 47k pull down)
        GPIO_setPinConfig(GPIO_8_GPIO8);
        GPIO_setDirectionMode(8, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(8, GPIO_PIN_TYPE_STD);
    
    #if defined(DAC128S_ENABLE) && defined(DAC128S_SPIA)
        // GPIO09->SPIA_CLK->DAC12S_SCLK
        GPIO_setPinConfig(GPIO_9_SPIA_CLK);
        GPIO_setDirectionMode(9, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(9, GPIO_PIN_TYPE_PULLUP);
    #else
        // GPIO9->Reserve GPIO
        GPIO_setPinConfig(GPIO_9_GPIO9);
        GPIO_setDirectionMode(9, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(9, GPIO_PIN_TYPE_STD);
    #endif  // DAC128S_ENABLE && DAC128S_SPIA
    
    #if defined(DAC128S_ENABLE) && defined(DAC128S_SPIA)
        // GPIO10->SPIA_SOMI->DAC128S_SDO*
        GPIO_setPinConfig(GPIO_10_SPIA_SOMI);
        GPIO_setDirectionMode(10, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(10, GPIO_PIN_TYPE_PULLUP);
    #else
        // GPIO10->Reserve GPIO
        GPIO_setPinConfig(GPIO_10_GPIO10);
        GPIO_setDirectionMode(10, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(10, GPIO_PIN_TYPE_STD);
    #endif  // DAC128S_ENABLE && DAC128S_SPIA
    
    #if defined(DAC128S_ENABLE) && defined(DAC128S_SPIA)
        // GPIO11->SPIA_SIMO->DAC128S_SDI
        GPIO_setPinConfig(GPIO_11_SPIA_SIMO);
        GPIO_setDirectionMode(11, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(11, GPIO_PIN_TYPE_PULLUP);
    #else
        // GPIO11->Reserve GPIO
        GPIO_setPinConfig(GPIO_11_GPIO11);
        GPIO_setDirectionMode(11, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(11, GPIO_PIN_TYPE_STD);
    #endif  // DAC128S_ENABLE && DAC128S_SPIA
    
        // GPIO12->EPWM7A->M2_UH*
        GPIO_setPinConfig(GPIO_12_EPWM7_A);
        GPIO_setDirectionMode(12, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(12, GPIO_PIN_TYPE_STD);
    
        // GPIO13->EPWM7B->M2_UL*
        GPIO_setPinConfig(GPIO_13_EPWM7_B);
        GPIO_setDirectionMode(13, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(13, GPIO_PIN_TYPE_STD);
    
    #if !defined(ENC_QEP2)
        // GPIO14->HALL_U
        GPIO_setPinConfig(GPIO_14_GPIO14);
        GPIO_setDirectionMode(14, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(14, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(14, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(14, 2);
    #else
        // GPIO14->QEP2_A
        GPIO_setPinConfig(GPIO_14_EQEP2_A);
        GPIO_setDirectionMode(14, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(14, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(14, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(14, 2);
    #endif  // ENC_QEP2
    
        // GPIO15->EPWM3B->M1_WL*
    #if defined(MOTOR1_ISBLDC)
        GPIO_setPinConfig(GPIO_15_GPIO15);
        GPIO_writePin(15, 0);
        GPIO_setDirectionMode(15, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(15, GPIO_PIN_TYPE_STD);
    #else
        GPIO_setPinConfig(GPIO_15_EPWM3_B);
        GPIO_setDirectionMode(15, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(15, GPIO_PIN_TYPE_STD);
    #endif // !MOTOR1_ISBLDC
    
    #if !defined(LPD_SITE_J5_J8) && defined(SFRA_ENABLE)
        // GPIO16->SCIA_TX for SFRA
        GPIO_setPinConfig(GPIO_16_SCIA_TX);
        GPIO_setDirectionMode(16, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(16, GPIO_PIN_TYPE_STD);
    
        // GPIO17->SCIA_RX for SFRA
        GPIO_setPinConfig(GPIO_17_SCIA_RX);
        GPIO_setDirectionMode(17, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(17, GPIO_PIN_TYPE_STD);
    #elif defined(LPD_SITE_J5_J8) && defined(SFRA_ENABLE)
    #error SFRA can't be supported in this case
    #else  // !SFRA_ENABLE
        // GPIO16->EPWM5A->M2_WH*
        GPIO_setPinConfig(GPIO_16_EPWM5_A);
        GPIO_setDirectionMode(16, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(16, GPIO_PIN_TYPE_STD);
    
        // GPIO17->EPWM5B->M2_WL*
        GPIO_setPinConfig(GPIO_17_EPWM5_B);
        GPIO_setDirectionMode(17, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(17, GPIO_PIN_TYPE_STD);
    #endif  // !SFRA_ENABLE
    
        // GPIO18->Reserve
        GPIO_setPinConfig(GPIO_18_GPIO18_X2);
        GPIO_setDirectionMode(18, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(18, GPIO_PIN_TYPE_STD);
    
        // GPIO19->M1_DRV_LED
        GPIO_setPinConfig(GPIO_19_GPIO19_X1);
        GPIO_writePin(19, 1);
        GPIO_setDirectionMode(19, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(19, GPIO_PIN_TYPE_STD);
    
    #if defined(DAC128S_ENABLE) && defined(DAC128S_SPIB)
        // GPIO22->SPIB_CLK->DAC128S_SCLK
        GPIO_setPinConfig(GPIO_22_SPIB_CLK);
        GPIO_setDirectionMode(22, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(22, GPIO_PIN_TYPE_PULLUP);
    #else
        // GPIO22->Reserve GPIO
        GPIO_setPinConfig(GPIO_22_GPIO22);
        GPIO_setDirectionMode(22, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(22, GPIO_PIN_TYPE_STD);
    #endif  // DAC128S_ENABLE && DAC128S_SPIB
    
    #if defined(CMD_CAN_EN) && defined(DAC128S_ENABLE) && defined(DAC128S_SPIB)
        // GPIO23->M2_DRV_VDS
        GPIO_setPinConfig(GPIO_23_SPIB_STE);
        GPIO_writePin(23, 1);
        GPIO_setDirectionMode(23, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(23, GPIO_PIN_TYPE_PULLUP);
    #else   // Command Switch
        // GPIO23->M2_DRV_VDS / Command Switch
        GPIO_setPinConfig(GPIO_23_GPIO23);
        GPIO_setDirectionMode(23, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(23, GPIO_PIN_TYPE_PULLUP);
        GPIO_setQualificationMode(23, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(23, 4);
    #endif  // CMD_CAN_EN & DAC128S_ENABLE & DAC128S_SPIB
    
        // GPIO24->M2_DRV_ENABLE*
        GPIO_setPinConfig(GPIO_24_GPIO24);
        GPIO_writePin(24, 1);
        GPIO_setDirectionMode(24, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(24, GPIO_PIN_TYPE_PULLUP);
    
    #if !defined(ENC_QEP2)
        // GPIO25->HALL_V
        GPIO_setPinConfig(GPIO_25_GPIO25);
        GPIO_setDirectionMode(25, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(25, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(25, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(25, 2);
    #else
        // GPIO25->QEP2_B
        GPIO_setPinConfig(GPIO_25_EQEP2_B);
        GPIO_setDirectionMode(25, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(25, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(25, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(25, 2);
    #endif  // ENC_QEP2
    
    #if !defined(ENC_QEP2)
        // GPIO26->HALL_W
        GPIO_setPinConfig(GPIO_26_GPIO26);
        GPIO_setDirectionMode(26, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(26, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(26, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(26, 4);
    #else
        // GPIO26->QEP2_INDEX
        GPIO_setPinConfig(GPIO_26_EQEP2_INDEX);
        GPIO_setDirectionMode(26, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(26, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(26, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(26, 4);
    #endif  // ENC_QEP2
    
        // GPIO27->M1_DRV_CAL
        GPIO_setPinConfig(GPIO_27_GPIO27);
        GPIO_writePin(27, 0);
        GPIO_setDirectionMode(27, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(27, GPIO_PIN_TYPE_STD);
    
        // GPIO28->HAL_GPIO_ISR_M1
        GPIO_setPinConfig(GPIO_28_GPIO28);
        GPIO_writePin(28, 1);
        GPIO_setDirectionMode(28, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(28, GPIO_PIN_TYPE_PULLUP);
    
        // GPIO29->M1_DRV_ENABLE*
        GPIO_setPinConfig(GPIO_29_GPIO29);
        GPIO_writePin(29, 1);
        GPIO_setDirectionMode(29, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(29, GPIO_PIN_TYPE_PULLUP);
    
    #if defined(DAC128S_ENABLE) && defined(DAC128S_SPIB)
        // GPIO30->SPIB_SIMO->DAC128S_SDI*
        GPIO_setPinConfig(GPIO_30_SPIB_SIMO);
        GPIO_setDirectionMode(30, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(30, GPIO_PIN_TYPE_PULLUP);
    #else
        // GPIO30->
        GPIO_setPinConfig(GPIO_30_GPIO30);
        GPIO_setDirectionMode(30, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(30, GPIO_PIN_TYPE_STD);
    #endif  // DAC128S_ENABLE && DAC128S_SPIB
    
    #if defined(DAC128S_ENABLE) && defined(DAC128S_SPIB)
        // GPIO31->SPIB_SOMI->DAC128S_SDO*
        GPIO_setPinConfig(GPIO_31_SPIB_SOMI);
        GPIO_setDirectionMode(31, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(31, GPIO_PIN_TYPE_PULLUP);
    #else
        // GPIO33->Reserve
        GPIO_setPinConfig(GPIO_31_GPIO31);
        GPIO_setDirectionMode(31, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(31, GPIO_PIN_TYPE_STD);
    #endif  // DAC128S_ENABLE && DAC128S_SPIB
    
    #if defined(CMD_CAN_EN)
        // GPIO33->CAN_TX
        GPIO_setPinConfig(GPIO_32_CANA_TX);
        GPIO_setDirectionMode(32, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(32, GPIO_PIN_TYPE_STD);
    #else   // !(CMD_CAN_EN)
        // GPIO32->M2_DRV_nSCS/GAIN
        GPIO_setPinConfig(GPIO_32_GPIO32);
        GPIO_setDirectionMode(32, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(32, GPIO_PIN_TYPE_STD);
    #endif  // !(CMD_CAN_EN)
    
    #if defined(CMD_CAN_EN)
        // GPIO33->CAN_RX
        GPIO_setPinConfig(GPIO_33_CANA_RX);
        GPIO_setDirectionMode(33, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(33, GPIO_PIN_TYPE_STD);
    #elif defined(DAC128S_ENABLE) && defined(DAC128S_SPIB)
        // GPIO33->DAC128S_SYNC
        GPIO_setPinConfig(GPIO_33_SPIB_STE);
        GPIO_writePin(33, 1);
        GPIO_setDirectionMode(33, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(33, GPIO_PIN_TYPE_PULLUP);
    #else
        // GPIO33->Reserve
        GPIO_setPinConfig(GPIO_33_GPIO33);
        GPIO_setDirectionMode(33, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(33, GPIO_PIN_TYPE_STD);
    #endif  // DAC128S_ENABLE && DAC128S_SPIB
    
        // GPIO34->M1_DRV_nFAULT*
        GPIO_setPinConfig(GPIO_34_GPIO34);
        GPIO_setDirectionMode(34, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(34, GPIO_PIN_TYPE_STD);
    
        // GPIO35
        GPIO_setPinConfig(GPIO_35_GPIO35);
        GPIO_setDirectionMode(35, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(35, GPIO_PIN_TYPE_STD);
    
    #if !defined(ENC_QEP2)
        // GPIO37->EQEP1_B
        GPIO_setPinConfig(GPIO_37_EQEP1_B);
        GPIO_setDirectionMode(37, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(37, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(37, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(37, 2);
    #else
        // GPIO37->HALL_V
        GPIO_setPinConfig(GPIO_37_GPIO37);
        GPIO_setDirectionMode(37, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(37, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(37, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(37, 2);
    #endif  // ENC_QEP2
    
        // GPIO39->HAL_GPIO_ISR_M1
        GPIO_setPinConfig(GPIO_39_GPIO39);
        GPIO_setDirectionMode(39, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(39, GPIO_PIN_TYPE_STD);
    
        // GPIO40->CMD_FREQ_CAP
        GPIO_setPinConfig(GPIO_40_GPIO40);
        GPIO_setDirectionMode(40, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(40, GPIO_PIN_TYPE_STD);
    
        // GPIO41->M1_DRV_nFAULT
        GPIO_setPinConfig(GPIO_41_GPIO41);
        GPIO_setDirectionMode(41, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(41, GPIO_PIN_TYPE_STD);
    
        // GPIO42->M1_DRV_MODE->6-PWM-Mode (GND)
        GPIO_setPinConfig(GPIO_42_GPIO42);
        GPIO_writePin(42, 0);
        GPIO_setDirectionMode(42, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(42, GPIO_PIN_TYPE_STD);
    
    #if !defined(ENC_QEP2)
        // GPIO43->EQEP1_INDEX!
        GPIO_setPinConfig(GPIO_43_EQEP1_INDEX);
        GPIO_setDirectionMode(43, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(43, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(43, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(43, 2);
    #else
        // GPIO43->HALL_W
        GPIO_setPinConfig(GPIO_43_GPIO43);
        GPIO_setDirectionMode(43, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(43, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(43, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(43, 2);
    #endif  // ENC_QEP2
    
    #if !defined(ENC_QEP2)
        // GPIO44->EQEP1_A
        GPIO_setPinConfig(GPIO_44_EQEP1_A);
        GPIO_setDirectionMode(44, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(44, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(44, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(44, 2);
    #else
        // GPIO44->HALL_U
        GPIO_setPinConfig(GPIO_44_GPIO44);
        GPIO_setDirectionMode(44, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(44, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(44, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(44, 2);
    #endif  // ENC_QEP2
    
        // GPIO45->M2_DRV_MODE->6-PWM-Mode (GND)
        GPIO_setPinConfig(GPIO_45_GPIO45);
        GPIO_writePin(45, 0);
        GPIO_setDirectionMode(45, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(45, GPIO_PIN_TYPE_STD);
    
        // GPIO46->M2_DRV_CAL->Low
        GPIO_setPinConfig(GPIO_46_GPIO46);
        GPIO_writePin(46, 0);
        GPIO_setDirectionMode(46, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(46, GPIO_PIN_TYPE_STD);
        // end ofBSXL8323RH_REVB
    
    //------------------------------------------------------------------------------
    #elif defined(BSXL8353RS_REVA)
        // GPIO0->EPWM1A->M1_UH*
        GPIO_setPinConfig(GPIO_0_EPWM1_A);
        GPIO_setDirectionMode(0, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(0, GPIO_PIN_TYPE_STD);
    
        // GPIO1->EPWM1B->M1_UL*
    #if defined(MOTOR1_ISBLDC)
        GPIO_setPinConfig(GPIO_1_GPIO1);
        GPIO_writePin(1, 0);
        GPIO_setDirectionMode(1, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(1, GPIO_PIN_TYPE_STD);
    #else
        GPIO_setPinConfig(GPIO_1_EPWM1_B);
        GPIO_setDirectionMode(1, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(1, GPIO_PIN_TYPE_STD);
    #endif // !MOTOR1_ISBLDC
    
        // GPIO2->EPWM2A->M1_VH*
        GPIO_setPinConfig(GPIO_2_EPWM2_A);
        GPIO_setDirectionMode(2, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(2, GPIO_PIN_TYPE_STD);
    
    #if defined(MOTOR1_ISBLDC)
        // GPIO3->EPWM2B->M1_VL*
        GPIO_setPinConfig(GPIO_3_GPIO3);
        GPIO_writePin(3, 0);
        GPIO_setDirectionMode(3, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(3, GPIO_PIN_TYPE_STD);
    #else
        // GPIO3->EPWM2B->M1_VL*
        GPIO_setPinConfig(GPIO_3_EPWM2_B);
        GPIO_setDirectionMode(3, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(3, GPIO_PIN_TYPE_STD);
    #endif // !MOTOR1_ISBLDC
    
        // GPIO4->EPWM3A->M1_WH*
        GPIO_setPinConfig(GPIO_4_EPWM3_A);
        GPIO_setDirectionMode(4, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(4, GPIO_PIN_TYPE_STD);
    
        // GPIO5->M1_DRV_SCS (Use a wire->J2-18)
        GPIO_setPinConfig(GPIO_5_SPIA_STE);
        GPIO_setDirectionMode(5, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(5, GPIO_PIN_TYPE_STD);
    
        // GPIO6->EPWM4A->M2_VH*
        GPIO_setPinConfig(GPIO_6_EPWM4_A);
        GPIO_setDirectionMode(6, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(6, GPIO_PIN_TYPE_STD);
    
        // GPIO7->EPWM4B->M2_VL*
        GPIO_setPinConfig(GPIO_7_EPWM4_B);
        GPIO_setDirectionMode(7, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(7, GPIO_PIN_TYPE_STD);
    
        // GPIO8->M1_DRV_nSCS
    #ifdef DRV_CS_GPIO
        GPIO_setPinConfig(GPIO_8_GPIO8);
        GPIO_writePin(8, 1);
        GPIO_setDirectionMode(8, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(8, GPIO_PIN_TYPE_PULLUP);
    #else   // M1_DRV_SCS (Use a wire->J2-18)
        GPIO_setPinConfig(GPIO_8_GPIO8);
        GPIO_setDirectionMode(8, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(8, GPIO_PIN_TYPE_STD);
    #endif
    
        // GPIO09->M1_DRV_SCLK*
        GPIO_setPinConfig(GPIO_9_SPIA_CLK);
        GPIO_setDirectionMode(9, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(9, GPIO_PIN_TYPE_PULLUP);
    
        // GPIO10->SPIA_SOMI->M1_DRV_SDO*
        GPIO_setPinConfig(GPIO_10_SPIA_SOMI);
        GPIO_setDirectionMode(10, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(10, GPIO_PIN_TYPE_PULLUP);
    
        // GPIO11->SPIA_SIMO->M1_DRV_SDI*
        GPIO_setPinConfig(GPIO_11_SPIA_SIMO);
        GPIO_setDirectionMode(11, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(11, GPIO_PIN_TYPE_PULLUP);
    
        // GPIO12->EPWM7A->M2_UH*
        GPIO_setPinConfig(GPIO_12_EPWM7_A);
        GPIO_setDirectionMode(12, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(12, GPIO_PIN_TYPE_STD);
    
        // GPIO13->EPWM7B->M2_UL*
        GPIO_setPinConfig(GPIO_13_EPWM7_B);
        GPIO_setDirectionMode(13, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(13, GPIO_PIN_TYPE_STD);
    
    #if !defined(ENC_QEP2)
        // GPIO14->HALL_U
        GPIO_setPinConfig(GPIO_14_GPIO14);
        GPIO_setDirectionMode(14, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(14, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(14, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(14, 2);
    #else
        // GPIO14->QEP2_A
        GPIO_setPinConfig(GPIO_14_EQEP2_A);
        GPIO_setDirectionMode(14, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(14, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(14, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(14, 2);
    #endif  // ENC_QEP2
    
        // GPIO15->EPWM3B->M1_WL*
    #if defined(MOTOR1_ISBLDC)
        GPIO_setPinConfig(GPIO_15_GPIO15);
        GPIO_writePin(15, 0);
        GPIO_setDirectionMode(15, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(15, GPIO_PIN_TYPE_STD);
    #else
        GPIO_setPinConfig(GPIO_15_EPWM3_B);
        GPIO_setDirectionMode(15, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(15, GPIO_PIN_TYPE_STD);
    #endif // !MOTOR1_ISBLDC
    
    #if !defined(LPD_SITE_J5_J8) && defined(SFRA_ENABLE)
        // GPIO16->SCIA_TX for SFRA
        GPIO_setPinConfig(GPIO_16_SCIA_TX);
        GPIO_setDirectionMode(16, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(16, GPIO_PIN_TYPE_STD);
    
        // GPIO17->SCIA_RX for SFRA
        GPIO_setPinConfig(GPIO_17_SCIA_RX);
        GPIO_setDirectionMode(17, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(17, GPIO_PIN_TYPE_STD);
    #elif defined(LPD_SITE_J5_J8) && defined(SFRA_ENABLE)
    #error SFRA can't be supported in this case
    #else  // !SFRA_ENABLE
        // GPIO16->EPWM5A->M2_WH*
        GPIO_setPinConfig(GPIO_16_EPWM5_A);
        GPIO_setDirectionMode(16, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(16, GPIO_PIN_TYPE_STD);
    
        // GPIO17->EPWM5B->M2_WL*
        GPIO_setPinConfig(GPIO_17_EPWM5_B);
        GPIO_setDirectionMode(17, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(17, GPIO_PIN_TYPE_STD);
    #endif  // !SFRA_ENABLE
    
        // GPIO18->Reserve
        GPIO_setPinConfig(GPIO_18_GPIO18_X2);
        GPIO_setDirectionMode(18, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(18, GPIO_PIN_TYPE_STD);
    
        // GPIO19->M1_DRV_LED
        GPIO_setPinConfig(GPIO_19_GPIO19_X1);
        GPIO_writePin(19, 1);
        GPIO_setDirectionMode(19, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(19, GPIO_PIN_TYPE_STD);
    
        // GPIO22->SPIB_CLK->M2_DRV_SCLK
        GPIO_setPinConfig(GPIO_22_SPIB_CLK);
        GPIO_setDirectionMode(22, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(22, GPIO_PIN_TYPE_PULLUP);
    
    #if defined(CMD_CAN_EN) && defined(DAC128S_ENABLE) && defined(DAC128S_SPIB)
        // GPIO23->M2_DRV_VDS
        GPIO_setPinConfig(GPIO_23_SPIB_STE);
        GPIO_writePin(23, 1);
        GPIO_setDirectionMode(23, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(23, GPIO_PIN_TYPE_PULLUP);
    #else   // Command Switch
        // GPIO23->M2_DRV_VDS / Command Switch
        GPIO_setPinConfig(GPIO_23_GPIO23);
        GPIO_setDirectionMode(23, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(23, GPIO_PIN_TYPE_PULLUP);
        GPIO_setQualificationMode(23, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(23, 4);
    #endif  // CMD_CAN_EN & DAC128S_ENABLE & DAC128S_SPIB
    
        // GPIO24->M2_DRV_ENABLE*
        GPIO_setPinConfig(GPIO_24_GPIO24);
        GPIO_writePin(24, 1);
        GPIO_setDirectionMode(24, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(24, GPIO_PIN_TYPE_STD);
    
    #if !defined(ENC_QEP2)
        // GPIO25->HALL_V
        GPIO_setPinConfig(GPIO_25_GPIO25);
        GPIO_setDirectionMode(25, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(25, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(25, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(25, 2);
    #else
        // GPIO25->QEP2_B
        GPIO_setPinConfig(GPIO_25_EQEP2_B);
        GPIO_setDirectionMode(25, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(25, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(25, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(25, 2);
    #endif  // ENC_QEP2
    
    #if !defined(ENC_QEP2)
        // GPIO26->HALL_W
        GPIO_setPinConfig(GPIO_26_GPIO26);
        GPIO_setDirectionMode(26, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(26, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(26, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(26, 4);
    #else
        // GPIO26->QEP2_INDEX
        GPIO_setPinConfig(GPIO_26_EQEP2_INDEX);
        GPIO_setDirectionMode(26, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(26, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(26, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(26, 4);
    #endif  // ENC_QEP2
    
        // GPIO27->M1_DRV_CAL
        GPIO_setPinConfig(GPIO_27_GPIO27);
        GPIO_writePin(27, 0);
        GPIO_setDirectionMode(27, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(27, GPIO_PIN_TYPE_STD);
    
        // GPIO28->M1_DRV_ENABLE
        GPIO_setPinConfig(GPIO_28_GPIO28);
        GPIO_writePin(28, 1);
        GPIO_setDirectionMode(28, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(28, GPIO_PIN_TYPE_STD);
    
        // GPIO29->M1_DRV_ENABLE*
        GPIO_setPinConfig(GPIO_29_GPIO29);
        GPIO_writePin(29, 1);
        GPIO_setDirectionMode(29, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(29, GPIO_PIN_TYPE_STD);
    
        // GPIO30->SPIB_SIMO->M2_DRV_SDI*
        GPIO_setPinConfig(GPIO_30_SPIB_SIMO);
        GPIO_setDirectionMode(30, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(30, GPIO_PIN_TYPE_PULLUP);
    
        // GPIO31->SPIB_SOMI->M2_DRV_SDO*
        GPIO_setPinConfig(GPIO_31_SPIB_SOMI);
        GPIO_setDirectionMode(31, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(31, GPIO_PIN_TYPE_PULLUP);
    
        // GPIO32->M2_DRV_nSCS*
        GPIO_setPinConfig(GPIO_32_GPIO32);
        GPIO_writePin(32, 1);
        GPIO_setDirectionMode(32, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(32, GPIO_PIN_TYPE_PULLUP);
    
    #if defined(DAC128S_ENABLE)
        // GPIO33->DAC128S_SYNC
        GPIO_setPinConfig(GPIO_33_SPIB_STE);
        GPIO_writePin(33, 1);
        GPIO_setDirectionMode(33, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(33, GPIO_PIN_TYPE_PULLUP);
    #else
        // GPIO33->Reserve
        GPIO_setPinConfig(GPIO_33_GPIO33);
        GPIO_setDirectionMode(33, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(33, GPIO_PIN_TYPE_STD);
    #endif
    
        // GPIO34->M1_DRV_nFAULT*
        GPIO_setPinConfig(GPIO_34_GPIO34);
        GPIO_setDirectionMode(34, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(34, GPIO_PIN_TYPE_STD);
    
        // GPIO35
        GPIO_setPinConfig(GPIO_35_GPIO35);
        GPIO_setDirectionMode(35, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(35, GPIO_PIN_TYPE_STD);
    
    #if !defined(ENC_QEP2)
        // GPIO37->EQEP1_B
        GPIO_setPinConfig(GPIO_37_EQEP1_B);
        GPIO_setDirectionMode(37, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(37, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(37, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(37, 2);
    #else
        // GPIO37->HALL_V
        GPIO_setPinConfig(GPIO_37_GPIO37);
        GPIO_setDirectionMode(37, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(37, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(37, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(37, 2);
    #endif  // ENC_QEP2
    
        // GPIO39->nFault
        GPIO_setPinConfig(GPIO_39_GPIO39);
        GPIO_setDirectionMode(39, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(39, GPIO_PIN_TYPE_STD);
    
        // GPIO40->CMD_FREQ_CAP
        GPIO_setPinConfig(GPIO_40_GPIO40);
        GPIO_setDirectionMode(40, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(40, GPIO_PIN_TYPE_STD);
    
        // GPIO41->M1_DRV_nFAULT
        GPIO_setPinConfig(GPIO_41_GPIO41);
        GPIO_setDirectionMode(41, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(41, GPIO_PIN_TYPE_STD);
    
        // GPIO42->M1_DRV_MODE#
        GPIO_setPinConfig(GPIO_42_GPIO42);
        GPIO_setDirectionMode(42, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(42, GPIO_PIN_TYPE_STD);
    
    #if !defined(ENC_QEP2)
        // GPIO43->EQEP1_INDEX!
        GPIO_setPinConfig(GPIO_43_EQEP1_INDEX);
        GPIO_setDirectionMode(43, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(43, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(43, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(43, 2);
    #else
        // GPIO43->HALL_W
        GPIO_setPinConfig(GPIO_43_GPIO43);
        GPIO_setDirectionMode(43, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(43, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(43, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(43, 2);
    #endif  // ENC_QEP2
    
    #if !defined(ENC_QEP2)
        // GPIO44->EQEP1_A
        GPIO_setPinConfig(GPIO_44_EQEP1_A);
        GPIO_setDirectionMode(44, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(44, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(44, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(44, 2);
    #else
        // GPIO44->HALL_U
        GPIO_setPinConfig(GPIO_44_GPIO44);
        GPIO_setDirectionMode(44, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(44, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(44, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(44, 2);
    #endif  // ENC_QEP2
    
        // GPIO45->M2_DRV_MODE#, N/A
        GPIO_setPinConfig(GPIO_45_GPIO45);
        GPIO_setDirectionMode(45, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(45, GPIO_PIN_TYPE_STD);
    
        // GPIO46->Reserve
        GPIO_setPinConfig(GPIO_46_GPIO46);
        GPIO_setDirectionMode(46, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(46, GPIO_PIN_TYPE_STD);
        // end of BSXL8353RS_REVA
    //-----------------------------------------------------------------------------
    #elif defined(BSXL8316RT_REVA)
        // GPIO0->EPWM1A->M1_UH*
        GPIO_setPinConfig(GPIO_0_EPWM1_A);
        GPIO_setDirectionMode(0, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(0, GPIO_PIN_TYPE_STD);
    
        // GPIO1->EPWM1B->M1_UL*
        GPIO_setPinConfig(GPIO_1_EPWM1_B);
        GPIO_setDirectionMode(1, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(1, GPIO_PIN_TYPE_STD);
    
        // GPIO2->EPWM2A->M1_VH*
        GPIO_setPinConfig(GPIO_2_EPWM2_A);
        GPIO_setDirectionMode(2, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(2, GPIO_PIN_TYPE_STD);
    
        // GPIO3->EPWM2B->M1_VL*
        GPIO_setPinConfig(GPIO_3_EPWM2_B);
        GPIO_setDirectionMode(3, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(3, GPIO_PIN_TYPE_STD);
    
        // GPIO4->EPWM3A->M1_WH*
        GPIO_setPinConfig(GPIO_4_EPWM3_A);
        GPIO_setDirectionMode(4, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(4, GPIO_PIN_TYPE_STD);
    
        // GPIO5->M1_DRV_SCS (Use a wire->J2-18)
        GPIO_setPinConfig(GPIO_5_SPIA_STE);
        GPIO_setDirectionMode(5, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(5, GPIO_PIN_TYPE_PULLUP);
    
        // GPIO6->EPWM4A->M2_VH*
        GPIO_setPinConfig(GPIO_6_EPWM4_A);
        GPIO_setDirectionMode(6, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(6, GPIO_PIN_TYPE_STD);
    
        // GPIO7->EPWM4B->M2_VL*
        GPIO_setPinConfig(GPIO_7_EPWM4_B);
        GPIO_setDirectionMode(7, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(7, GPIO_PIN_TYPE_STD);
    
        // GPIO8->M1_DRV_nSCS
        GPIO_setPinConfig(GPIO_8_GPIO8);
        GPIO_setDirectionMode(8, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(8, GPIO_PIN_TYPE_STD);
    
        // GPIO09->M1_DRV_SCLK*
        GPIO_setPinConfig(GPIO_9_SPIA_CLK);
        GPIO_setDirectionMode(9, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(9, GPIO_PIN_TYPE_PULLUP);
    
        // GPIO10->SPIA_SOMI->M1_DRV_SDO*
        GPIO_setPinConfig(GPIO_10_SPIA_SOMI);
        GPIO_setDirectionMode(10, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(10, GPIO_PIN_TYPE_PULLUP);
    
        // GPIO11->SPIA_SIMO->M1_DRV_SDI*
        GPIO_setPinConfig(GPIO_11_SPIA_SIMO);
        GPIO_setDirectionMode(11, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(11, GPIO_PIN_TYPE_PULLUP);
    
        // GPIO12->EPWM7A->M2_UH*
        GPIO_setPinConfig(GPIO_12_EPWM7_A);
        GPIO_setDirectionMode(12, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(12, GPIO_PIN_TYPE_STD);
    
        // GPIO13->EPWM7B->M2_UL*
        GPIO_setPinConfig(GPIO_13_EPWM7_B);
        GPIO_setDirectionMode(13, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(13, GPIO_PIN_TYPE_STD);
    
    #if !defined(ENC_QEP2)
        // GPIO14->HALL_U
        GPIO_setPinConfig(GPIO_14_GPIO14);
        GPIO_setDirectionMode(14, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(14, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(14, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(14, 2);
    #else
        // GPIO14->QEP2_A
        GPIO_setPinConfig(GPIO_14_EQEP2_A);
        GPIO_setDirectionMode(14, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(14, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(14, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(14, 2);
    #endif  // ENC_QEP2
    
    #if !defined(LPD_SITE_J5_J8) && defined(SFRA_ENABLE)
        // GPIO16->SCIA_TX for SFRA
        GPIO_setPinConfig(GPIO_16_SCIA_TX);
        GPIO_setDirectionMode(16, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(16, GPIO_PIN_TYPE_STD);
    
        // GPIO17->SCIA_RX for SFRA
        GPIO_setPinConfig(GPIO_17_SCIA_RX);
        GPIO_setDirectionMode(17, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(17, GPIO_PIN_TYPE_STD);
    #elif defined(LPD_SITE_J5_J8) && defined(SFRA_ENABLE)
    #error SFRA can't be supported in this case
    #else  // !SFRA_ENABLE
        // GPIO15->EPWM3B->M1_WL*
        GPIO_setPinConfig(GPIO_15_EPWM3_B);
        GPIO_setDirectionMode(15, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(15, GPIO_PIN_TYPE_STD);
    
        // GPIO16->EPWM5A->M2_WH*
        GPIO_setPinConfig(GPIO_16_EPWM5_A);
        GPIO_setDirectionMode(16, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(16, GPIO_PIN_TYPE_STD);
    
        // GPIO17->EPWM5B->M2_WL*
        GPIO_setPinConfig(GPIO_17_EPWM5_B);
        GPIO_setDirectionMode(17, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(17, GPIO_PIN_TYPE_STD);
    #endif  // !SFRA_ENABLE
    
        // GPIO18->Reserve
        GPIO_setPinConfig(GPIO_18_GPIO18_X2);
        GPIO_setDirectionMode(18, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(18, GPIO_PIN_TYPE_STD);
    
        // GPIO19->Reserve
        GPIO_setPinConfig(GPIO_19_GPIO19_X1);
        GPIO_setDirectionMode(19, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(19, GPIO_PIN_TYPE_STD);
    
        // GPIO22->SPIB_CLK->M2_DRV_SCLK/DAC128S_SDI
        GPIO_setPinConfig(GPIO_22_SPIB_CLK);
        GPIO_setDirectionMode(22, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(22, GPIO_PIN_TYPE_PULLUP);
    
        // GPIO23->M1_DRV_OFF, 1- Disable, 0-Enable
        GPIO_setPinConfig(GPIO_23_GPIO23);
        GPIO_writePin(23, 0);
        GPIO_setDirectionMode(23, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(23, GPIO_PIN_TYPE_STD);
    
        // GPIO24->M2_DRV_ENABLE*
        GPIO_setPinConfig(GPIO_24_GPIO24);
        GPIO_writePin(24, 1);
        GPIO_setDirectionMode(24, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(24, GPIO_PIN_TYPE_STD);
    
    #if !defined(ENC_QEP2)
        // GPIO25->HALL_V
        GPIO_setPinConfig(GPIO_25_GPIO25);
        GPIO_setDirectionMode(25, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(25, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(25, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(25, 2);
    #else
        // GPIO25->QEP2_B
        GPIO_setPinConfig(GPIO_25_EQEP2_B);
        GPIO_setDirectionMode(25, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(25, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(25, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(25, 2);
    #endif  // ENC_QEP2
    
    #if !defined(ENC_QEP2)
        // GPIO26->HALL_W
        GPIO_setPinConfig(GPIO_26_GPIO26);
        GPIO_setDirectionMode(26, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(26, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(26, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(26, 4);
    #else
        // GPIO26->QEP2_INDEX
        GPIO_setPinConfig(GPIO_26_EQEP2_INDEX);
        GPIO_setDirectionMode(26, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(26, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(26, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(26, 4);
    #endif  // ENC_QEP2
    
        // GPIO27->M1_LED
        GPIO_setPinConfig(GPIO_27_GPIO27);
        GPIO_writePin(27, 0);
        GPIO_setDirectionMode(27, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(27, GPIO_PIN_TYPE_STD);
    
        // GPIO28->M1_DRV_ENABLE
        GPIO_setPinConfig(GPIO_28_GPIO28);
        GPIO_writePin(28, 1);
        GPIO_setDirectionMode(28, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(28, GPIO_PIN_TYPE_STD);
    
        // GPIO29->M1_nSLEEP, 1-Active, 0-Low Power Sleep Mode
        GPIO_setPinConfig(GPIO_29_GPIO29);
        GPIO_writePin(29, 1);
        GPIO_setDirectionMode(29, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(29, GPIO_PIN_TYPE_STD);
    
        // GPIO30->SPIB_SIMO->M2_DRV_SDI*/DAC128S_SDI
        GPIO_setPinConfig(GPIO_30_SPIB_SIMO);
        GPIO_setDirectionMode(30, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(30, GPIO_PIN_TYPE_PULLUP);
    
        // GPIO31->SPIB_SOMI->M2_DRV_SDO*/DAC128S_SDI
        GPIO_setPinConfig(GPIO_31_SPIB_SOMI);
        GPIO_setDirectionMode(31, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(31, GPIO_PIN_TYPE_PULLUP);
    
        // GPIO32->M2_DRV_nSCS*
        GPIO_setPinConfig(GPIO_32_GPIO32);
        GPIO_writePin(32, 1);
        GPIO_setDirectionMode(32, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(32, GPIO_PIN_TYPE_PULLUP);
    
    #if defined(DAC128S_ENABLE)
        // GPIO33->DAC128S_SYNC
        GPIO_setPinConfig(GPIO_33_SPIB_STE);
        GPIO_writePin(33, 1);
        GPIO_setDirectionMode(33, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(33, GPIO_PIN_TYPE_PULLUP);
    #else
        // GPIO33->Reserve
        GPIO_setPinConfig(GPIO_33_GPIO33);
        GPIO_setDirectionMode(33, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(33, GPIO_PIN_TYPE_STD);
    #endif
    
        // GPIO34->M1_DRV_nFAULT*
        GPIO_setPinConfig(GPIO_34_GPIO34);
        GPIO_setDirectionMode(34, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(34, GPIO_PIN_TYPE_STD);
    
        // GPIO35
        GPIO_setPinConfig(GPIO_35_GPIO35);
        GPIO_setDirectionMode(35, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(35, GPIO_PIN_TYPE_STD);
    
    #if !defined(ENC_QEP2)
        // GPIO37->EQEP1_B
        GPIO_setPinConfig(GPIO_37_EQEP1_B);
        GPIO_setDirectionMode(37, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(37, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(37, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(37, 2);
    #else
        // GPIO37->HALL_V
        GPIO_setPinConfig(GPIO_37_GPIO37);
        GPIO_setDirectionMode(37, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(37, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(37, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(37, 2);
    #endif  // ENC_QEP2
    
        // GPIO39->M2_DRV_nFault
        GPIO_setPinConfig(GPIO_39_GPIO39);
        GPIO_setDirectionMode(39, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(39, GPIO_PIN_TYPE_STD);
    
        // GPIO40->Reserve
        GPIO_setPinConfig(GPIO_40_GPIO40);
        GPIO_setDirectionMode(40, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(40, GPIO_PIN_TYPE_STD);
    
        // GPIO41->M1_DRV_nFAULT
        GPIO_setPinConfig(GPIO_41_GPIO41);
        GPIO_setDirectionMode(41, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(41, GPIO_PIN_TYPE_STD);
    
        // GPIO42->M1_DRV_MODE#
        GPIO_setPinConfig(GPIO_42_GPIO42);
        GPIO_setDirectionMode(42, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(42, GPIO_PIN_TYPE_STD);
    
    #if !defined(ENC_QEP2)
        // GPIO43->EQEP1_INDEX!
        GPIO_setPinConfig(GPIO_43_EQEP1_INDEX);
        GPIO_setDirectionMode(43, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(43, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(43, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(43, 2);
    #else
        // GPIO43->HALL_W
        GPIO_setPinConfig(GPIO_43_GPIO43);
        GPIO_setDirectionMode(43, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(43, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(43, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(43, 2);
    #endif  // ENC_QEP2
    
    #if !defined(ENC_QEP2)
        // GPIO44->EQEP1_A
        GPIO_setPinConfig(GPIO_44_EQEP1_A);
        GPIO_setDirectionMode(44, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(44, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(44, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(44, 2);
    #else
        // GPIO44->HALL_U
        GPIO_setPinConfig(GPIO_44_GPIO44);
        GPIO_setDirectionMode(44, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(44, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(44, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(44, 2);
    #endif  // ENC_QEP2
    
        // GPIO45->M2_DRV_MODE#, N/A
        GPIO_setPinConfig(GPIO_45_GPIO45);
        GPIO_setDirectionMode(45, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(45, GPIO_PIN_TYPE_STD);
    
        // GPIO46->Reserve
        GPIO_setPinConfig(GPIO_46_GPIO46);
        GPIO_setDirectionMode(46, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(46, GPIO_PIN_TYPE_STD);
        // end of BSXL8316RT_REVA
    //------------------------------------------------------------------------------
    #elif defined(BSXL3PHGAN_REVA)
        // GPIO0->EPWM1A->M1_UH*
        GPIO_setPinConfig(GPIO_0_EPWM1_A);
        GPIO_setDirectionMode(0, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(0, GPIO_PIN_TYPE_STD);
    
        // GPIO1->EPWM1B->M1_UL*
        GPIO_setPinConfig(GPIO_1_EPWM1_B);
        GPIO_setDirectionMode(1, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(1, GPIO_PIN_TYPE_STD);
    
        // GPIO2->EPWM2A->M1_VH*
        GPIO_setPinConfig(GPIO_2_EPWM2_A);
        GPIO_setDirectionMode(2, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(2, GPIO_PIN_TYPE_STD);
    
        // GPIO3->EPWM2B->M1_VL*
        GPIO_setPinConfig(GPIO_3_EPWM2_B);
        GPIO_setDirectionMode(3, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(3, GPIO_PIN_TYPE_STD);
    
        // GPIO4->EPWM3A->M1_WH*
        GPIO_setPinConfig(GPIO_4_EPWM3_A);
        GPIO_setDirectionMode(4, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(4, GPIO_PIN_TYPE_STD);
    
    #if defined(DAC128S_ENABLE) && defined(DAC128S_SPIA)
        // GPIO5->SPIA_STE
        GPIO_setPinConfig(GPIO_5_SPIA_STE);
        GPIO_setDirectionMode(5, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(5, GPIO_PIN_TYPE_PULLUP);
    #else
        // GPIO5->
        GPIO_setPinConfig(GPIO_5_GPIO5);
        GPIO_setDirectionMode(5, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(5, GPIO_PIN_TYPE_STD);
    #endif  // DAC128S_ENABLE && DAC128S_SPIA
    
        // GPIO6->EPWM4A->M2_VH*
        GPIO_setPinConfig(GPIO_6_EPWM4_A);
        GPIO_setDirectionMode(6, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(6, GPIO_PIN_TYPE_STD);
    
        // GPIO7->EPWM4B->M2_VL*
        GPIO_setPinConfig(GPIO_7_EPWM4_B);
        GPIO_setDirectionMode(7, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(7, GPIO_PIN_TYPE_STD);
    
        // GPIO8->Reserve
        GPIO_setPinConfig(GPIO_8_GPIO8);
        GPIO_setDirectionMode(8, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(8, GPIO_PIN_TYPE_STD);
    
    #if defined(DAC128S_ENABLE) && defined(DAC128S_SPIA)
        // GPIO09->SPI_SCLK*
        GPIO_setPinConfig(GPIO_9_SPIA_CLK);
        GPIO_setDirectionMode(9, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(9, GPIO_PIN_TYPE_PULLUP);
    #else
        // GPIO9->Reserve
        GPIO_setPinConfig(GPIO_9_GPIO9);
        GPIO_setDirectionMode(9, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(9, GPIO_PIN_TYPE_STD);
    #endif  // DAC128S_ENABLE && DAC128S_SPIA
    
    #if defined(DAC128S_ENABLE) && defined(DAC128S_SPIA)
        // GPIO10->SPIA_SOMI->M1_DRV_SDO*
        GPIO_setPinConfig(GPIO_10_SPIA_SOMI);
        GPIO_setDirectionMode(10, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(10, GPIO_PIN_TYPE_PULLUP);
    #else
        // GPIO10->Reserve
        GPIO_setPinConfig(GPIO_10_GPIO10);
        GPIO_setDirectionMode(10, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(10, GPIO_PIN_TYPE_STD);
    #endif  // DAC128S_ENABLE && DAC128S_SPIA
    
    #if defined(DAC128S_ENABLE) && defined(DAC128S_SPIA)
        // GPIO11->SPIA_SIMO->M1_DRV_SDI*
        GPIO_setPinConfig(GPIO_11_SPIA_SIMO);
        GPIO_setDirectionMode(11, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(11, GPIO_PIN_TYPE_PULLUP);
    #else
        // GPIO11->Reserve
        GPIO_setPinConfig(GPIO_11_GPIO11);
        GPIO_setDirectionMode(11, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(11, GPIO_PIN_TYPE_STD);
    #endif  // DAC128S_ENABLE && DAC128S_SPIA
    
        // GPIO12->EPWM7A->M2_UH*
        GPIO_setPinConfig(GPIO_12_EPWM7_A);
        GPIO_setDirectionMode(12, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(12, GPIO_PIN_TYPE_STD);
    
        // GPIO13->EPWM7B->M2_UL*
        GPIO_setPinConfig(GPIO_13_EPWM7_B);
        GPIO_setDirectionMode(13, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(13, GPIO_PIN_TYPE_STD);
    
    #if defined(LPD_SITE_J5_J8)
        // GPIO14->EQEP2_A
        GPIO_setPinConfig(GPIO_14_EQEP2_A);
        GPIO_setDirectionMode(14, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(14, GPIO_PIN_TYPE_STD);
    #else
        //GPIO14->HALL_U
        GPIO_setPinConfig(GPIO_14_GPIO14);
        GPIO_setDirectionMode(14, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(14, GPIO_PIN_TYPE_PULLUP);
    #endif  // LPD_SITE_J5_J8
    
        // GPIO15->EPWM3B->M1_WL*
        GPIO_setPinConfig(GPIO_15_EPWM3_B);
        GPIO_setDirectionMode(15, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(15, GPIO_PIN_TYPE_STD);
    
    #if !defined(LPD_SITE_J5_J8) && defined(SFRA_ENABLE)
        // GPIO16->SCIA_TX for SFRA
        GPIO_setPinConfig(GPIO_16_SCIA_TX);
        GPIO_setDirectionMode(16, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(16, GPIO_PIN_TYPE_STD);
    
        // GPIO17->SCIA_RX for SFRA
        GPIO_setPinConfig(GPIO_17_SCIA_RX);
        GPIO_setDirectionMode(17, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(17, GPIO_PIN_TYPE_STD);
    #elif defined(LPD_SITE_J5_J8) && defined(SFRA_ENABLE)
    #error SFRA can't be supported in this case
    #else  // !SFRA_ENABLE
        // GPIO16->EPWM5A->M2_WH*
        GPIO_setPinConfig(GPIO_16_EPWM5_A);
        GPIO_setDirectionMode(16, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(16, GPIO_PIN_TYPE_STD);
    
        // GPIO17->EPWM5B->M2_WL*
        GPIO_setPinConfig(GPIO_17_EPWM5_B);
        GPIO_setDirectionMode(17, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(17, GPIO_PIN_TYPE_STD);
    #endif  // !SFRA_ENABLE
    
        // GPIO18->Reserve
        GPIO_setPinConfig(GPIO_18_GPIO18_X2);
        GPIO_setDirectionMode(18, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(18, GPIO_PIN_TYPE_STD);
    
        // GPIO19->Reserve
        GPIO_setPinConfig(GPIO_19_GPIO19_X1);
        GPIO_setDirectionMode(19, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(19, GPIO_PIN_TYPE_STD);
    
    #if defined(DAC128S_ENABLE) && defined(DAC128S_SPIB)
        // GPIO22->SPIB_CLK->M2_DRV_SCLK
        GPIO_setPinConfig(GPIO_22_SPIB_CLK);
        GPIO_setDirectionMode(22, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(22, GPIO_PIN_TYPE_PULLUP);
    #else
        GPIO_setPinConfig(GPIO_22_GPIO22);
        GPIO_setDirectionMode(20, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(20, GPIO_PIN_TYPE_STD);
    #endif  // DAC128S_ENABLE && DAC128S_SPIB
    
        // GPIO23-> (site 1)
        GPIO_setPinConfig(GPIO_23_GPIO23);
        GPIO_writePin(23, 1);
        GPIO_setDirectionMode(23, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(23, GPIO_PIN_TYPE_PULLUP);
    
        // GPIO24->Reserve
        GPIO_setPinConfig(GPIO_24_GPIO24);
        GPIO_setDirectionMode(24, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(24, GPIO_PIN_TYPE_STD);
    
    #if defined(LPD_SITE_J5_J8)
        // GPIO25->EQEP2_B
        GPIO_setPinConfig(GPIO_25_EQEP2_B);
        GPIO_setDirectionMode(25, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(25, GPIO_PIN_TYPE_STD);
    #else
        // GPIO25->HALL_V
        GPIO_setPinConfig(GPIO_25_GPIO25);
        GPIO_setDirectionMode(25, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(25, GPIO_PIN_TYPE_PULLUP);
    #endif  // LPD_SITE_J5_J8
    
    #if defined(LPD_SITE_J5_J8)
        // GPIO26->EQEP2_INDEX
        GPIO_setPinConfig(GPIO_26_EQEP2_INDEX);
        GPIO_setDirectionMode(26, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(26, GPIO_PIN_TYPE_STD);
    #else
        // GPIO26->HALL_W
        GPIO_setPinConfig(GPIO_26_GPIO26);
        GPIO_setDirectionMode(26, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(26, GPIO_PIN_TYPE_PULLUP);
    #endif  // LPD_SITE_J5_J8
    
        // GPIO27->Reserve
        GPIO_setPinConfig(GPIO_27_GPIO27);
        GPIO_setDirectionMode(27, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(27, GPIO_PIN_TYPE_STD);
    
        // GPIO28->SCIA_RX->XDS110
        GPIO_setPinConfig(GPIO_28_SCIA_RX);
        GPIO_setDirectionMode(28, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(28, GPIO_PIN_TYPE_PULLUP);
    
        // GPIO29->SCIA_TX->XDS110
        GPIO_setPinConfig(GPIO_29_SCIA_TX);
        GPIO_setDirectionMode(29, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(29, GPIO_PIN_TYPE_PULLUP);
    
    #if defined(DAC128S_ENABLE) && defined(DAC128S_SPIB)
        // GPIO30->SPIB_SIMO->M2_DRV_SDI*
        GPIO_setPinConfig(GPIO_30_SPIB_SIMO);
        GPIO_setDirectionMode(30, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(30, GPIO_PIN_TYPE_PULLUP);
    #else
        GPIO_setPinConfig(GPIO_30_GPIO30);
        GPIO_setDirectionMode(30, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(30, GPIO_PIN_TYPE_STD);
    #endif  // DAC128S_ENABLE && DAC128S_SPIB
    
    #if defined(DAC128S_ENABLE) && defined(DAC128S_SPIB)
        // GPIO31->SPIB_SOMI->M2_DRV_SDO*
        GPIO_setPinConfig(GPIO_31_SPIB_SOMI);
        GPIO_setDirectionMode(31, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(31, GPIO_PIN_TYPE_PULLUP);
    #else
        GPIO_setPinConfig(GPIO_31_GPIO31);
        GPIO_setDirectionMode(31, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(31, GPIO_PIN_TYPE_STD);
    #endif  // DAC128S_ENABLE && DAC128S_SPIB
    
        // GPIO32->Reserve*
        GPIO_setPinConfig(GPIO_32_GPIO32);
        GPIO_setDirectionMode(32, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(32, GPIO_PIN_TYPE_STD);
    
    #if defined(DAC128S_ENABLE) && defined(DAC128S_SPIB)
        // GPIO33->SPIB_STE
        GPIO_setPinConfig(GPIO_33_SPIB_STE);
        GPIO_setDirectionMode(33, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(33, GPIO_PIN_TYPE_STD);
    #else
        GPIO_setPinConfig(GPIO_33_GPIO33);
        GPIO_setDirectionMode(33, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(33, GPIO_PIN_TYPE_STD);
    #endif  // DAC128S_ENABLE && DAC128S_SPIB
    
        // GPIO34->LPD_LED5
        GPIO_setPinConfig(GPIO_34_GPIO34);
        GPIO_writePin(34, 1);
        GPIO_setDirectionMode(34, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(34, GPIO_PIN_TYPE_STD);
    
        // GPIO35->Reserve
        GPIO_setPinConfig(GPIO_35_GPIO35);
        GPIO_setDirectionMode(35, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(35, GPIO_PIN_TYPE_STD);
    
    #if defined(DAC128S_ENABLE) && defined(DAC128S_SPIB)
        // GPIO33->SPIB_STE
        GPIO_setPinConfig(GPIO_33_SPIB_STE);
        GPIO_setDirectionMode(33, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(33, GPIO_PIN_TYPE_STD);
    #else
        GPIO_setPinConfig(GPIO_33_GPIO33);
        GPIO_setDirectionMode(33, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(33, GPIO_PIN_TYPE_STD);
    #endif  // DAC128S_ENABLE && DAC128S_SPIB
    
    #if defined(LPD_SITE_J1_J4)
        // GPIO37->EQEP1_B
        GPIO_setPinConfig(GPIO_37_EQEP1_B);
        GPIO_setDirectionMode(37, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(37, GPIO_PIN_TYPE_STD);
    #else
        GPIO_setPinConfig(GPIO_37_GPIO37);
        GPIO_setDirectionMode(37, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(37, GPIO_PIN_TYPE_STD);
    #endif  // LPD_SITE_J1_J4
    
        // GPIO39->EN_GATE (site 2)
        GPIO_setPinConfig(GPIO_39_GPIO39);
        GPIO_writePin(39, 1);
        GPIO_setDirectionMode(39, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(39, GPIO_PIN_TYPE_PULLUP);
    
        // GPIO40->Reserve
        GPIO_setPinConfig(GPIO_40_GPIO40);
        GPIO_setDirectionMode(40, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(40, GPIO_PIN_TYPE_STD);
    
        // GPIO41->reserve
        GPIO_setPinConfig(GPIO_41_GPIO41);
        GPIO_setDirectionMode(41, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(41, GPIO_PIN_TYPE_STD);
    
        // GPIO42->OT (Site 1)
        GPIO_setPinConfig(GPIO_42_GPIO42);
        GPIO_setDirectionMode(42, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(42, GPIO_PIN_TYPE_PULLUP);
    
    #if defined(LPD_SITE_J1_J4)
        // GPIO43->EQEP1_INDEX!
        GPIO_setPinConfig(GPIO_43_EQEP1_INDEX);
        GPIO_setDirectionMode(43, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(43, GPIO_PIN_TYPE_STD);
    #else
        GPIO_setPinConfig(GPIO_43_GPIO43);
        GPIO_setDirectionMode(43, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(43, GPIO_PIN_TYPE_STD);
    #endif  // LPD_SITE_J1_J4
    
    #if defined(LPD_SITE_J1_J4)
        // GPIO44->EQEP1_A
        GPIO_setPinConfig(GPIO_44_EQEP1_A);
        GPIO_setDirectionMode(44, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(44, GPIO_PIN_TYPE_STD);
    #else
        GPIO_setPinConfig(GPIO_44_GPIO44);
        GPIO_setDirectionMode(44, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(44, GPIO_PIN_TYPE_STD);
    #endif  // LPD_SITE_J1_J4
    
        // GPIO45->OT (site 2)
        GPIO_setPinConfig(GPIO_45_GPIO45);
        GPIO_setDirectionMode(45, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(45, GPIO_PIN_TYPE_PULLUP);
    
        // GPIO46->Reserve
        GPIO_setPinConfig(GPIO_46_GPIO46);
        GPIO_setDirectionMode(46, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(46, GPIO_PIN_TYPE_STD);
        // end of BSXL3PHGAN_REVA
    //------------------------------------------------------------------------------
    #elif defined(HVMTRPFC_REV1P1)
        // GPIO0->EPWM1A->M1_UH
        GPIO_setPinConfig(GPIO_0_EPWM1_A);
        GPIO_setDirectionMode(0, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(0, GPIO_PIN_TYPE_STD);
    
        // GPIO1->EPWM1B->M1_UL
        GPIO_setPinConfig(GPIO_1_EPWM1_B);
        GPIO_setDirectionMode(1, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(1, GPIO_PIN_TYPE_STD);
    
        // GPIO2->EPWM2A->M1_VH
        GPIO_setPinConfig(GPIO_2_EPWM2_A);
        GPIO_setDirectionMode(2, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(2, GPIO_PIN_TYPE_STD);
    
        // GPIO3->EPWM2B->M1_VL
        GPIO_setPinConfig(GPIO_3_EPWM2_B);
        GPIO_setDirectionMode(3, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(3, GPIO_PIN_TYPE_STD);
    
        // GPIO4->EPWM3A->M1_WH
        GPIO_setPinConfig(GPIO_4_EPWM3_A);
        GPIO_setDirectionMode(4, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(4, GPIO_PIN_TYPE_STD);
    
        // GPIO5->EPWM3B->M1_WL
        GPIO_setPinConfig(GPIO_5_EPWM3_B);
        GPIO_setDirectionMode(5, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(5, GPIO_PIN_TYPE_STD);
    
        // GPIO6->EPWM4A->PFC_1H
        GPIO_setPinConfig(GPIO_6_EPWM4_A);
        GPIO_setDirectionMode(6, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(6, GPIO_PIN_TYPE_STD);
    
        // GPIO7->EPWM4B->PFC_1L
        GPIO_setPinConfig(GPIO_7_EPWM4_B);
        GPIO_setDirectionMode(7, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(7, GPIO_PIN_TYPE_STD);
    
        // GPIO8->Reserve
        GPIO_setPinConfig(GPIO_8_GPIO8);
        GPIO_setDirectionMode(8, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(8, GPIO_PIN_TYPE_STD);
    
        // GPIO09->CLR-Fault
        GPIO_setPinConfig(GPIO_9_GPIO9);
        GPIO_writePin(9, 1);
        GPIO_setDirectionMode(9, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(9, GPIO_PIN_TYPE_PULLUP);
    
        // PWM6A->DAC1
        GPIO_setPinConfig(GPIO_10_EPWM6_A);
        GPIO_setDirectionMode(10, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(10, GPIO_PIN_TYPE_STD);
    
        // PWM6B->DAC2
        GPIO_setPinConfig(GPIO_11_EPWM6_B);
        GPIO_setDirectionMode(11, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(11, GPIO_PIN_TYPE_STD);
    
        // PWM7A->DAC3
        GPIO_setPinConfig(GPIO_12_EPWM7_A);
        GPIO_setDirectionMode(12, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(12, GPIO_PIN_TYPE_STD);
    
        // PWM7B->DAC4
        GPIO_setPinConfig(GPIO_13_EPWM7_B);
        GPIO_setDirectionMode(13, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(13, GPIO_PIN_TYPE_STD);
    
        // GPIO14->LED2 on HVKIT
        GPIO_setPinConfig(GPIO_14_GPIO14);
        GPIO_writePin(14, 1);
        GPIO_setDirectionMode(14, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(14, GPIO_PIN_TYPE_STD);
    
        // GPIO15->Reserve
        GPIO_setPinConfig(GPIO_15_GPIO15);
        GPIO_setDirectionMode(15, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(15, GPIO_PIN_TYPE_STD);
    
        // GPIO16->EPWM5A
        GPIO_setPinConfig(GPIO_16_EPWM5_A);
        GPIO_setDirectionMode(16, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(16, GPIO_PIN_TYPE_STD);
    
        // GPIO17->EPWM5B
        GPIO_setPinConfig(GPIO_17_EPWM5_B);
        GPIO_setDirectionMode(17, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(17, GPIO_PIN_TYPE_STD);
    
        // GPIO18->Reserve
        GPIO_setPinConfig(GPIO_18_GPIO18_X2);
        GPIO_setDirectionMode(18, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(18, GPIO_PIN_TYPE_STD);
    
        // GPIO19->Reserve
        GPIO_setPinConfig(GPIO_19_GPIO19_X1);
        GPIO_setDirectionMode(19, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(19, GPIO_PIN_TYPE_STD);
    
        // GPIO22->Reserve
        GPIO_setPinConfig(GPIO_22_GPIO22);
        GPIO_setDirectionMode(22, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(22, GPIO_PIN_TYPE_STD);
    
    #if !defined(ENC_QEP2)
        // GPIO23->EQEP1_I
        GPIO_setPinConfig(GPIO_23_EQEP1_INDEX);
        GPIO_setDirectionMode(23, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(23, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(23, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(23, 2);
    #else   // ENC_QEP2
        // GPIO23->CAP1->HALL_W
        GPIO_setPinConfig(GPIO_23_GPIO23);
        GPIO_setDirectionMode(23, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(23, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(23, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(23, 2);
    #endif  // ENC_QEP2
    
    #if !defined(ENC_QEP2)
        // GPIO24->CAP1->HALL_U
        GPIO_setPinConfig(GPIO_24_GPIO24);
        GPIO_setDirectionMode(24, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(24, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(24, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(24, 2);
    #else   // ENC_QEP2
        // GPIO24->EQEP2_A
        GPIO_setPinConfig(GPIO_24_EQEP2_A);
        GPIO_setDirectionMode(24, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(24, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(24, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(24, 2);
    #endif  // ENC_QEP2
    
    #if !defined(ENC_QEP2)
        // GPIO25->CAP2->HALL_V
        GPIO_setPinConfig(GPIO_25_GPIO25);
        GPIO_setDirectionMode(25, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(25, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(25, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(25, 1);
    #else   // ENC_QEP2
        // GPIO25->EQEP2_B
        GPIO_setPinConfig(GPIO_25_EQEP2_B);
        GPIO_setDirectionMode(25, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(25, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(25, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(25, 1);
    #endif  // ENC_QEP2
    
    #if !defined(ENC_QEP2)
        // GPIO26->CAP3->HALL_U
        GPIO_setPinConfig(GPIO_26_GPIO26);
        GPIO_setDirectionMode(26, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(26, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(26, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(26, 1);
    #else   // ENC_QEP2
        // GPIO26->EQEP2_I
        GPIO_setPinConfig(GPIO_26_EQEP2_INDEX);
        GPIO_setDirectionMode(26, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(26, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(26, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(26, 1);
    #endif  // ENC_QEP2
    
        // GPIO27->PFC ISR Executing Time
        GPIO_setPinConfig(GPIO_27_GPIO27);
        GPIO_setDirectionMode(27, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(27, GPIO_PIN_TYPE_STD);
    
        // GPIO28->SCIA_RX
        GPIO_setPinConfig(GPIO_28_SCIA_RX);
        GPIO_setDirectionMode(28, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(28, GPIO_PIN_TYPE_STD);
    
        // GPIO28->SCIA_TX
        GPIO_setPinConfig(GPIO_29_SCIA_TX);
        GPIO_setDirectionMode(29, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(29, GPIO_PIN_TYPE_STD);
    
        // GPIO30->CAN-RX
        GPIO_setPinConfig(GPIO_30_CANA_RX);
        GPIO_setDirectionMode(30, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(30, GPIO_PIN_TYPE_STD);
    
        // GPIO31->CAN-TX
        GPIO_setPinConfig(GPIO_31_CANA_TX);
        GPIO_setDirectionMode(31, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(31, GPIO_PIN_TYPE_STD);
    
        // GPIO32->Reserve
        GPIO_setPinConfig(GPIO_32_GPIO32);
        GPIO_setDirectionMode(32, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(32, GPIO_PIN_TYPE_PULLUP);
    
        // GPIO33->Reserve
        GPIO_setPinConfig(GPIO_33_GPIO33);
        GPIO_setDirectionMode(33, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(33, GPIO_PIN_TYPE_STD);
    
        // GPIO34->LED-D2 on Control Card
        GPIO_setPinConfig(GPIO_34_GPIO34);
        GPIO_writePin(34, 1);
        GPIO_setDirectionMode(34, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(34, GPIO_PIN_TYPE_STD);
    
        // TDI
        GPIO_setPinConfig(GPIO_35_TDI);
    
        // TDO
        GPIO_setPinConfig(GPIO_37_TDO);
    
        // GPIO39->nFault
        GPIO_setPinConfig(GPIO_39_GPIO39);
        GPIO_setDirectionMode(39, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(39, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(39, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(39, 1);
    
    #if !defined(ENC_QEP2)
        // GPIO40->EQEP1_A
        GPIO_setPinConfig(GPIO_40_EQEP1_A);
        GPIO_setDirectionMode(40, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(40, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(40, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(40, 2);
    #else   // ENC_QEP2
        // GPIO40->CAP1->HALL_U
        GPIO_setPinConfig(GPIO_40_EQEP1_A);
        GPIO_setDirectionMode(40, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(40, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(40, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(40, 2);
    #endif  // ENC_QEP2
    
    #if !defined(ENC_QEP2)
        // GPIO41->EQEP1_B
        GPIO_setPinConfig(GPIO_41_EQEP1_B);
        GPIO_setDirectionMode(41, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(41, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(41, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(41, 2);
    #else   // ENC_QEP2
        // GPIO41->CAP2->HALL_V
        GPIO_setPinConfig(GPIO_41_GPIO41);
        GPIO_setDirectionMode(41, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(41, GPIO_PIN_TYPE_STD);
        GPIO_setQualificationMode(41, GPIO_QUAL_3SAMPLE);
        GPIO_setQualificationPeriod(41, 2);
    #endif  // ENC_QEP2
    
        // GPIO42->LED1 on HVKIT
        GPIO_setPinConfig(GPIO_42_GPIO42);
        GPIO_writePin(42, 1);
        GPIO_setDirectionMode(42, GPIO_DIR_MODE_OUT);
        GPIO_setPadConfig(42, GPIO_PIN_TYPE_STD);
    
        // GPIO43->Reserve
        GPIO_setPinConfig(GPIO_43_GPIO43);
        GPIO_setDirectionMode(43, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(43, GPIO_PIN_TYPE_STD);
    
        // GPIO44->Reserve
        GPIO_setPinConfig(GPIO_44_GPIO44);
        GPIO_setDirectionMode(44, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(44, GPIO_PIN_TYPE_STD);
    
        // GPIO45->Reserve
        GPIO_setPinConfig(GPIO_45_GPIO45);
        GPIO_setDirectionMode(45, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(45, GPIO_PIN_TYPE_STD);
    
        // GPIO46->Reserve
        GPIO_setPinConfig(GPIO_46_GPIO46);
        GPIO_setDirectionMode(46, GPIO_DIR_MODE_IN);
        GPIO_setPadConfig(46, GPIO_PIN_TYPE_STD);
        // end of HVMTRPFC_REV1P1
    //------------------------------------------------------------------------------
    #else
    #error The GPIOs is not configured for motor control board
    #endif
    
        return;
    }  // end of HAL_setupGPIOs() function
    
    void HAL_setupPeripheralClks(HAL_Handle handle)
    {
        SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_DMA);
    
        SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_TIMER0);
        SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_TIMER1);
        SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_TIMER2);
    
    //JS    SysCtl_disablePeripheral(SYSCTL_PERIPH_CLK_HRCAL);
        SysCtl_disablePeripheral(SYSCTL_PERIPH_CLK_TBCLKSYNC);
    
        SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM1);
        SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM2);
        SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM3);
        SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM4);
        SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM5);
        SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM6);
        SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM7);
    
        SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP1);
        SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP2);
        SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP3);
    
        SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EQEP1);
        SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EQEP2);
    
        SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SCIA);
    
        SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SPIA);
        SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SPIB);
    
        SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_I2CA);
    
        SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CANA);
    
        SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCA);
        SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCC);
    
        SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS1);
        SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS2);
        SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS3);
        SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS4);
    
    //JS    SysCtl_disablePeripheral(SYSCTL_PERIPH_CLK_FSITXA);
    //JS    SysCtl_disablePeripheral(SYSCTL_PERIPH_CLK_FSIRXA);
    
    //JS    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_LINA);
    //JS    SysCtl_disablePeripheral(SYSCTL_PERIPH_CLK_LINB);
    
    //JS    SysCtl_disablePeripheral(SYSCTL_PERIPH_CLK_PMBUSA);
    
        return;
    } // end of HAL_setupPeripheralClks() function
    
    void HAL_setupPWMs(HAL_MTR_Handle handle)
    {
        HAL_MTR_Obj    *obj = (HAL_MTR_Obj *)handle;
        uint16_t  cnt;
    
        uint16_t       pwmPeriodCycles = (uint16_t)(USER_M1_PWM_TBPRD_NUM);
        uint16_t       numPWMTicksPerISRTick = USER_M1_NUM_PWM_TICKS_PER_ISR_TICK;
    
        // disable the ePWM module time base clock sync signal
        // to synchronize all of the PWMs
        SysCtl_disablePeripheral(SYSCTL_PERIPH_CLK_TBCLKSYNC);
    
        // turns off the outputs of the EPWM peripherals which will put the power
        // switches into a high impedance state.
        EPWM_forceTripZoneEvent(obj->pwmHandle[0], EPWM_TZ_FORCE_EVENT_OST);
        EPWM_forceTripZoneEvent(obj->pwmHandle[1], EPWM_TZ_FORCE_EVENT_OST);
        EPWM_forceTripZoneEvent(obj->pwmHandle[2], EPWM_TZ_FORCE_EVENT_OST);
    
    #if defined(BSXL8323RS_REVA) || defined(BSXL8323RH_REVB) || \
        defined(BSXL8353RS_REVA) || defined(BSXL8316RT_REVA) || \
        defined(BSXL3PHGAN_REVA) || defined(HVMTRPFC_REV1P1)
    
        for(cnt=0; cnt<3; cnt++)
        {
            // setup the Time-Base Control Register (TBCTL)
            EPWM_setTimeBaseCounterMode(obj->pwmHandle[cnt],
                                        EPWM_COUNTER_MODE_UP_DOWN);
    
            EPWM_disablePhaseShiftLoad(obj->pwmHandle[cnt]);
    
            EPWM_setPeriodLoadMode(obj->pwmHandle[cnt], EPWM_PERIOD_DIRECT_LOAD);
    
    //JS        EPWM_enableSyncOutPulseSource(obj->pwmHandle[cnt],
    //JS                                      EPWM_SYNC_OUT_PULSE_ON_SOFTWARE);
    
            EPWM_setClockPrescaler(obj->pwmHandle[cnt], EPWM_CLOCK_DIVIDER_1,
                                     EPWM_HSCLOCK_DIVIDER_1);
    
            EPWM_setCountModeAfterSync(obj->pwmHandle[cnt],
                                       EPWM_COUNT_MODE_UP_AFTER_SYNC);
    
            EPWM_setEmulationMode(obj->pwmHandle[cnt], EPWM_EMULATION_FREE_RUN);
    
            // setup the Timer-Based Phase Register (TBPHS)
            EPWM_setPhaseShift(obj->pwmHandle[cnt], 0);
    
            // setup the Time-Base Counter Register (TBCTR)
            EPWM_setTimeBaseCounter(obj->pwmHandle[cnt], 0);
    
            // setup the Time-Base Period Register (TBPRD)
            // set to zero initially
            EPWM_setTimeBasePeriod(obj->pwmHandle[cnt], 0);
    
            // setup the Counter-Compare Control Register (CMPCTL)
            EPWM_setCounterCompareShadowLoadMode(obj->pwmHandle[cnt],
                                                 EPWM_COUNTER_COMPARE_A,
                                                 EPWM_COMP_LOAD_ON_CNTR_ZERO);
    
            EPWM_setCounterCompareShadowLoadMode(obj->pwmHandle[cnt],
                                                 EPWM_COUNTER_COMPARE_B,
                                                 EPWM_COMP_LOAD_ON_CNTR_ZERO);
    
            EPWM_setCounterCompareShadowLoadMode(obj->pwmHandle[cnt],
                                                 EPWM_COUNTER_COMPARE_C,
                                                 EPWM_COMP_LOAD_ON_CNTR_ZERO);
    
            EPWM_setCounterCompareShadowLoadMode(obj->pwmHandle[cnt],
                                                 EPWM_COUNTER_COMPARE_D,
                                                 EPWM_COMP_LOAD_ON_CNTR_ZERO);
    
    #if defined(MOTOR1_ISBLDC)
            // setup the Action-Qualifier Output A Register (AQCTLA)
            EPWM_setActionQualifierAction(obj->pwmHandle[cnt],
                                          EPWM_AQ_OUTPUT_A,
                                          EPWM_AQ_OUTPUT_HIGH,
                                          EPWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPA);
    
            EPWM_setActionQualifierAction(obj->pwmHandle[cnt],
                                          EPWM_AQ_OUTPUT_A,
                                          EPWM_AQ_OUTPUT_LOW,
                                          EPWM_AQ_OUTPUT_ON_TIMEBASE_DOWN_CMPA);
    
            // setup the Action-qualifier Continuous Software Force Register (AQCSFRC)
            EPWM_setActionQualifierContSWForceAction(obj->pwmHandle[cnt],
                                                     EPWM_AQ_OUTPUT_B,
                                                     EPWM_AQ_SW_OUTPUT_HIGH);
    
            // setup the Dead-Band Generator Control Register (DBCTL)
            EPWM_setDeadBandDelayMode(obj->pwmHandle[cnt], EPWM_DB_RED, false);
            EPWM_setDeadBandDelayMode(obj->pwmHandle[cnt], EPWM_DB_FED, false);
    
    #else   //!MOTOR1_ISBLDC
    
    
    #if defined(MOTOR1_DCLINKSS)
            // setup the Action-Qualifier Output A Register (AQCTLA)
            EPWM_setActionQualifierAction(obj->pwmHandle[cnt],
                                          EPWM_AQ_OUTPUT_A,
                                          EPWM_AQ_OUTPUT_HIGH,
                                          EPWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPA);
    
            EPWM_setActionQualifierAction(obj->pwmHandle[cnt],
                                          EPWM_AQ_OUTPUT_A,
                                          EPWM_AQ_OUTPUT_LOW,
                                          EPWM_AQ_OUTPUT_ON_TIMEBASE_DOWN_CMPB);
    
            EPWM_setActionQualifierAction(obj->pwmHandle[cnt],
                                          EPWM_AQ_OUTPUT_A,
                                          EPWM_AQ_OUTPUT_LOW,
                                          EPWM_AQ_OUTPUT_ON_TIMEBASE_ZERO);
    
            EPWM_setActionQualifierAction(obj->pwmHandle[cnt],
                                          EPWM_AQ_OUTPUT_A,
                                          EPWM_AQ_OUTPUT_HIGH,
                                          EPWM_AQ_OUTPUT_ON_TIMEBASE_PERIOD);
    #else  // !(MOTOR1_DCLINKSS)
            // setup the Action-Qualifier Output A Register (AQCTLA)
            EPWM_setActionQualifierAction(obj->pwmHandle[cnt],
                                          EPWM_AQ_OUTPUT_A,
                                          EPWM_AQ_OUTPUT_HIGH,
                                          EPWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPA);
    
            EPWM_setActionQualifierAction(obj->pwmHandle[cnt],
                                          EPWM_AQ_OUTPUT_A,
                                          EPWM_AQ_OUTPUT_HIGH,
                                          EPWM_AQ_OUTPUT_ON_TIMEBASE_PERIOD);
    
            EPWM_setActionQualifierAction(obj->pwmHandle[cnt],
                                          EPWM_AQ_OUTPUT_A,
                                          EPWM_AQ_OUTPUT_LOW,
                                          EPWM_AQ_OUTPUT_ON_TIMEBASE_DOWN_CMPA);
    
            EPWM_setActionQualifierAction(obj->pwmHandle[cnt],
                                          EPWM_AQ_OUTPUT_A,
                                          EPWM_AQ_OUTPUT_LOW,
                                          EPWM_AQ_OUTPUT_ON_TIMEBASE_ZERO);
    
    #endif  // !(MOTOR1_DCLINKSS)
    
            // setup the Dead-Band Generator Control Register (DBCTL)
            EPWM_setDeadBandDelayMode(obj->pwmHandle[cnt], EPWM_DB_RED, true);
            EPWM_setDeadBandDelayMode(obj->pwmHandle[cnt], EPWM_DB_FED, true);
    
            // select EPWMA as the input to the dead band generator
            EPWM_setRisingEdgeDeadBandDelayInput(obj->pwmHandle[cnt],
                                                 EPWM_DB_INPUT_EPWMA);
    
            // configure the right polarity for active high complementary config.
            EPWM_setDeadBandDelayPolarity(obj->pwmHandle[cnt],
                                          EPWM_DB_RED,
                                          EPWM_DB_POLARITY_ACTIVE_HIGH);
            EPWM_setDeadBandDelayPolarity(obj->pwmHandle[cnt],
                                          EPWM_DB_FED,
                                          EPWM_DB_POLARITY_ACTIVE_LOW);
    
            // setup the Dead-Band Rising Edge Delay Register (DBRED)
            EPWM_setRisingEdgeDelayCount(obj->pwmHandle[cnt], MTR1_PWM_DBRED_CNT);
    
            // setup the Dead-Band Falling Edge Delay Register (DBFED)
            EPWM_setFallingEdgeDelayCount(obj->pwmHandle[cnt], MTR1_PWM_DBFED_CNT);
    
    #endif  //!MOTOR1_ISBLDC
    
            // setup the PWM-Chopper Control Register (PCCTL)
            EPWM_disableChopper(obj->pwmHandle[cnt]);
    
            // setup the Trip Zone Select Register (TZSEL)
            EPWM_disableTripZoneSignals(obj->pwmHandle[cnt], HAL_TZSEL_SIGNALS_ALL);
        }
    
        // BSXL8323RS_REVA || BSXL8323RH_REVB || \
        // BSXL8353RS_REVA || BSXL8316RT_REVA || \
        // BSXL3PHGAN_REVA || HVMTRPFC_REV1P1
    #else
    #error The PWM is not configured for motor_1 control
    #endif  // boards
    
    #if defined(MOTOR1_ISBLDC)
        // setup the Event Trigger Selection Register (ETSEL)
        EPWM_setInterruptSource(obj->pwmHandle[0], EPWM_INT_TBCTR_ZERO);
    
        EPWM_disableInterrupt(obj->pwmHandle[0]);
    
        EPWM_setADCTriggerSource(obj->pwmHandle[0],
                                 EPWM_SOC_A, EPWM_SOC_TBCTR_ZERO);
    
        EPWM_enableADCTrigger(obj->pwmHandle[0], EPWM_SOC_A);
    
        EPWM_setADCTriggerSource(obj->pwmHandle[0],
                                  EPWM_SOC_B, EPWM_SOC_TBCTR_U_CMPB);
    
        EPWM_enableADCTrigger(obj->pwmHandle[0], EPWM_SOC_B);
    #elif defined(MOTOR1_DCLINKSS)
        // setup the Event Trigger Selection Register (ETSEL)
        EPWM_setInterruptSource(obj->pwmHandle[0], EPWM_INT_TBCTR_ZERO);
    
        EPWM_enableInterrupt(obj->pwmHandle[0]);
    
        EPWM_setADCTriggerSource(obj->pwmHandle[0],
                                 EPWM_SOC_A, EPWM_SOC_TBCTR_D_CMPC);
    
        EPWM_enableADCTrigger(obj->pwmHandle[0], EPWM_SOC_A);
    
        // ADC SOC trigger for the 1st dc-link current sampling
        EPWM_setADCTriggerSource(obj->pwmHandle[1],
                                     EPWM_SOC_A,
                                     EPWM_SOC_TBCTR_U_CMPC);
    
        EPWM_enableADCTrigger(obj->pwmHandle[1], EPWM_SOC_A);
    
        // ADC SOC trigger for the 2nd dc-link current sampling
        EPWM_setADCTriggerSource(obj->pwmHandle[1],
                                 EPWM_SOC_B,
                                 EPWM_SOC_TBCTR_U_CMPD);
    
        EPWM_enableADCTrigger(obj->pwmHandle[1], EPWM_SOC_B);
    
        // ADC SOC trigger for the 3rd dc-link current sampling
        EPWM_setADCTriggerSource(obj->pwmHandle[2],
                                     EPWM_SOC_A,
                                     EPWM_SOC_TBCTR_D_CMPC);
    
        EPWM_enableADCTrigger(obj->pwmHandle[2], EPWM_SOC_A);
    
        // ADC SOC trigger for the 4th dc-link current sampling
        EPWM_setADCTriggerSource(obj->pwmHandle[2],
                                 EPWM_SOC_B,
                                 EPWM_SOC_TBCTR_D_CMPD);
    
        EPWM_enableADCTrigger(obj->pwmHandle[2], EPWM_SOC_B);
    #else   //!(MOTOR1_ISBLDC || MOTOR1_DCLINKSS)
        // setup the Event Trigger Selection Register (ETSEL)
        EPWM_setInterruptSource(obj->pwmHandle[0], EPWM_INT_TBCTR_ZERO);
    
        EPWM_enableInterrupt(obj->pwmHandle[0]);
    
        EPWM_setADCTriggerSource(obj->pwmHandle[0],
                                 EPWM_SOC_A, EPWM_SOC_TBCTR_D_CMPC);
    
        EPWM_enableADCTrigger(obj->pwmHandle[0], EPWM_SOC_A);
    #endif  // !(MOTOR1_ISBLDC || MOTOR1_DCLINKSS)
    
        // setup the Event Trigger Prescale Register (ETPS)
        if(numPWMTicksPerISRTick > 15)
        {
            EPWM_setInterruptEventCount(obj->pwmHandle[0], 15);
    
            EPWM_setADCTriggerEventPrescale(obj->pwmHandle[0], EPWM_SOC_A, 15);
            EPWM_setADCTriggerEventPrescale(obj->pwmHandle[0], EPWM_SOC_B, 15);
    
    #if defined(MOTOR1_DCLINKSS)
            EPWM_setADCTriggerEventPrescale(obj->pwmHandle[1], EPWM_SOC_A, 15);
            EPWM_setADCTriggerEventPrescale(obj->pwmHandle[1], EPWM_SOC_B, 15);
    
            EPWM_setADCTriggerEventPrescale(obj->pwmHandle[2], EPWM_SOC_A, 15);
            EPWM_setADCTriggerEventPrescale(obj->pwmHandle[2], EPWM_SOC_B, 15);
    #endif  //MOTOR1_DCLINKSS
        }
        else if(numPWMTicksPerISRTick < 1)
        {
            EPWM_setInterruptEventCount(obj->pwmHandle[0], 1);
    
            EPWM_setADCTriggerEventPrescale(obj->pwmHandle[0], EPWM_SOC_A, 1);
            EPWM_setADCTriggerEventPrescale(obj->pwmHandle[0], EPWM_SOC_B, 1);
    
    #if defined(MOTOR1_DCLINKSS)
            EPWM_setADCTriggerEventPrescale(obj->pwmHandle[1], EPWM_SOC_A, 1);
            EPWM_setADCTriggerEventPrescale(obj->pwmHandle[1], EPWM_SOC_B, 1);
    
            EPWM_setADCTriggerEventPrescale(obj->pwmHandle[2], EPWM_SOC_A, 1);
            EPWM_setADCTriggerEventPrescale(obj->pwmHandle[2], EPWM_SOC_B, 1);
    #endif  //MOTOR1_DCLINKSS
        }
        else
        {
            EPWM_setInterruptEventCount(obj->pwmHandle[0], numPWMTicksPerISRTick);
    
            EPWM_setADCTriggerEventPrescale(obj->pwmHandle[0], EPWM_SOC_A,
                                            numPWMTicksPerISRTick);
            EPWM_setADCTriggerEventPrescale(obj->pwmHandle[0], EPWM_SOC_B,
                                            numPWMTicksPerISRTick);
    
    #if defined(MOTOR1_DCLINKSS)
            EPWM_setADCTriggerEventPrescale(obj->pwmHandle[1], EPWM_SOC_A,
                                            numPWMTicksPerISRTick);
            EPWM_setADCTriggerEventPrescale(obj->pwmHandle[1], EPWM_SOC_B,
                                            numPWMTicksPerISRTick);
    
            EPWM_setADCTriggerEventPrescale(obj->pwmHandle[2], EPWM_SOC_A,
                                            numPWMTicksPerISRTick);
            EPWM_setADCTriggerEventPrescale(obj->pwmHandle[2], EPWM_SOC_B,
                                            numPWMTicksPerISRTick);
    #endif  //MOTOR1_DCLINKSS
        }
    
        // setup the Event Trigger Clear Register (ETCLR)
        EPWM_clearEventTriggerInterruptFlag(obj->pwmHandle[0]);
        EPWM_clearADCTriggerFlag(obj->pwmHandle[0], EPWM_SOC_A);
        EPWM_clearADCTriggerFlag(obj->pwmHandle[0], EPWM_SOC_B);
    
        // since the PWM is configured as an up/down counter, the period register is
        // set to one-half of the desired PWM period
        EPWM_setTimeBasePeriod(obj->pwmHandle[0], pwmPeriodCycles);
        EPWM_setTimeBasePeriod(obj->pwmHandle[1], pwmPeriodCycles);
        EPWM_setTimeBasePeriod(obj->pwmHandle[2], pwmPeriodCycles);
    
        // write the PWM data value  for ADC trigger
        EPWM_setCounterCompareValue(obj->pwmHandle[0], EPWM_COUNTER_COMPARE_C, 10);
    
        // write the PWM data value  for ADC trigger
    #if defined(MOTOR1_DCLINKSS)
        EPWM_clearADCTriggerFlag(obj->pwmHandle[1], EPWM_SOC_A);
        EPWM_clearADCTriggerFlag(obj->pwmHandle[1], EPWM_SOC_B);
    
        EPWM_clearADCTriggerFlag(obj->pwmHandle[2], EPWM_SOC_A);
        EPWM_clearADCTriggerFlag(obj->pwmHandle[2], EPWM_SOC_B);
    
        EPWM_setCounterCompareValue(obj->pwmHandle[1],
                                    EPWM_COUNTER_COMPARE_C, pwmPeriodCycles>>1);
        EPWM_setCounterCompareValue(obj->pwmHandle[1],
                                    EPWM_COUNTER_COMPARE_D, pwmPeriodCycles>>1);
    
        EPWM_setCounterCompareValue(obj->pwmHandle[2],
                                    EPWM_COUNTER_COMPARE_C, pwmPeriodCycles>>1);
        EPWM_setCounterCompareValue(obj->pwmHandle[2],
                                    EPWM_COUNTER_COMPARE_D, pwmPeriodCycles>>1);
    
    #endif  //MOTOR1_DCLINKSS
    
    #ifdef SST_ENABLE
        // setup the Time-Base Control Register (TBCTL)
        EPWM_setTimeBaseCounterMode(obj->sstpwmHandle,
                                    EPWM_COUNTER_MODE_UP_DOWN);
    
        EPWM_disablePhaseShiftLoad(obj->sstpwmHandle);
    
        EPWM_setPeriodLoadMode(obj->sstpwmHandle, EPWM_PERIOD_DIRECT_LOAD);
    
        EPWM_enableSyncOutPulseSource(obj->sstpwmHandle,
                                      EPWM_SYNC_OUT_PULSE_ON_SOFTWARE);
    
        EPWM_setClockPrescaler(obj->sstpwmHandle, EPWM_CLOCK_DIVIDER_1,
                                 EPWM_HSCLOCK_DIVIDER_1);
    
        EPWM_setCountModeAfterSync(obj->sstpwmHandle,
                                   EPWM_COUNT_MODE_UP_AFTER_SYNC);
    
        EPWM_setEmulationMode(obj->sstpwmHandle, EPWM_EMULATION_FREE_RUN);
    
        // setup the Timer-Based Phase Register (TBPHS)
        EPWM_setPhaseShift(obj->sstpwmHandle, 0);
    
        // setup the Time-Base Counter Register (TBCTR)
        EPWM_setTimeBaseCounter(obj->sstpwmHandle, 0);
    
        // setup the Time-Base Period Register (TBPRD)
        // set to zero initially
        EPWM_setTimeBasePeriod(obj->sstpwmHandle, 0);
    
        // setup the Counter-Compare Control Register (CMPCTL)
        EPWM_setCounterCompareShadowLoadMode(obj->sstpwmHandle,
                                             EPWM_COUNTER_COMPARE_A,
                                             EPWM_COMP_LOAD_ON_CNTR_ZERO);
    
        EPWM_setCounterCompareShadowLoadMode(obj->sstpwmHandle,
                                             EPWM_COUNTER_COMPARE_B,
                                             EPWM_COMP_LOAD_ON_CNTR_ZERO);
    
        EPWM_setCounterCompareShadowLoadMode(obj->sstpwmHandle,
                                             EPWM_COUNTER_COMPARE_C,
                                             EPWM_COMP_LOAD_ON_CNTR_ZERO);
    
        EPWM_setCounterCompareShadowLoadMode(obj->sstpwmHandle,
                                             EPWM_COUNTER_COMPARE_D,
                                             EPWM_COMP_LOAD_ON_CNTR_ZERO);
    
        // setup the Action-Qualifier Output A Register (AQCTLB)
        EPWM_setActionQualifierAction(obj->sstpwmHandle,
                                      EPWM_AQ_OUTPUT_B,
                                      EPWM_AQ_OUTPUT_HIGH,
                                      EPWM_AQ_OUTPUT_ON_TIMEBASE_DOWN_CMPA);
    
        EPWM_setActionQualifierAction(obj->sstpwmHandle,
                                      EPWM_AQ_OUTPUT_B,
                                      EPWM_AQ_OUTPUT_LOW,
                                      EPWM_AQ_OUTPUT_ON_TIMEBASE_DOWN_CMPB);
    
        EPWM_setActionQualifierAction(obj->sstpwmHandle,
                                      EPWM_AQ_OUTPUT_B,
                                      EPWM_AQ_OUTPUT_LOW,
                                      EPWM_AQ_OUTPUT_ON_TIMEBASE_ZERO);
    
        // setup the Dead-Band Generator Control Register (DBCTL)
        EPWM_setDeadBandDelayMode(obj->sstpwmHandle, EPWM_DB_RED, false);
        EPWM_setDeadBandDelayMode(obj->sstpwmHandle, EPWM_DB_FED, false);
    
        // setup the PWM-Chopper Control Register (PCCTL)
        EPWM_disableChopper(obj->sstpwmHandle);
    
        // setup the Trip Zone Select Register (TZSEL)
        EPWM_disableTripZoneSignals(obj->sstpwmHandle, HAL_TZSEL_SIGNALS_ALL);
    
        EPWM_setTimeBasePeriod(obj->sstpwmHandle, pwmPeriodCycles);
    #endif  //SST_ENABLE
    
        // enable the ePWM module time base clock sync signal
        SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_TBCLKSYNC);
    
        return;
    }  // end of HAL_setupPWMs() function
    
    
    #if defined(EPWMDAC_MODE)
    void HAL_setupPWMDACs(HAL_Handle handle,
                       const float32_t systemFreq_MHz)
    {
        HAL_Obj   *obj = (HAL_Obj *)handle;
    
        // PWMDAC frequency = 100kHz, calculate the period for pwm
        uint16_t  period_cycles = (uint16_t)(systemFreq_MHz *
                                      (float32_t)(1000.0f / HA_PWMDAC_FREQ_KHZ));
        uint16_t  cnt;
    
        for(cnt = 0; cnt < 4; cnt++)
        {
            // setup the Time-Base Control Register (TBCTL)
            EPWM_setTimeBaseCounterMode(obj->pwmDACHandle[cnt],
                                        EPWM_COUNTER_MODE_UP);
    
            EPWM_disablePhaseShiftLoad(obj->pwmDACHandle[cnt]);
    
            EPWM_setPeriodLoadMode(obj->pwmDACHandle[cnt], EPWM_PERIOD_DIRECT_LOAD);
    
            EPWM_enableSyncOutPulseSource(obj->pwmDACHandle[cnt],
                                          EPWM_SYNC_OUT_PULSE_ON_SOFTWARE);
    
            EPWM_setClockPrescaler(obj->pwmDACHandle[cnt], EPWM_CLOCK_DIVIDER_1,
                                     EPWM_HSCLOCK_DIVIDER_1);
    
            EPWM_setCountModeAfterSync(obj->pwmDACHandle[cnt],
                                       EPWM_COUNT_MODE_UP_AFTER_SYNC);
    
            EPWM_setEmulationMode(obj->pwmDACHandle[cnt], EPWM_EMULATION_FREE_RUN);
    
            // setup the Timer-Based Phase Register (TBPHS)
            EPWM_setPhaseShift(obj->pwmDACHandle[cnt], 0);
    
            // setup the Time-Base Counter Register (TBCTR)
            EPWM_setTimeBaseCounter(obj->pwmDACHandle[cnt], 0);
    
            // setup the Time-Base Period Register (TBPRD)
            // set to zero initially
            EPWM_setTimeBasePeriod(obj->pwmDACHandle[cnt], 0);
    
            // setup the Counter-Compare Control Register (CMPCTL)
            EPWM_setCounterCompareShadowLoadMode(obj->pwmDACHandle[cnt],
                                                 EPWM_COUNTER_COMPARE_A,
                                                 EPWM_COMP_LOAD_ON_CNTR_ZERO);
    
            // setup the Action-Qualifier Output A Register (AQCTLA)
            EPWM_setActionQualifierAction(obj->pwmDACHandle[cnt],
                                          EPWM_AQ_OUTPUT_A,
                                          EPWM_AQ_OUTPUT_LOW,
                                          EPWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPA);
    
            EPWM_setActionQualifierAction(obj->pwmDACHandle[cnt],
                                          EPWM_AQ_OUTPUT_A,
                                          EPWM_AQ_OUTPUT_HIGH,
                                          EPWM_AQ_OUTPUT_ON_TIMEBASE_ZERO);
    
            // setup the Action-Qualifier Output B Register (AQCTLB)
            EPWM_setActionQualifierAction(obj->pwmDACHandle[cnt],
                                          EPWM_AQ_OUTPUT_B,
                                          EPWM_AQ_OUTPUT_LOW,
                                          EPWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPB);
    
            EPWM_setActionQualifierAction(obj->pwmDACHandle[cnt],
                                          EPWM_AQ_OUTPUT_B,
                                          EPWM_AQ_OUTPUT_HIGH,
                                          EPWM_AQ_OUTPUT_ON_TIMEBASE_ZERO);
    
    
            // setup the Dead-Band Generator Control Register (DBCTL)
            EPWM_setDeadBandDelayMode(obj->pwmDACHandle[cnt], EPWM_DB_RED, false);
    
            EPWM_setDeadBandDelayMode(obj->pwmDACHandle[cnt], EPWM_DB_FED, false);
    
            // setup the PWM-Chopper Control Register (PCCTL)
            EPWM_disableChopper(obj->pwmDACHandle[cnt]);
    
            // setup the Trip Zone Select Register (TZSEL)
            EPWM_disableTripZoneSignals(obj->pwmDACHandle[cnt], HAL_TZSEL_SIGNALS_ALL);
    
            // since the PWM is configured as an up/down counter, the period
            // register is set to one-half of the desired PWM period
            EPWM_setTimeBasePeriod(obj->pwmDACHandle[cnt], period_cycles);
        }
    
        return;
    }  // end of HAL_setupPWMDACs() function
    #endif // EPWMDAC_MODE
    
    
    #ifdef QEP_ENABLE
    void HAL_setupQEP(HAL_MTR_Handle handle)
    {
        HAL_MTR_Obj   *obj = (HAL_MTR_Obj *)handle;
    
        // Configure the decoder for quadrature count mode, counting both
        // rising and falling edges (that is, 2x resolution), QDECCTL
        EQEP_setDecoderConfig(obj->qepHandle, (EQEP_CONFIG_2X_RESOLUTION |
                                               EQEP_CONFIG_QUADRATURE |
                                               EQEP_CONFIG_NO_SWAP) );
    
        EQEP_setEmulationMode(obj->qepHandle, EQEP_EMULATIONMODE_RUNFREE);
    
        // Configure the position counter to be latched on a unit time out
        // and latch on rising edge of index pulse
        EQEP_setLatchMode(obj->qepHandle, (EQEP_LATCH_RISING_INDEX |
                                           EQEP_LATCH_UNIT_TIME_OUT) );
    
        EQEP_setPositionCounterConfig(obj->qepHandle, EQEP_POSITION_RESET_MAX_POS,
                                 (uint32_t)((4 * USER_MOTOR1_NUM_ENC_SLOTS) - 1));
    
    #if defined(ENC_UVW)
        EQEP_setInitialPosition(obj->qepHandle, USER_MOTOR1_ENC_POS_OFFSET);
    
        EQEP_setPositionInitMode(obj->qepHandle, EQEP_INIT_RISING_INDEX);
    #endif
    
        // Enable the unit timer, setting the frequency to 10KHz
        // QUPRD, QEPCTL
        EQEP_enableUnitTimer(obj->qepHandle, (USER_M1_QEP_UNIT_TIMER_TICKS - 1));
    
        // Disables the eQEP module position-compare unit
        EQEP_disableCompare(obj->qepHandle);
    
        // Configure and enable the edge-capture unit. The capture clock divider is
        // SYSCLKOUT/128. The unit-position event divider is QCLK/32.
        EQEP_setCaptureConfig(obj->qepHandle, EQEP_CAPTURE_CLK_DIV_128,
                                              EQEP_UNIT_POS_EVNT_DIV_32);
    
        // Enable QEP edge-capture unit
        EQEP_enableCapture(obj->qepHandle);
    
        // Enable UTO on QEP
        EQEP_enableInterrupt(obj->qepHandle, EQEP_INT_UNIT_TIME_OUT);
    
        // Enable the eQEP module
        EQEP_enableModule(obj->qepHandle);
    
        return;
    }
    #endif  // QEP_ENABLE
    
    
    void HAL_setupSCIA(HAL_Handle halHandle)
    {
        HAL_Obj *obj = (HAL_Obj *)halHandle;
    
        // Initialize SCIA and its FIFO.
        SCI_performSoftwareReset(obj->sciHandle);
    
        // Configure SCIA for echoback.
        SCI_setConfig(obj->sciHandle, DEVICE_LSPCLK_FREQ, 9600,
                            ( SCI_CONFIG_WLEN_8 |
                              SCI_CONFIG_STOP_ONE |
                              SCI_CONFIG_PAR_NONE ) );
    
        SCI_resetChannels(obj->sciHandle);
    
        SCI_resetRxFIFO(obj->sciHandle);
    
        SCI_resetTxFIFO(obj->sciHandle);
    
        SCI_clearInterruptStatus(obj->sciHandle, SCI_INT_TXFF | SCI_INT_RXFF);
    
        SCI_enableFIFO(obj->sciHandle);
    
        SCI_enableModule(obj->sciHandle);
    
        SCI_performSoftwareReset(obj->sciHandle);
    
        return;
    }  // end of DRV_setupSci() function
    
    
    void HAL_setupI2CA(HAL_Handle halHandle)
    {
        HAL_Obj *obj = (HAL_Obj *)halHandle;
    
        // Must put I2C into reset before configuring it
        I2C_disableModule(obj->i2cHandle);
    
        // I2C configuration. Use a 400kHz I2CCLK with a 50% duty cycle.
        I2C_initMaster(obj->i2cHandle, DEVICE_SYSCLK_FREQ, 400000, I2C_DUTYCYCLE_50);
        I2C_setConfig(obj->i2cHandle, I2C_MASTER_SEND_MODE);
        I2C_setSlaveAddress(obj->i2cHandle, I2C_SLAVE_ADDRESS);
        I2C_disableLoopback(obj->i2cHandle);
        I2C_setBitCount(obj->i2cHandle, I2C_BITCOUNT_8);
        I2C_setDataCount(obj->i2cHandle, 2);
        I2C_setAddressMode(obj->i2cHandle, I2C_ADDR_MODE_7BITS);
    
        // Enable stop condition and register-access-ready interrupts
    //    I2C_enableInterrupt(obj->i2cHandle, I2C_INT_STOP_CONDITION |
    //                                        I2C_INT_REG_ACCESS_RDY);
    
        I2C_enableInterrupt(obj->i2cHandle, I2C_INT_ADDR_SLAVE |
                                            I2C_INT_ARB_LOST |
                                            I2C_INT_NO_ACK |
                                            I2C_INT_STOP_CONDITION);
    
        // FIFO configuration
        I2C_enableFIFO(obj->i2cHandle);
        I2C_setFIFOInterruptLevel(obj->i2cHandle, I2C_FIFO_TXEMPTY, I2C_FIFO_RX2);
    
    //    I2C_clearInterruptStatus(obj->i2cHandle, I2C_INT_RXFF | I2C_INT_TXFF);
        I2C_clearInterruptStatus(obj->i2cHandle, I2C_INT_ARB_LOST | I2C_INT_NO_ACK);
    
        // Configuration complete. Enable the module.
        I2C_setEmulationMode(obj->i2cHandle, I2C_EMULATION_FREE_RUN);
        I2C_enableModule(obj->i2cHandle);
    
        return;
    }  // end of HAL_setupI2CA() function
    
    
    void HAL_setupTimeBaseTimer(HAL_Handle handle, const float32_t timeBaseFreq_Hz)
    {
        HAL_Obj  *obj = (HAL_Obj *)handle;
    
        uint32_t timerPeriod = (uint32_t)((USER_SYSTEM_FREQ_MHz * 1000.0f *1000.0f) /
                                          timeBaseFreq_Hz);
    
        // use timer 0 for CPU usage diagnostics
        CPUTimer_setPreScaler(obj->timerHandle[0], 0);
    
        CPUTimer_setEmulationMode(obj->timerHandle[0],
                                  CPUTIMER_EMULATIONMODE_RUNFREE);
    
        CPUTimer_setPeriod(obj->timerHandle[0], timerPeriod);
    
        CPUTimer_startTimer(obj->timerHandle[0]);
    
        return;
    }  // end of HAL_setupTimeBaseTimer() function
    
    
    void HAL_setupADCTriggerTimer(HAL_Handle handle, const float32_t adcTriggerFreq_Hz)
    {
        HAL_Obj  *obj = (HAL_Obj *)handle;
    
        uint32_t timerPeriod = (uint32_t)((USER_SYSTEM_FREQ_MHz * 1000.0f *1000.0f) /
                                          adcTriggerFreq_Hz);
    
        // use timer 1 for CPU usage diagnostics
        CPUTimer_setPreScaler(obj->timerHandle[1], 0);
    
        CPUTimer_setEmulationMode(obj->timerHandle[1],
                                  CPUTIMER_EMULATIONMODE_RUNFREE);
    
        CPUTimer_setPeriod(obj->timerHandle[1], timerPeriod);
    
        CPUTimer_enableInterrupt(obj->timerHandle[1]);
    
        CPUTimer_startTimer(obj->timerHandle[1]);
    
        return;
    }  // end of HAL_setupADCTriggerTimer() function
    
    
    void HAL_setupCPUUsageTimer(HAL_Handle handle)
    {
        HAL_Obj  *obj = (HAL_Obj *)handle;
    
        // use timer 2 for CPU usage diagnostics
        CPUTimer_setPreScaler(obj->timerHandle[2], 0);
    
        CPUTimer_setEmulationMode(obj->timerHandle[2],
                                  CPUTIMER_EMULATIONMODE_RUNFREE);
    
        CPUTimer_setPeriod(obj->timerHandle[2], 0xFFFFFFFF);
    
        CPUTimer_startTimer(obj->timerHandle[2]);
    
        return;
    }  // end of HAL_setupCPUUsageTimer() function
    
    #if defined(DATALOGF2_EN)
    void HAL_setupDMAforDLOG(HAL_Handle handle, const uint16_t dmaChNum,
                              const void *destAddr, const void *srcAddr)
    {
        HAL_Obj *obj = (HAL_Obj *)handle;
        DMA_configAddresses(obj->dmaChHandle[dmaChNum], destAddr, srcAddr);
    
        // configure DMA Channel
        DMA_configBurst(obj->dmaChHandle[dmaChNum], DLOG_BURST_SIZE, 2, 2);
    //    DMA_configBurst(obj->dmaChHandle[dmaChNum], DLOG_BURST_SIZE, 1, 1);
        DMA_configTransfer(obj->dmaChHandle[dmaChNum], DLOG_TRANSFER_SIZE, 1, 1);
        DMA_configWrap(obj->dmaChHandle[dmaChNum], 0xFFFF, 0, 0xFFFF, 0);
    
        DMA_configMode(obj->dmaChHandle[dmaChNum], DMA_TRIGGER_SOFTWARE,
                       DMA_CFG_ONESHOT_ENABLE | DMA_CFG_CONTINUOUS_ENABLE |
                       DMA_CFG_SIZE_32BIT);
    
        DMA_setInterruptMode(obj->dmaChHandle[dmaChNum], DMA_INT_AT_END);
        DMA_enableTrigger(obj->dmaChHandle[dmaChNum]);
        DMA_disableInterrupt(obj->dmaChHandle[dmaChNum]);
    
        return;
    }    //end of HAL_setupDMAforDLOG() function
    #endif  // DATALOGF2_EN
    
    void HAL_clearDataRAM(void *pMemory, uint16_t lengthMemory)
    {
        uint16_t *pMemoryStart;
        uint16_t loopCount, loopLength;
    
        pMemoryStart = pMemory;
        loopLength = lengthMemory;
    
        for(loopCount = 0; loopCount < loopLength; loopCount++)
        {
            *(pMemoryStart + loopCount) = 0x0000;
        }
    }   //end of HAL_clearDataRAM() function
    
    
    void HAL_setupDMA(void)
    {
        // Initializes the DMA controller to a known state
        DMA_initController();
    
        // Sets DMA emulation mode, Continue DMA operation
        DMA_setEmulationMode(DMA_EMULATION_FREE_RUN);
    
        return;
    }    //end of HAL_setupDMA() function
    
    
    void HAL_setMtrCMPSSDACValue(HAL_MTR_Handle handle,
                                 const uint16_t dacValH, const uint16_t dacValL)
    {
        HAL_MTR_Obj *obj = (HAL_MTR_Obj *)handle;
    
    #if defined(MOTOR1_ISBLDC) || defined(MOTOR1_DCLINKSS)
    #if defined(BSXL8323RS_REVA) || defined(BSXL8323RH_REVB)
        CMPSS_setDACValueLow(obj->cmpssHandle[0], dacValL);
    #else
    #error This board doesn't support single shunt
    #endif  // BSXL8323RS_REVA || BSXL8323RH_REVB
    #else   // !(MOTOR1_ISBLDC || MOTOR1_DCLINKSS)
    #if defined(HVMTRPFC_REV1P1)
        CMPSS_setDACValueHigh(obj->cmpssHandle[0], dacValH);
    
        CMPSS_setDACValueHigh(obj->cmpssHandle[1], dacValH);
        CMPSS_setDACValueLow(obj->cmpssHandle[1], dacValL);
    
        CMPSS_setDACValueLow(obj->cmpssHandle[2], dacValL);
    #else   //!HVMTRPFC_REV1P1
        CMPSS_setDACValueHigh(obj->cmpssHandle[0], dacValH);
        CMPSS_setDACValueLow(obj->cmpssHandle[0], dacValL);
    
        CMPSS_setDACValueHigh(obj->cmpssHandle[1], dacValH);
        CMPSS_setDACValueLow(obj->cmpssHandle[1], dacValL);
    
        CMPSS_setDACValueHigh(obj->cmpssHandle[2], dacValH);
        CMPSS_setDACValueLow(obj->cmpssHandle[2], dacValL);
    #endif  //!HVMTRPFC_REV1P1
    #endif  // !(MOTOR1_ISBLDC || MOTOR1_DCLINKSS)
    
        return;
    }
    
    
    void HAL_setTriggerPrams(HAL_PWMData_t *pPWMData, const float32_t systemFreq_MHz,
                       const float32_t deadband_us, const float32_t noiseWindow_us)
    {
        uint16_t deadband =  (uint16_t)(deadband_us * systemFreq_MHz);
        uint16_t noiseWindow =  (uint16_t)(noiseWindow_us * systemFreq_MHz);
    
        pPWMData->deadband = deadband;
        pPWMData->noiseWindow = noiseWindow;
    
        pPWMData->minCMPValue = deadband + noiseWindow + 33;
    
        return;
    }
    
    //*****************************************************************************
    //
    // Error handling function to be called when an ASSERT is violated
    //
    //*****************************************************************************
    void __error__(char *filename, uint32_t line)
    {
        //
        // An ASSERT condition was evaluated as false. You can use the filename and
        // line parameters to determine what went wrong.
        //
        ESTOP0;
    }
    // end of file
    

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    因此,当调用 SPI_writeDataBlockingNonFIFO()时,除了 CS 和 MOSI 外,实际上不会在引脚上看到任何活动被拉低?

    我看不到有关这些配置的任何信息。 您是否介意共享 SPI A 寄存器的屏幕截图? drvicHandle 指向的对象的内容吗?

    谢谢、

    惠特尼

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    CCS 不允许我将  drvicHandle 添加 到观察表达式。

    drvVarsHandle 的另一个屏幕截图。

    SPIA 寄存器屏幕截图:

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    您能否找到代码中调用 HAL_setupSPI()的位置? 我不希望所有这些 SPI 寄存器都像这样设置为零。

    惠特尼

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    同时确认 spiHandle 指向 SPI A、而未错误地设置为 SPI B

    惠特尼

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    hal.c 中正在调用 HAL_setupSPI()(附加在先前的帖子中)。 实际上、所有3个 SPI 寄存器都设置为零。

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

     如果您在 HAL_setupSPI 中放置一个断点、您可以确认是否正在执行该断点? 您能否单步执行并观察 SPI A 寄存器是否已配置?

    惠特尼

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    SPI 句柄位于 hal.c 中

    //初始化 SPI 句柄
    obj->spiHandle = MTR1_SPI_base;//!< SPI 句柄

    该宏在 hal.h 中定义

    #define MTR1_SPI_base       SPIA_BASE

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    如果看不到 HAL_setupSPI 函数成功配置 SPI 寄存器,您是否还能再次检查 HAL_setupPeripheralClks ()并确保它启用 SPI 模块的时钟?

    惠特尼

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

      HAL_setupSPI (handle)调用 HAL_setupSPI (HAL_MTR_Handle handle)。 但是、通过  HAL_setupSPI 单步执行不会更新 SPI 寄存器。 运行该程序后,它会卡在 DRV8323_readSPI()函数内的 while 循环中(以红色突出显示)。

    uint16_t DRV8323_readSPI (DRV8323_Handle handle、
    const DRV8323_Address_e regAddr)

    DRV8323_Obj * obj =(DRV8323_Obj *)句柄;
    uint16_t ctrlWord;
    uint16_t n;
    const uint16_t data = 0;
    volatile uint16_t readWord;
    volatile uint16_t WaitTimeOut = 0;

    易失性 SPI_RxFIFOLevel RxFifoCnt = SPI_FIFO_RXEMPTY;

    //构建控制字
    ctrlWord =(uint16_t) DRV8323_buildCtrlWord (DRV8323_CTRLMODE_READ、regAddr、DATA);

    #IF 定义(DRV_CS_GPIO)
    GPIO_writePin (obj->gpioNumber_CS、0);
    GPIO_writePin (obj->gpioNumber_CS、0);
    #endif // DRV_CS_GPIO

    //等待寄存器更新
    对于(n = 0;n < 0x08;n++)

    _asm (" NOP");

    //将 Rx FIFO 指针重置为零
    spi_resetRxFIFO (obj->spiHandle);
    spi_enableFIFO (obj->spiHandle);

    //等待寄存器更新
    对于(n = 0;n < 0x20;n++)

    _asm (" NOP");

    //编写命令
    spi_writeDataBlockingNonFIFO (obj->spiHandle、ctrlWord);

    //等待两个字填充 RX FIFO,否则将发生等待超时
    while (RxFifoCnt < SPI_FIFO_RX1)

    RxFifoCnt = SPI_getRxFIFOStatus (obj->spiHandle);

    if (++WaitTimeOut > 0xFFe)

    obj->rxTimeOut = true;

    WaitTimeOut = 0xFFFF;

    //等待寄存器更新
    对于(n = 0;n < 0x100;n++)

    _asm (" NOP");

    #IF 定义(DRV_CS_GPIO)
    GPIO_writePin (obj->gpioNumber_CS、1);
    GPIO_writePin (obj->gpioNumber_CS、1);
    #endif // DRV_CS_GPIO

    //阅读该词
    readWord = SPI_readDataNonBlocking (obj->spiHandle);

    return (readWord 和 DRV8323_DATA_MASK);
    }// DRV8323_readSPI()函数结束

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    好的、不能配置寄存器通常是 PCLKCRx 位没有被置位的问题。 您能否检查 CpuSysRegs.PCLKCR8寄存器并查看 SPI A 位是否已设置? 这应该在 HAL_setupPeripheralClks()函数中完成,正如我提到的那样。

    惠特尼

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    感谢 Whitney! 时钟确实是问题所在。 感谢您的所有帮助。