大家好、
我对 TMS320F28055控制器上的 ADC 有疑问。 我将一个100千欧姆电位器(3.3V)连接到 ADC。 出于测试目的、我采用了 TI 的示例。 我想在计时器中断时触发 ADC、因此我设置位 AdcRegs.ADCSOC0CTL.bit.TRIGSEL = 1、1是计时器0如果我像示例中那样运行程序、我还可以在调试模式下看到 ADCRESULT0值发生变化。 是否有人知道为什么值在我尚未初始化 Timer0的情况下发生变化? 另一个问题是如何触发我的 ADC 中断? 我在调试模式中看到、完全不调用中断、但 ADCRESULT0值发生变化。 当我将电位计一直向上转动时、我只看到值3796、这是否意味着 ADC 校准不正确? 很抱歉有很多问题、但这是我第一次将 ADC 与 TI 控制器搭配使用。
感谢你的帮助
// Included Files // #include "DSP28x_Project.h" // Device Headerfile and Examples Include File // // Function Prototypes // __interrupt void adc_isr(void); // // Global variables // Uint16 LoopCount; Uint16 ConversionCount; Uint16 Voltage1[10] = {0,0,0,0,0,0,0,0,0,0}; Uint16 Voltage2[10]; main() { // // Step 1. Initialize System Control: // PLL, WatchDog, enable Peripheral Clocks // This example function is found in the F2805x_SysCtrl.c file. // InitSysCtrl(); // // Step 2. Initialize GPIO: // This example function is found in the F2805x_Gpio.c file and // illustrates how to set the GPIO to it's default state. // // InitGpio(); // Skipped for this example // // Step 3. Clear all interrupts and initialize PIE vector table: // Disable CPU interrupts // DINT; // // Initialize the PIE control registers to their default state. // The default state is all PIE interrupts disabled and flags // are cleared. // This function is found in the F2805x_PieCtrl.c file. // InitPieCtrl(); // // Disable CPU interrupts and clear all CPU interrupt flags // IER = 0x0000; IFR = 0x0000; // // Initialize the PIE vector table with pointers to the shell Interrupt // Service Routines (ISR). // This will populate the entire table, even if the __interrupt // is not used in this example. This is useful for debug purposes. // The shell ISR routines are found in F2805x_DefaultIsr.c. // This function is found in F2805x_PieVect.c. // InitPieVectTable(); // // Interrupts that are used in this example are re-mapped to // ISR functions found within this file. // EALLOW; // This is needed to write to EALLOW protected register PieVectTable.ADCINT1 = &adc_isr; EDIS; // This is needed to disable write to EALLOW protected registers // // Step 4. Initialize all the Device Peripherals: // InitAdc(); // For this example, init the ADC AdcOffsetSelfCal(); // // Step 5. User specific code, enable __interrupts: // // Enable ADCINT1 in PIE // PieCtrlRegs.PIEIER1.bit.INTx1 = 1; // Enable INT 1.1 in the PIE IER |= M_INT1; // Enable CPU Interrupt 1 EINT; // Enable Global __interrupt INTM ERTM; // Enable Global realtime __interrupt DBGM LoopCount = 0; ConversionCount = 0; // // Configure ADC // Notes: // Channel ADCINA4 will be double sampled to workaround the ADC 1st // sample issue for rev0 silicon errata. // Due to round-robin, SOC0 converts first, then SOC1, then SOC2 // EALLOW; AdcRegs.ADCCTL1.bit.INTPULSEPOS= 1; //ADCINT1 trips after AdcResults latch AdcRegs.INTSEL1N2.bit.INT1E = 1; //Enabled ADCINT1 AdcRegs.INTSEL1N2.bit.INT1CONT = 0; //Disable ADCINT1 Continuous mode AdcRegs.INTSEL1N2.bit.INT1SEL = 2; //setup EOC2 to trigger ADCINT1 AdcRegs.ADCSOC0CTL.bit.CHSEL = 4; //set SOC0 channel select to ADCINA4 // AdcRegs.ADCSOC1CTL.bit.CHSEL = 4; //set SOC1 channel select to ADCINA4 // AdcRegs.ADCSOC2CTL.bit.CHSEL = 2; //set SOC2 channel select to ADCINA2 AdcRegs.ADCSOC0CTL.bit.TRIGSEL = 1; //TIMER0 //set SOC0 start trigger on EPWM1A // AdcRegs.ADCSOC1CTL.bit.TRIGSEL = 5; //set SOC1 start trigger on EPWM1A // AdcRegs.ADCSOC2CTL.bit.TRIGSEL = 5; //set SOC2 start trigger on EPWM1A AdcRegs.ADCSOC0CTL.bit.ACQPS = 9; //SOC0 S/H Window = 10 (9+1) Clk Cycles SAMPLE Size // AdcRegs.ADCSOC1CTL.bit.ACQPS = 9; //SOC0 S/H Window = 10 (9+1) Clk Cycles // AdcRegs.ADCSOC2CTL.bit.ACQPS = 9; //SOC0 S/H Window = 10 (9+1) Clk Cycles EDIS; // // Wait for ADC __interrupt // for(;;) { LoopCount++; } } __interrupt void adc_isr(void) { // //Discard ADCRESULT0 as part of the workaround to rev0's 1st sample errata // Voltage1[ConversionCount] = AdcResult.ADCRESULT0; // Voltage2[ConversionCount] = AdcResult.ADCRESULT2; // // If 10 conversions have been logged, start over // if(ConversionCount == 9) { ConversionCount = 0; } else { ConversionCount++; } // // Clear ADCINT1 flag reinitialize for next SOC // AdcRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; // Acknowledge __interrupt to PIE return; }