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https://e2e.ti.com/support/clock-timing-group/clock-and-timing/f/clock-timing-forum/1164888/lmk04832-sp-state-of-clkout-interfaces
您好，加电或复位期间具有 LVDS 输出的 CLKOUT/CLKOUT*引脚的状态是什么？ 它们是否处于高阻态？
尊敬的 Jack：
如数据表(第51/52页)所示、在发生上电复位(POR)事件时、无论输出格式如何、器件都将断电。 希望这对您有所帮助。
祝你好运、
Andrea
