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我想通过 TISCI API 修改 TDA4VM 上 R5F 内核的工作频率、请参阅相关常见问题解答(8.8. 常见问题-如何 在 SDK 中设置给定模块和时钟的时钟,并尝试编写类似的程序,但我失败了。
例如、我考虑将 MCU 域上 R5F Core1的工作频率设置为800MHz、并且根据常见问题解答中的示例、我编写了以下程序:
// check freq of MCU_R5FSS0_CORE1
uint64_t currentFreq = 0;
get_status = Sciclient_pmGetModuleClkFreq(
TISCI_DEV_MCU_R5FSS0_CORE1,
TISCI_DEV_MCU_R5FSS0_CORE1_CPU_CLK,
¤tFreq,
SCICLIENT_SERVICE_WAIT_FOREVER);
// 800MHZ
uint64_t reqFreqHz = 800000000;
uint64_t respFreqHz = 0;
// query 800MHZ
query_status = Sciclient_pmQueryModuleClkFreq(
TISCI_DEV_MCU_R5FSS0_CORE1,
TISCI_DEV_MCU_R5FSS0_CORE1_CPU_CLK,
reqFreqHz,
&respFreqHz,
SCICLIENT_SERVICE_WAIT_FOREVER);
// set 800MHZ
set_status = Sciclient_pmSetModuleClkFreq(
TISCI_DEV_MCU_R5FSS0_CORE1,
TISCI_DEV_MCU_R5FSS0_CORE1_CPU_CLK,
800000000,
TISCI_MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE,
SCICLIENT_SERVICE_WAIT_FOREVER);
// check set result
checkFreq = 0;
check_status = Sciclient_pmGetModuleClkFreq(
TISCI_DEV_MCU_R5FSS0_CORE1,
TISCI_DEV_MCU_R5FSS0_CORE1_CPU_CLK,
&checkFreq,
SCICLIENT_SERVICE_WAIT_FOREVER);
运行程序后、我得到以下返回值:
get_status = CSL_PASS; // 1 GHZ currentFreq = 1000000000; query_status = CSL_PASS; respFreqHz = 0; set_status = CSL_EFAIL;
硬件:
-
SoC:TDA4VM
-
开发板: J721EXCPXEVM 和 J721EXSOMXEVM
软件 SDK 版本:
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <ti/csl/arch/csl_arch.h>
#include <ti/csl/hw_types.h>
#include <ti/csl/soc.h>
#include <ti/drv/sciclient/examples/common/sci_app_common.h>
#include <ti/drv/sciclient/sciclient.h>
#include <ti/drv/sciclient/soc/sysfw/include/j721e/tisci_clocks.h>
#include <ti/drv/sciclient/soc/sysfw/include/j721e/tisci_devices.h>
int main(void) {
SciApp_consoleInit();
Sciclient_ConfigPrms_t config = {SCICLIENT_SERVICE_OPERATION_MODE_POLLED,
NULL};
int32_t status = CSL_PASS;
status = Sciclient_init(&config);
if (status != CSL_PASS) {
SciApp_printf("SCIClient Init Failed\nstatus: %d", status);
return 0;
}
uint64_t currentFreq = 0;
int32_t get_status = CSL_PASS;
get_status = Sciclient_pmGetModuleClkFreq(
TISCI_DEV_MCU_R5FSS0_CORE1, TISCI_DEV_MCU_R5FSS0_CORE1_CPU_CLK,
¤tFreq, SCICLIENT_SERVICE_WAIT_FOREVER);
if (get_status != CSL_PASS) {
SciApp_printf("Sciclient_pmGetModuleClkFreq Failed\nstatus: %d",
get_status);
return 0;
}
SciApp_printf("MCU_R5FSS0_CORE1 init Freq: %u HZ\n", currentFreq);
uint64_t reqFreqHz = 800000000;
uint64_t respFreqHz = 0;
int32_t query_status = CSL_PASS;
query_status = Sciclient_pmQueryModuleClkFreq(
TISCI_DEV_MCU_R5FSS0_CORE1, TISCI_DEV_MCU_R5FSS0_CORE1_CPU_CLK, reqFreqHz,
&respFreqHz, SCICLIENT_SERVICE_WAIT_FOREVER);
if (query_status != CSL_PASS) {
SciApp_printf("Sciclient_pmQueryModuleClkFreq Failed\nstatus: %d",
query_status);
return 0;
}
//UART_printf cannot correctly display uint64_t data
SciApp_printf("MCU_R5FSS0_CORE1 respFreqHz: %u HZ\n", (uint32_t)respFreqHz);
int32_t set_status = CSL_PASS;
set_status = Sciclient_pmSetModuleClkFreq(
TISCI_DEV_MCU_R5FSS0_CORE1, TISCI_DEV_MCU_R5FSS0_CORE1_CPU_CLK, reqFreqHz,
TISCI_MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE, SCICLIENT_SERVICE_WAIT_FOREVER);
if (set_status != CSL_PASS) {
SciApp_printf("Sciclient_pmSetModuleClkFreq Failed\nstatus: %d",
set_status);
return 0;
}
get_status = CSL_PASS;
get_status = Sciclient_pmGetModuleClkFreq(
TISCI_DEV_MCU_R5FSS0_CORE1, TISCI_DEV_MCU_R5FSS0_CORE1_CPU_CLK,
¤tFreq, SCICLIENT_SERVICE_WAIT_FOREVER);
if (get_status != CSL_PASS) {
SciApp_printf("Sciclient_pmGetModuleClkFreq Failed\nstatus: %d",
get_status);
return 0;
}
SciApp_printf("MCU_R5FSS0_CORE1 Freq now: %u HZ\n", currentFreq);
return 0;
}