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[参考译文] TMS320C6474:芯片掩码必须为2n 模?

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Other Parts Discussed in Thread: TMS320C6474
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https://e2e.ti.com/support/processors-group/processors/f/processors-forum/727111/tms320c6474-chipmask-must-be-2n-modulo

器件型号:TMS320C6474
您好、香榭丽舍

客户在 TMS320C6474上使用了具有  FSYNC 功能的 AIF 接口。

configMaskTrigger[1].timerUsed = CSL_FSYNC_RP3_TIMER;

configMaskTrigger[1].eventGenUsed = CSL_FSYNC_TRIGGER_GEN_4;
CONFIGMaskTrigger[1].mask.frameMask = 0;
CONFIGMaskTrigger[1].MASk.slotMask = 0;
CONFIGMaskTrigger[1].mask.chipTerminalCountIndexMask = 0;
CONFIGMaskTrigger[1].mask.chipMask = 0x7;
configMaskTrigger[1].mask.sampleMask = 0xFF;

// configMaskTrigger[1].offset.frameOffset = 0;//无关字段  
CONFIGMaskTrigger[1].offset.slotOffset = 1; CONFIGMaskTrigger[1].offset.chipTerminalCountIndex = 0;  
configMaskTrigger[1].offset.chipOffset = 11;  
configMaskTrigger[1].offset.sampleOffset = 0;  

configMaskTrigger[1].compareValue.slotValue = 0;
CONFIGMaskTrigger[1].compareValue.chipTerminalCountIndexValue = 0;//无关
configMaskTrigger[1].compareValue.chipValue =1;
configMaskTrigger[1].compareValue.sampleValue = 0;

configMaskTrigger[1].mask.chipMask 是否可以配置为16? 或者芯片掩码必须为 2n 模?

客户目前配置 了 configMaskTrigger[1].mask.chipMask = 16、他的代码到目前为止正常。

谢谢。
Rgds
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