Other Parts Discussed in Thread: MOTORWARE,
工程路径为C:\ti\motorware\motorware_1_01_00_18\sw\solutions\instaspin_foc\boards\boostxldrv8305_revA\f28x\f2802xF\projects\ccs\proj_lab11a
This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
工程路径为C:\ti\motorware\motorware_1_01_00_18\sw\solutions\instaspin_foc\boards\boostxldrv8305_revA\f28x\f2802xF\projects\ccs\proj_lab11a
你好,这个程序的加密跟普通工程一样啊,你可以选择直接在CCS里面的加密工具进行加密,也可以通过在工程中添加加密文件的方式加密。
通过这两种方式给这个程序加密后,重新上电后程序不能运行。我怀疑是这个程序的问题。你们能帮我试一下这个程序吗
是不加密的情况下程序也没办法上电运行吗?
如果是例程的话我这边也有,你可以告知一下修改了哪些代码。
不加密可以正常运行,加密后重新上电就没有反应。代码没有修改。你也帮忙试试吧,谢谢
都试过了,不行。用CCS里的加密工具也试了。你帮我试试吧,看你那边能不能成功
确实,我猜测应该是工程里面“#ifdef CSM_ENABLE”这部分预定义的关系,明天我会研究一下代码之后回复你。
你好,收到回复:
可以尝试一下在代码中加入如下语句:
1. In F28069F.cmd file
/* RAMM0 : origin = 0x000050, length = 0x0003B0 */ /* on-chip RAM block M0 */
/* RAMM1 : origin = 0x000400, length = 0x000400 */ /* on-chip RAM block M1 */
RAMM0_1 : origin = 0x000050, length = 0x0007B0 /* on-chip RAM block M0 */
.stack : > RAMM0_1, PAGE = 1
rom_accessed_data : > RAMM0_1 PAGE = 1
2. In lab files (lab02c.c or the other lab file)
CTRL_Handle ctrlHandle;
#pragma DATA_SECTION(ctrlHandle,"rom_accessed_data");
USER_Params gUserParams;
#pragma DATA_SECTION(gUserParams,"rom_accessed_data");
CTRL_Obj *controller_obj;
#pragma DATA_SECTION(controller_obj,"rom_accessed_data");
如上是工程师的回复,我这边还没测试过代码,你可以先尝试一下是否有效。
你好,抱歉漏贴了。
我这边测试了一下,按照我之前说的方法修改程序,再经过上面的cmd和lab02b中的修改之后,程序在加密的情况是可以正常运行的。
我今天把上面所有的步骤又重新测试了一下,几乎没有什么问题,按照我说的方法一步一步做就能实现包括离线运行和加密离线运行。
建议你再检查一下,是否有什么步骤遗漏的,如果还是不行,还请说明一下每一步的测试结果是怎么样的?特别是SW3和LD2的情况。
能不能把你改的给我看看。我改了TMS32F28027F的CMD文件,和lab11a。没有成功。
下面是28027F.CMD
/* // TI File $Revision: /main/7 $ // Checkin $Date: July 6, 2009 17:25:36 $ //########################################################################### // // FILE: F28027.cmd // // TITLE: Linker Command File For F28027 Device // //########################################################################### // $TI Release: 2802x C/C++ Header Files and Peripheral Examples V1.29 $ // $Release Date: January 11, 2011 $ //########################################################################### */ /* ====================================================== // For Code Composer Studio V2.2 and later // --------------------------------------- // In addition to this memory linker command file, // add the header linker command file directly to the project. // The header linker command file is required to link the // peripheral structures to the proper locations within // the memory map. // // The header linker files are found in <base>\DSP2802_Headers\cmd // // For BIOS applications add: DSP2802x_Headers_BIOS.cmd // For nonBIOS applications add: DSP2802x_Headers_nonBIOS.cmd ========================================================= */ /* ====================================================== // For Code Composer Studio prior to V2.2 // -------------------------------------- // 1) Use one of the following -l statements to include the // header linker command file in the project. The header linker // file is required to link the peripheral structures to the proper // locations within the memory map */ /* Uncomment this line to include file only for non-BIOS applications */ /* -l DSP2802x_Headers_nonBIOS.cmd */ /* Uncomment this line to include file only for BIOS applications */ /* -l DSP2802x_Headers_BIOS.cmd */ /* 2) In your project add the path to <base>\DSP2802x_headers\cmd to the library search path under project->build options, linker tab, library search path (-i). */ /*========================================================= */ /* Define the memory block start/length for the F28027 PAGE 0 will be used to organize program sections PAGE 1 will be used to organize data sections Notes: Memory blocks on F2802x are uniform (ie same physical memory) in both PAGE 0 and PAGE 1. That is the same memory region should not be defined for both PAGE 0 and PAGE 1. Doing so will result in corruption of program and/or data. The L0 memory block is mirrored - that is it can be accessed in high memory or low memory. For simplicity only one instance is used in this linker file. Contiguous SARAM memory blocks or flash sectors can be be combined if required to create a larger memory block. */ MEMORY { PAGE 0: /* Program Memory */ /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */ OTP : origin = 0x3D7800, length = 0x000400 /* on-chip OTP */ CSM_RSVD : origin = 0x3F7F80, length = 0x000076 /* Part of FLASHA. Program with all 0x0000 when CSM is in use. */ BEGIN : origin = 0x3F7FF6, length = 0x000002 /* Part of FLASHA. Used for "boot to Flash" bootloader mode. */ CSM_PWL_P0 : origin = 0x3F7FF8, length = 0x000008 /* Part of FLASHA. CSM password locations in FLASHA */ IQTABLES : origin = 0x3FE000, length = 0x000B50 /* IQ Math Tables in Boot ROM */ IQTABLES2 : origin = 0x3FEB50, length = 0x00008C /* IQ Math Tables in Boot ROM */ IQTABLES3 : origin = 0x3FEBDC, length = 0x0000AA /* IQ Math Tables in Boot ROM */ ROM : origin = 0x3FF27C, length = 0x000D44 /* Boot ROM */ RESET : origin = 0x3FFFC0, length = 0x000002 /* part of boot ROM */ VECTORS : origin = 0x3FFFC2, length = 0x00003E /* part of boot ROM */ FLASHB_D : origin = 0x3F0000, length = 0x006000 /* on-chip FLASH B, C and D */ D_FLASHA : origin = 0x3F6000, length = 0x001F80 /* on-chip FLASH A */ P_RAML0 : origin = 0x008000, length = 0x000980 /* on-chip PRAM block L0 */ PAGE 1 : /* Data Memory */ /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */ /* Registers remain on PAGE1 */ /* RAMM0 : origin = 0x000050, length = 0x0003B0 */ /* on-chip RAM block M0 */ /* RAMM1 : origin = 0x000400, length = 0x000400 */ /* on-chip RAM block M1 */ //RAMM0_1 : origin = 0x000050, length = 0x0007B0 /* on-chip RAM block M0 */ RAMM0_M1 : origin = 0x000000, length = 0x000600 /* on-chip RAM block M0 + M1. 0x600 to 0x800 reserved for InstaSPIN */ D_RAML0 : origin = 0x008980, length = 0x000680 /* on-chip DRAM block L0 */ } /* Allocate sections to memory blocks. Note: codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code execution when booting to flash ramfuncs user defined section to store functions that will be copied from Flash into RAM */ SECTIONS { /* Allocate program areas: */ .cinit : > FLASHB_D PAGE = 0 .pinit : > FLASHB_D, PAGE = 0 .text : > FLASHB_D PAGE = 0 codestart : > BEGIN PAGE = 0 ramfuncs : LOAD = FLASHB_D, RUN = P_RAML0, LOAD_START(_RamfuncsLoadStart), LOAD_END(_RamfuncsLoadEnd), RUN_START(_RamfuncsRunStart), PAGE = 0 csmpasswds : > CSM_PWL_P0 PAGE = 0 csm_rsvd : > CSM_RSVD PAGE = 0 /* Allocate uninitalized data sections: */ .stack : > D_RAML0 PAGE = 1 .ebss : > RAMM0_M1 PAGE = 1 .esysmem : > RAMM0_M1 PAGE = 1 ebss_extension : > P_RAML0 PAGE = 0 rom_accessed_data : > RAMM0_M1 PAGE = 1 vib_buf_data : > D_RAML0 PAGE = 1 graph_data : > D_RAML0 PAGE = 1 /* Initalized sections go in Flash */ /* For SDFlash to program these, they must be allocated to page 0 */ .econst : > D_FLASHA, PAGE = 0 .switch : > D_FLASHA, PAGE = 0 /* Allocate IQ math areas: */ IQmath : > FLASHB_D PAGE = 0 /* Math Code */ IQmathTables : > IQTABLES, PAGE = 0, TYPE = NOLOAD /* Uncomment the section below if calling the IQNexp() or IQexp() functions from the IQMath.lib library in order to utilize the relevant IQ Math table in Boot ROM (This saves space and Boot ROM is 1 wait-state). If this section is not uncommented, IQmathTables2 will be loaded into other memory (SARAM, Flash, etc.) and will take up space, but 0 wait-state is possible. */ /* IQmathTables2 : > IQTABLES2, PAGE = 0, TYPE = NOLOAD { IQmath.lib<IQNexpTable.obj> (IQmathTablesRam) } */ /* Uncomment the section below if calling the IQNasin() or IQasin() functions from the IQMath.lib library in order to utilize the relevant IQ Math table in Boot ROM (This saves space and Boot ROM is 1 wait-state). If this section is not uncommented, IQmathTables3 will be loaded into other memory (SARAM, Flash, etc.) and will take up space, but 0 wait-state is possible. */ /* IQmathTables3 : > IQTABLES3, PAGE = 0, TYPE = NOLOAD { IQmath.lib<IQNasinTable.obj> (IQmathTablesRam) } */ //.stack : > RAMM0_1, PAGE = 1 //rom_accessed_data : > RAMM0_1 PAGE = 1 /* .reset is a standard section used by the compiler. It contains the */ /* the address of the start of _c_int00 for C Code. */ /* When using the boot ROM this section and the CPU vector */ /* table is not needed. Thus the default type is set here to */ /* DSECT */ .reset : > RESET, PAGE = 0, TYPE = DSECT vectors : > VECTORS PAGE = 0, TYPE = DSECT } /* //=========================================================================== // End of file. //=========================================================================== */
你是用F28027F测试的?
我这边是用的F28069M的lab02b:C:\ti\motorware\motorware_1_01_00_18\sw\solutions\instaspin_foc\boards\drv8312kit_revD\f28x\f2806xF\projects\ccs\proj_lab02b
cmd文件修改如下:
/* //########################################################################### // // FILE: F28069.cmd // // TITLE: Linker Command File For F28069 Device // //########################################################################### // $TI Release: F2806x C/C++ Header Files and Peripheral Examples V135 $ // $Release Date: Sep 8, 2012 $ //########################################################################### */ /* ====================================================== // For Code Composer Studio V2.2 and later // --------------------------------------- // In addition to this memory linker command file, // add the header linker command file directly to the project. // The header linker command file is required to link the // peripheral structures to the proper locations within // the memory map. // // The header linker files are found in <base>\F2806x_headers\cmd // // For BIOS applications add: F2806x_Headers_BIOS.cmd // For nonBIOS applications add: F2806x_Headers_nonBIOS.cmd ========================================================= */ /* ====================================================== // For Code Composer Studio prior to V2.2 // -------------------------------------- // 1) Use one of the following -l statements to include the // header linker command file in the project. The header linker // file is required to link the peripheral structures to the proper // locations within the memory map */ /* Uncomment this line to include file only for non-BIOS applications */ /* -l F2806x_Headers_nonBIOS.cmd */ /* Uncomment this line to include file only for BIOS applications */ /* -l F2806x_Headers_BIOS.cmd */ /* 2) In your project add the path to <base>\F2806x_headers\cmd to the library search path under project->build options, linker tab, library search path (-i). */ /*========================================================= */ /* Define the memory block start/length for the F2806x PAGE 0 will be used to organize program sections PAGE 1 will be used to organize data sections Notes: Memory blocks on F28069 are uniform (ie same physical memory) in both PAGE 0 and PAGE 1. That is the same memory region should not be defined for both PAGE 0 and PAGE 1. Doing so will result in corruption of program and/or data. Contiguous SARAM memory blocks can be combined if required to create a larger memory block. */ MEMORY { PAGE 0 : /* Program Memory */ /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */ RAML0_1 : origin = 0x008000, length = 0x000C00 /* on-chip RAM block L0 and L1 */ OTP : origin = 0x3D7800, length = 0x000400 /* on-chip OTP */ FLASHH : origin = 0x3D8000, length = 0x004000 /* on-chip FLASH */ FLASHG : origin = 0x3DC000, length = 0x004000 /* on-chip FLASH */ FLASHF : origin = 0x3E0000, length = 0x004000 /* on-chip FLASH */ FLASHE : origin = 0x3E4000, length = 0x004000 /* on-chip FLASH */ FLASHD : origin = 0x3E8000, length = 0x004000 /* on-chip FLASH */ FLASHC : origin = 0x3EC000, length = 0x004000 /* on-chip FLASH */ FLASHA_B : origin = 0x3F0000, length = 0x007F80 /* on-chip FLASH */ CSM_RSVD : origin = 0x3F7F80, length = 0x000076 /* Part of FLASHA. Program with all 0x0000 when CSM is in use. */ BEGIN : origin = 0x3F7FF6, length = 0x000002 /* Part of FLASHA. Used for "boot to Flash" bootloader mode. */ CSM_PWL_P0 : origin = 0x3F7FF8, length = 0x000008 /* Part of FLASHA. CSM password locations in FLASHA */ FPUTABLES : origin = 0x3FD590, length = 0x0006A0 /* FPU Tables in Boot ROM */ IQTABLES : origin = 0x3FDC30, length = 0x000B50 /* IQ Math Tables in Boot ROM */ IQTABLES2 : origin = 0x3FE780, length = 0x00008C /* IQ Math Tables in Boot ROM */ IQTABLES3 : origin = 0x3FE80C, length = 0x0000AA /* IQ Math Tables in Boot ROM */ ROM : origin = 0x3FF3B0, length = 0x000C10 /* Boot ROM */ RESET : origin = 0x3FFFC0, length = 0x000002 /* part of boot ROM */ VECTORS : origin = 0x3FFFC2, length = 0x00003E /* part of boot ROM */ PAGE 1 : /* Data Memory */ /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */ /* Registers remain on PAGE1 */ BOOT_RSVD : origin = 0x000000, length = 0x000050 /* Part of M0, BOOT rom will use this for stack */ //RAMM0 : origin = 0x000050, length = 0x0003B0 /* on-chip RAM block M0 ——————————————————*/ //RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 ——————————————————*/ RAMM0_1 : origin = 0x000050, length = 0x0007B0 /* on-chip RAM block M0 ————————————————————*/ RAML2_3 : origin = 0x008C00, length = 0x001400 /* on-chip RAM block L2 */ RAML4 : origin = 0x00A000, length = 0x002000 /* on-chip RAM block L4 */ RAML5 : origin = 0x00C000, length = 0x002000 /* on-chip RAM block L5 */ RAML6 : origin = 0x00E000, length = 0x002000 /* on-chip RAM block L6 */ RAML7 : origin = 0x010000, length = 0x002000 /* on-chip RAM block L7 */ RAML8 : origin = 0x012000, length = 0x001800 /* on-chip RAM block L8. From 0x13800 to 0x14000 is reserved for InstaSPIN */ USB_RAM : origin = 0x040000, length = 0x000800 /* USB RAM */ } /* Allocate sections to memory blocks. Note: codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code execution when booting to flash ramfuncs user defined section to store functions that will be copied from Flash into RAM */ SECTIONS { /* Allocate program areas: */ .cinit : > FLASHA_B, PAGE = 0 .pinit : > FLASHA_B, PAGE = 0 .text : > FLASHA_B, PAGE = 0 codestart : > BEGIN, PAGE = 0 ramfuncs : LOAD = FLASHD, RUN = RAML0_1, LOAD_START(_RamfuncsLoadStart), LOAD_END(_RamfuncsLoadEnd), RUN_START(_RamfuncsRunStart), PAGE = 0 csmpasswds : > CSM_PWL_P0, PAGE = 0 csm_rsvd : > CSM_RSVD, PAGE = 0 /* Allocate uninitalized data sections: */ .stack : > RAMM0_1, PAGE = 1 .ebss : > RAML2_3, PAGE = 1 .esysmem : > RAML2_3, PAGE = 1 rom_accessed_data : > RAMM0_1 PAGE = 1 graph_data : > RAML2_3, PAGE = 1 /* Initalized sections to go in Flash */ /* For SDFlash to program these, they must be allocated to page 0 */ .econst : > FLASHA_B, PAGE = 0 .switch : > FLASHA_B, PAGE = 0 /* Allocate IQ math areas: */ IQmath : > FLASHA_B, PAGE = 0 /* Math Code */ IQmathTables : > IQTABLES, PAGE = 0, TYPE = NOLOAD /* Allocate FPU math areas: */ FPUmathTables : > FPUTABLES, PAGE = 0, TYPE = NOLOAD DMARAML5 : > RAML5, PAGE = 1 DMARAML6 : > RAML6, PAGE = 1 DMARAML7 : > RAML7, PAGE = 1 DMARAML8 : > RAML8, PAGE = 1 /* Uncomment the section below if calling the IQNexp() or IQexp() functions from the IQMath.lib library in order to utilize the relevant IQ Math table in Boot ROM (This saves space and Boot ROM is 1 wait-state). If this section is not uncommented, IQmathTables2 will be loaded into other memory (SARAM, Flash, etc.) and will take up space, but 0 wait-state is possible. */ /* IQmathTables2 : > IQTABLES2, PAGE = 0, TYPE = NOLOAD { IQmath.lib<IQNexpTable.obj> (IQmathTablesRam) } */ /* Uncomment the section below if calling the IQNasin() or IQasin() functions from the IQMath.lib library in order to utilize the relevant IQ Math table in Boot ROM (This saves space and Boot ROM is 1 wait-state). If this section is not uncommented, IQmathTables3 will be loaded into other memory (SARAM, Flash, etc.) and will take up space, but 0 wait-state is possible. */ /* IQmathTables3 : > IQTABLES3, PAGE = 0, TYPE = NOLOAD { IQmath.lib<IQNasinTable.obj> (IQmathTablesRam) } */ /* .reset is a standard section used by the compiler. It contains the */ /* the address of the start of _c_int00 for C Code. */ /* When using the boot ROM this section and the CPU vector */ /* table is not needed. Thus the default type is set here to */ /* DSECT */ .reset : > RESET, PAGE = 0, TYPE = DSECT vectors : > VECTORS, PAGE = 0, TYPE = DSECT } /* //=========================================================================== // End of file. //=========================================================================== */
以及lab02b.c修改如下:
/* --COPYRIGHT--,BSD * Copyright (c) 2012, Texas Instruments Incorporated * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * * Neither the name of Texas Instruments Incorporated nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * --/COPYRIGHT--*/ //! \file solutions/instaspin_foc/src/proj_lab02b.c //! \brief All control from user code, only FAST�feedback from ROM //! //! (C) Copyright 2011, Texas Instruments, Inc. //! \defgroup PROJ_LAB02B PROJ_LAB02B //@{ //! \defgroup PROJ_LAB02B_OVERVIEW Project Overview //! //! Run InstaSPIN�FOC from user memory (RAM/FLASH), only FAST�in ROM //! // ************************************************************************** // the includes // system includes #include <math.h> #include "main.h" #ifdef FLASH #pragma CODE_SECTION(mainISR,"ramfuncs"); #endif // Include header files used in the main function // ************************************************************************** // the defines #define LED_BLINK_FREQ_Hz 5 // ************************************************************************** // the globals uint_least16_t gCounter_updateGlobals = 0; bool Flag_Latch_softwareUpdate = true; CTRL_Handle ctrlHandle; #pragma DATA_SECTION(ctrlHandle,"rom_accessed_data"); //—————————————————————————— #ifdef CSM_ENABLE #pragma DATA_SECTION(halHandle,"rom_accessed_data"); #endif HAL_Handle halHandle; #ifdef CSM_ENABLE #pragma DATA_SECTION(gUserParams,"rom_accessed_data"); #endif USER_Params gUserParams; #pragma DATA_SECTION(gUserParams,"rom_accessed_data"); //—————————————————————————— HAL_PwmData_t gPwmData = {_IQ(0.0), _IQ(0.0), _IQ(0.0)}; HAL_AdcData_t gAdcData; _iq gMaxCurrentSlope = _IQ(0.0); #ifdef FAST_ROM_V1p6 CTRL_Obj *controller_obj; #pragma DATA_SECTION(controller_obj,"rom_accessed_data"); //———————————————————————— #else #ifdef CSM_ENABLE #pragma DATA_SECTION(ctrl,"rom_accessed_data"); #endif CTRL_Obj ctrl; //v1p7 format #endif uint16_t gLEDcnt = 0; volatile MOTOR_Vars_t gMotorVars = MOTOR_Vars_INIT; #ifdef FLASH // Used for running BackGround in flash, and ISR in RAM extern uint16_t *RamfuncsLoadStart, *RamfuncsLoadEnd, *RamfuncsRunStart; #ifdef F2802xF extern uint16_t *econst_start, *econst_end, *econst_ram_load; extern uint16_t *switch_start, *switch_end, *switch_ram_load; #endif #endif #ifdef DRV8301_SPI // Watch window interface to the 8301 SPI DRV_SPI_8301_Vars_t gDrvSpi8301Vars; #endif #ifdef DRV8305_SPI // Watch window interface to the 8305 SPI DRV_SPI_8305_Vars_t gDrvSpi8305Vars; #endif // ************************************************************************** // the functions void main(void) { uint_least8_t estNumber = 0; #ifdef FAST_ROM_V1p6 uint_least8_t ctrlNumber = 0; #endif // Only used if running from FLASH // Note that the variable FLASH is defined by the project #ifdef FLASH // Copy time critical code and Flash setup code to RAM // The RamfuncsLoadStart, RamfuncsLoadEnd, and RamfuncsRunStart // symbols are created by the linker. Refer to the linker files. memCopy((uint16_t *)&RamfuncsLoadStart,(uint16_t *)&RamfuncsLoadEnd,(uint16_t *)&RamfuncsRunStart); #ifdef CSM_ENABLE //copy .econst to unsecure RAM if(*econst_end - *econst_start) { memCopy((uint16_t *)&econst_start,(uint16_t *)&econst_end,(uint16_t *)&econst_ram_load); } //copy .switch ot unsecure RAM if(*switch_end - *switch_start) { memCopy((uint16_t *)&switch_start,(uint16_t *)&switch_end,(uint16_t *)&switch_ram_load); } #endif #endif // initialize the hardware abstraction layer halHandle = HAL_init(&hal,sizeof(hal)); // check for errors in user parameters USER_checkForErrors(&gUserParams); // store user parameter error in global variable gMotorVars.UserErrorCode = USER_getErrorCode(&gUserParams); // do not allow code execution if there is a user parameter error if(gMotorVars.UserErrorCode != USER_ErrorCode_NoError) { for(;;) { gMotorVars.Flag_enableSys = false; } } // initialize the user parameters USER_setParams(&gUserParams); // set the hardware abstraction layer parameters HAL_setParams(halHandle,&gUserParams); // initialize the controller #ifdef FAST_ROM_V1p6 ctrlHandle = CTRL_initCtrl(ctrlNumber, estNumber); //v1p6 format (06xF and 06xM devices) controller_obj = (CTRL_Obj *)ctrlHandle; #else ctrlHandle = CTRL_initCtrl(estNumber,&ctrl,sizeof(ctrl)); //v1p7 format default #endif { CTRL_Version version; // get the version number CTRL_getVersion(ctrlHandle,&version); gMotorVars.CtrlVersion = version; } // set the default controller parameters CTRL_setParams(ctrlHandle,&gUserParams); // setup faults HAL_setupFaults(halHandle); // initialize the interrupt vector table HAL_initIntVectorTable(halHandle); // enable the ADC interrupts HAL_enableAdcInts(halHandle); // enable global interrupts HAL_enableGlobalInts(halHandle); // enable debug interrupts HAL_enableDebugInt(halHandle); // disable the PWM HAL_disablePwm(halHandle); #ifdef DRV8301_SPI // turn on the DRV8301 if present HAL_enableDrv(halHandle); // initialize the DRV8301 interface HAL_setupDrvSpi(halHandle,&gDrvSpi8301Vars); #endif #ifdef DRV8305_SPI // turn on the DRV8305 if present HAL_enableDrv(halHandle); // initialize the DRV8305 interface HAL_setupDrvSpi(halHandle,&gDrvSpi8305Vars); #endif // enable DC bus compensation CTRL_setFlag_enableDcBusComp(ctrlHandle, true); for(;;) { // Waiting for enable system flag to be set //while(!(gMotorVars.Flag_enableSys)); while(!(1)); //———————————————————————— // loop while the enable system flag is true //while(gMotorVars.Flag_enableSys) while(1) //———————————————————————— { CTRL_Obj *obj = (CTRL_Obj *)ctrlHandle; // increment counters gCounter_updateGlobals++; if(CTRL_isError(ctrlHandle)) { // set the enable controller flag to false CTRL_setFlag_enableCtrl(ctrlHandle,false); // set the enable system flag to false gMotorVars.Flag_enableSys = false; // disable the PWM HAL_disablePwm(halHandle); } else { // update the controller state bool flag_ctrlStateChanged = CTRL_updateState(ctrlHandle); // enable or disable the control CTRL_setFlag_enableCtrl(ctrlHandle, 1); //—————————————————————— if(flag_ctrlStateChanged) { CTRL_State_e ctrlState = CTRL_getState(ctrlHandle); EST_State_e estState = EST_getState(obj->estHandle); if(ctrlState == CTRL_State_OffLine) { // enable the PWM HAL_enablePwm(halHandle); } else if(ctrlState == CTRL_State_OnLine) { if((estState < EST_State_LockRotor) || (estState > EST_State_MotorIdentified)) { // update the ADC bias values HAL_updateAdcBias(halHandle); } // Return the bias value for currents gMotorVars.I_bias.value[0] = HAL_getBias(halHandle,HAL_SensorType_Current,0); gMotorVars.I_bias.value[1] = HAL_getBias(halHandle,HAL_SensorType_Current,1); gMotorVars.I_bias.value[2] = HAL_getBias(halHandle,HAL_SensorType_Current,2); // Return the bias value for voltages gMotorVars.V_bias.value[0] = HAL_getBias(halHandle,HAL_SensorType_Voltage,0); gMotorVars.V_bias.value[1] = HAL_getBias(halHandle,HAL_SensorType_Voltage,1); gMotorVars.V_bias.value[2] = HAL_getBias(halHandle,HAL_SensorType_Voltage,2); // enable the PWM HAL_enablePwm(halHandle); } else if(ctrlState == CTRL_State_Idle) { // disable the PWM HAL_disablePwm(halHandle); gMotorVars.Flag_Run_Identify = false; } if((CTRL_getFlag_enableUserMotorParams(ctrlHandle) == true) && (ctrlState > CTRL_State_Idle) && (gMotorVars.CtrlVersion.minor == 6)) { // call this function to fix 1p6 USER_softwareUpdate1p6(ctrlHandle); } } } if(EST_isMotorIdentified(obj->estHandle)) { // set the current ramp EST_setMaxCurrentSlope_pu(obj->estHandle,gMaxCurrentSlope); gMotorVars.Flag_MotorIdentified = true; // set the speed reference CTRL_setSpd_ref_krpm(ctrlHandle,gMotorVars.SpeedRef_krpm); // set the speed acceleration CTRL_setMaxAccel_pu(ctrlHandle,_IQmpy(MAX_ACCEL_KRPMPS_SF,gMotorVars.MaxAccel_krpmps)); if(Flag_Latch_softwareUpdate) { Flag_Latch_softwareUpdate = false; USER_calcPIgains(ctrlHandle); } } else { Flag_Latch_softwareUpdate = true; // the estimator sets the maximum current slope during identification gMaxCurrentSlope = EST_getMaxCurrentSlope_pu(obj->estHandle); } // when appropriate, update the global variables if(gCounter_updateGlobals >= NUM_MAIN_TICKS_FOR_GLOBAL_VARIABLE_UPDATE) { // reset the counter gCounter_updateGlobals = 0; updateGlobalVariables_motor(ctrlHandle); } // recalculate Kp and Ki gains to fix the R/L limitation of 2000.0, and Kp limit to 0.11 recalcKpKi(ctrlHandle); if(CTRL_getMotorType(ctrlHandle) == MOTOR_Type_Induction) { // set electrical frequency limit to zero while identifying an induction motor setFeLimitZero(ctrlHandle); // calculate Dir_qFmt for acim motors acim_Dir_qFmtCalc(ctrlHandle); } // enable/disable the forced angle EST_setFlag_enableForceAngle(obj->estHandle,gMotorVars.Flag_enableForceAngle); // enable or disable power warp CTRL_setFlag_enablePowerWarp(ctrlHandle,gMotorVars.Flag_enablePowerWarp); #ifdef DRV8301_SPI HAL_writeDrvData(halHandle,&gDrvSpi8301Vars); HAL_readDrvData(halHandle,&gDrvSpi8301Vars); #endif #ifdef DRV8305_SPI HAL_writeDrvData(halHandle,&gDrvSpi8305Vars); HAL_readDrvData(halHandle,&gDrvSpi8305Vars); #endif } // end of while(gFlag_enableSys) loop // disable the PWM HAL_disablePwm(halHandle); // set the default controller parameters (Reset the control to re-identify the motor) CTRL_setParams(ctrlHandle,&gUserParams); gMotorVars.Flag_Run_Identify = false; } // end of for(;;) loop } // end of main() function interrupt void mainISR(void) { // toggle status LED if(++gLEDcnt >= (uint_least32_t)(USER_ISR_FREQ_Hz / LED_BLINK_FREQ_Hz)) { HAL_toggleLed(halHandle,(GPIO_Number_e)HAL_Gpio_LED2); gLEDcnt = 0; } // acknowledge the ADC interrupt HAL_acqAdcInt(halHandle,ADC_IntNumber_1); // convert the ADC data HAL_readAdcData(halHandle,&gAdcData); // run the controller CTRL_run(ctrlHandle,halHandle,&gAdcData,&gPwmData); // write the PWM compare values HAL_writePwmData(halHandle,&gPwmData); // setup the controller CTRL_setup(ctrlHandle); return; } // end of mainISR() function void updateGlobalVariables_motor(CTRL_Handle handle) { CTRL_Obj *obj = (CTRL_Obj *)handle; // get the speed estimate gMotorVars.Speed_krpm = EST_getSpeed_krpm(obj->estHandle); // get the real time speed reference coming out of the speed trajectory generator gMotorVars.SpeedTraj_krpm = _IQmpy(CTRL_getSpd_int_ref_pu(handle),EST_get_pu_to_krpm_sf(obj->estHandle)); // get the magnetizing current gMotorVars.MagnCurr_A = EST_getIdRated(obj->estHandle); // get the rotor resistance gMotorVars.Rr_Ohm = EST_getRr_Ohm(obj->estHandle); // get the stator resistance gMotorVars.Rs_Ohm = EST_getRs_Ohm(obj->estHandle); // get the stator inductance in the direct coordinate direction gMotorVars.Lsd_H = EST_getLs_d_H(obj->estHandle); // get the stator inductance in the quadrature coordinate direction gMotorVars.Lsq_H = EST_getLs_q_H(obj->estHandle); // get the flux gMotorVars.Flux_VpHz = EST_getFlux_VpHz(obj->estHandle); // get the controller state gMotorVars.CtrlState = CTRL_getState(handle); // get the estimator state gMotorVars.EstState = EST_getState(obj->estHandle); // Get the DC buss voltage gMotorVars.VdcBus_kV = _IQmpy(gAdcData.dcBus,_IQ(USER_IQ_FULL_SCALE_VOLTAGE_V/1000.0)); return; } // end of updateGlobalVariables_motor() function void recalcKpKi(CTRL_Handle handle) { CTRL_Obj *obj = (CTRL_Obj *)handle; EST_State_e EstState = EST_getState(obj->estHandle); if((EST_isMotorIdentified(obj->estHandle) == false) && (EstState == EST_State_Rs)) { float_t Lhf = CTRL_getLhf(handle); float_t Rhf = CTRL_getRhf(handle); float_t RhfoverLhf = Rhf/Lhf; _iq Kp = _IQ(0.25*Lhf*USER_IQ_FULL_SCALE_CURRENT_A/(USER_CTRL_PERIOD_sec*USER_IQ_FULL_SCALE_VOLTAGE_V)); _iq Ki = _IQ(RhfoverLhf*USER_CTRL_PERIOD_sec); // set Rhf/Lhf CTRL_setRoverL(handle,RhfoverLhf); // set the controller proportional gains CTRL_setKp(handle,CTRL_Type_PID_Id,Kp); CTRL_setKp(handle,CTRL_Type_PID_Iq,Kp); // set the Id controller gains CTRL_setKi(handle,CTRL_Type_PID_Id,Ki); PID_setKi(obj->pidHandle_Id,Ki); // set the Iq controller gains CTRL_setKi(handle,CTRL_Type_PID_Iq,Ki); PID_setKi(obj->pidHandle_Iq,Ki); } return; } // end of recalcKpKi() function void setFeLimitZero(CTRL_Handle handle) { CTRL_Obj *obj = (CTRL_Obj *)handle; EST_State_e EstState = EST_getState(obj->estHandle); _iq fe_neg_max_pu; _iq fe_pos_min_pu; if((EST_isMotorIdentified(obj->estHandle) == false) && (CTRL_getMotorType(handle) == MOTOR_Type_Induction)) { fe_neg_max_pu = _IQ30(0.0); fe_pos_min_pu = _IQ30(0.0); } else { fe_neg_max_pu = _IQ30(-USER_ZEROSPEEDLIMIT); fe_pos_min_pu = _IQ30(USER_ZEROSPEEDLIMIT); } EST_setFe_neg_max_pu(obj->estHandle, fe_neg_max_pu); EST_setFe_pos_min_pu(obj->estHandle, fe_pos_min_pu); return; } // end of setFeLimitZero() function void acim_Dir_qFmtCalc(CTRL_Handle handle) { CTRL_Obj *obj = (CTRL_Obj *)handle; EST_State_e EstState = EST_getState(obj->estHandle); if(EstState == EST_State_IdRated) { EST_setDir_qFmt(obj->estHandle, EST_computeDirection_qFmt(obj->estHandle, 0.7)); } return; } // end of acim_Dir_qFmtCalc() function //@} //defgroup // end of file
其中,语句后面加注释“————————”的是修改过的。包括修改为flash运行,以及修改为加密后flash运行的部分。
另外,还是提醒一下,注意板子上SW3的设置(针对F28069M)。
我一直用的是TMS320F28027F的FOC工程,工程路径如下,你帮我改一下这个吧,谢谢了。上面我发的有28027F.cmd文件。
C:\ti\motorware\motorware_1_01_00_18\sw\solutions\instaspin_foc\boards\boostxldrv8305_revA\f28x\f2802xF\projects\ccs\proj_lab11a
额,我这边这周是可以帮忙修改程序,但是没办法测试修改的程序是否有效。而且,我这边是没有F28027F这款芯片的,所以我的建议还是你这边描述一下你的情况,然后我看能否判断是哪里的问题,比如程序烧写进去之后启动是芯片完全没反应?还是板子上有一个灯在闪烁,但是电机不启动?
另外,你也可以基于lab02b修改看看,因为我也没测试过lab11a
你帮忙修改一下吧,谢谢了。我改的烧进去以后完全没反应。你改好我试试吧。因为我对这个实在不熟悉
看了一下,F28027F和F28069M的例程确实差别挺大的,特别是定点芯片和浮点芯片的差别挺大,我这边一时半会确定不了需要修改哪些语句。
不知道你这边能不能去英文论坛发帖?可以的话我建议直接在英文论坛咨询一下,英文论坛的Yanming Luo是instaSPIN方面的专家,他应该能给你更准确的指导: