TMS320F280025: 25芯片TRREM寄存器的使用

HRPWM Remainder Bits: This 11-bit value keeps track of the remainder portion of the HRPWM algorithm calculations.
This value keeps track of the remainder portion of the HRPWM hardware calculations.

Notes:
1. The lower 8-bits of the TRREM register can be automatically initialized with the TBPHSHR value on a SYNCIN or
TBCTL[SWFSYNC] event or DC event (if enabled). The user can also write a value with the CPU.

2. Priority of TRREM register updates:
Sync (software or hardware) TBPHSHR copied to TRREM : Highest Priority
HRPWM Hardware (updates TRREM register): Next priority
CPU Write To TRREM Register: Lowest Priority

3. Bit 10 of TRREM register is not used in asymmetrical mode. This bit can be forced to zero.
TRREM will be initialized to 0x0 and 0x100 in Up and Up-down modes respectively.
Asymmetrical Mode:TRREM[7:0] = TBPHSHR[15:8] TRREM[10,9,8] = 0,0,0
Symmetrical Mode: TRREM[7:0] = TBPHSHR[15:8] TRREM[10,9,8] = 0,0,1