C2000™︎ 微控制器论坛 - 最近的话题

F29H850TU: F29H850TU供货状况与替代料咨询

Eli Peng — Wed, 27 May 2026 07:11:15 GMT

Part Number: F29H850TU

您好

我是数字电源软件工程师，正在开发服务器数字电源

因产品需符合IEC62443工业网络安全需求，目前看到F29H850TU应该符合对应功能

但发现官网显示F29H850TU库存视乎不多，请问后续会再补库存吗?

或是有没有类似的替代料? 能支持加密保护、安全启动等IEC62443需求的

TMS320F28335: 再问编译的问题

ccb bcc — Wed, 27 May 2026 01:11:18 GMT

Part Number: TMS320F28335

我编译TMS320F28335的程序，出现错误，如下：

谢谢！我改了一下，原来的错误没有了，又出现新的错误。 "C:\Users\chenbingjy\AppData\Local\Temp\0405611", ERROR! at EOF:
[E1500]
file access error: failed to open "E:/Code of TMS320F28335
CCS4/v120/DSP2833x_examples/FFT/Debug/Example_2833x_FFT.obj" for
writing
"C:\Users\chenbingjy\AppData\Local\Temp\0405611", ERROR! : [E1000]
Failed to write object file : E:/Code of TMS320F28335
CCS4/v120/DSP2833x_examples/FFT/Debug/Example_2833x_FFT.obj >> Compilation failure
C:\ti\ccsv4\utils\gmake\gmake: *** [E:/Code of TMS320F28335 CCS4/v120/DSP2833x_examples/FFT/Debug/Example_2833x_FFT.obj] Error 1
C:\ti\ccsv4\utils\gmake\gmake: Target `all' not remade because of errors.
Build complete for project EXT_ROOT__Example_2833x_FFT

我的工程在D盘，编译结果错误显示在E盘。

这个问题怎么解决？谢谢

请问使用TMS320F28335这颗DSP，TI是否能提供免费开源的LLC架构软件代码以供参考设计？以及提供一些库文件供使用。

chao lu — Tue, 26 May 2026 12:51:20 GMT

Other Parts Discussed in Thread: TMS320F28335

谢谢。请问使用TMS320F28335这颗DSP，TI是否能提供免费开源的LLC架构软件代码以供参考设计？以及提供一些库文件供使用。

TMS320F28388S: TMS320F28388D: EtherCAT Communication Failure on Custom Board Despite Success on ControlCARD

mai qiao — Tue, 26 May 2026 05:48:41 GMT

Part Number: TMS320F28388S
Other Parts Discussed in Thread: TMS320F28388D, C2000WARE

Hi TI Team,

We are developing an EtherCAT slave application using the TMS320F28388D (specifically TMS320F28388SZWTS).

Previously, we successfully verified the full EtherCAT slave functionality and achieved stable data exchange with the TwinCAT master using the official TI development board (controlCARD) and standard C2000Ware examples.

Now, we have designed a custom hardware board. The schematic design, pin mapping, and peripheral configurations are intended to be identical to the official TI reference design, but we are currently facing a communication failure (cannot establish connection with TwinCAT).

Hardware Differences on Custom Board:

Compared to the official controlCARD, our custom board introduces the following minor changes on the physical layer:

Added a surge protection TVS array (SLVU2R8_4) on the differential TX/RX lines between the PHY and the RJ45 connector.
Added 22Ω series isolation resistors on the digital MII/RMII/management signal lines between the PHY chip and the F28388D.

Troubleshooting Conducted:

To isolate the root cause, we have already performed the following hardware modifications, but the communication issue persists:

Completely removed the SLVU2R8_4 surge protection chip to eliminate parasitics on differential pairs.
Replaced the 22Ω series resistors with 0Ω jumpers to eliminate potential signal integrity/timing issues on the digital interface.

Questions:

Potential Causes: Given that the exact same software works perfectly on the TI controlCARD, what are the most likely hardware or physical layer aspects (e.g., clock stability, power-up sequencing, PHY strap pins, or ESC reset timing) that could cause this total communication failure on a custom F28388D board?
Diagnostic Guidance: What are the recommended step-by-step verification methods we should perform at this stage (e.g., checking specific registers via CCS, monitoring LED behaviors, or scoping specific signals) to pinpoint the failure and restore normal EtherCAT communication?

Thanks in advance for your professional support.

Best regards,
qiaomai

TMS320F28388S: TMS320F28388S EtherCAT Slaver, Problems with custom hardware communication

mai qiao — Tue, 26 May 2026 01:53:38 GMT

Part Number: TMS320F28388S
Other Parts Discussed in Thread: TMS320F28388D

Use the EtherCAT development board based on tms320f28388d to debug the EtherCAT slave station function.
According to the official tutorial, debug the EtherCAT function on the development board. The development board and TwinCAT can communicate normally and exchange data.
The company's hardware has drawn a new development board, which is consistent in principle with the official development board. The pins and the development board remain the same. The chip is tms320f28388szwts. A surge protection chip SLVU2R8_4 is added to the differential lines of the TX and RX of the PHY chip and the RJ45 interface. A 22Ω resistor is connected in series to the signal pins of the PHY chip and the DSP.
Question 1: When using the code developed on the development board for EtherCAT communication on the company's self-made development board, the communication fails. Removing the surge protection chip and changing the 22Ω resistor to 0Ω also fails to achieve successful communication. What is the reason for this?
Question 2: How should we test at this stage to achieve normal communication?

TMS320F28035: Boot ROM芯片内部校验值与安全自检库中CRC校验结果不一致

IA M — Tue, 26 May 2026 01:20:50 GMT

Part Number: TMS320F28035

在应用IEC60730安全自检库程序时，发现TMS320F28035芯片内部计算Boot ROM的checksum与安全自检库中CRC校验结果不同。需要了解下其计算原理是否一致，芯片内部计算Boot ROM的checksum原理如何理解？

TMS320F28335: 调试工具选择的问题

ccb bcc — Mon, 25 May 2026 08:58:14 GMT

Part Number: TMS320F28335

先上图

我新建工程，我用的仿真器是XDS510，可是DEBUG选项卡里却是XDS100V2。

我想修改，可是改不了。

请问高手，如何解决？谢谢

TMS320F28377D: Title: TMS320F28377 + TLV62568: 7 DSPs Damaged — 1.2V VDD Clamped to 2.0V on First Power-Up

Xu Jiasheng — Mon, 25 May 2026 05:56:18 GMT

Part Number: TMS320F28377D
Other Parts Discussed in Thread: TLV62568

Power Architecture:

12V → LV2842XLVDDCR → 5V ─┬→ TLV62568DBVR → 3.3V (VDDIO)
                           └→ TLV62568DBVR → 1.2V (VDD)

DSP: TMS320F28377PTP
VREGENZ: tied to VDDIO (internal VREG disabled)

Power Sequencing (Scope Measurements):

Trace	Rail	Soft-Start Time	Notes
Fig.1	12V Input	10 ms	External PSU soft-start
Fig.2	12V→5V (LV2842)	2.5 ms	Normal
Fig.3 (Yellow)	5V→3.3V (TLV62568)	<1 ms	Normal
Fig.3 (Green)	5V→1.2V (TLV62568)	<1 ms	Clamped to 2.1V

Both 3.3V and 1.2V are generated by identical TLV62568DBVR converters; ramp times are both <1 ms, nearly simultaneous
Total system power: 11.6V input / 0.105A / 1.22W — no abnormal power draw
DSP becomes slightly warm after power-up; no obvious overheating

Failure Scale:

7 TMS320F28377PTP devices have been damaged to date, all with identical failure symptoms. 100% failure rate on first power-up.

Timeline of Investigation:

Original design included a PMOS inrush limiter (499kΩ×2 divider + 1μF cap, ≈16.6ms) ahead of the 24V input, with the external PSU itself providing a 25ms soft-start. First DSP was found with VDD clamped to ~2.1V
Changed inrush capacitor from 1μF to 100nF (≈1.6ms), no improvement. PMOS inrush waveform showed oscillation dips. Eventually removed the PMOS inrush circuit entirely (shorted)
After removal, 3.3V and 1.2V ramp times both reduced to <1ms. However, subsequent DSPs continued to fail identically — VDD clamped to 2.1V, stabilizing at 2.0V
Removed the 1.2V TLV62568 (U5), applied only 3.3V to the board — VDD rail still measured ~2.0V, confirming the voltage originates from within the DSP (ESD diodes conducting from VDDIO to VDD)
Added a 20Ω dummy load from VDD to GND (2.0V ÷ 20Ω ≈ 100mA). VDD voltage was NOT pulled down — indicating back-feed current far exceeds 100mA, consistent with a low-impedance path having formed internally
Every DSP failed on first power-up after soldering, not gradually over accumulated runtime. 7 devices, 100% failure rate, identical symptoms

What Has Been Ruled Out:

Item	Status
1.2V DC-DC feedback network: Rtop=100kΩ / Rbottom=100kΩ, Vref=0.6V → Vout=1.2V (verified without DSP)	✓
VREGENZ correctly tied to VDDIO	✓
Power sequencing optimized to <1ms synchronous ramps	✓
TLV62568 tested standalone — outputs 1.2V without DSP soldered	✓
Soldering: reflow profile within spec, no shorts or cold joints	✓
Partial schematic shown in Fig.4

Questions:

Seven F28377 devices failed 100% on first power-up with identical symptoms (VDDIO→VDD low-impedance path, VDD clamped to ~2.0V). The TLV62568 does not support pre-bias startup — when VDD is pre-biased to 2.0V by the DSP's ESD diodes, the converter detects Vout > Vref and refuses to start switching. Could this sustained reverse-bias condition on the ESD diodes cause them to degrade into a low-impedance short?
The datasheet requires VDDIO and VDD track within 0.3V of each other, but provides no guidance on sub-ms startup delay mismatch when using independent discrete converters of the same model. Both TLV62568 converters ramp in <1ms nearly simultaneously — is there a known issue where even microsecond-level startup skew causes *** ESD structure degradation?
For this power architecture (two independent TLV62568 converters for VDDIO and VDD), would TI recommend using the VDD converter's Power Good output to enable the VDDIO converter, thereby guaranteeing VDD is established before VDDIO? Or is there another recommended sequencing scheme to prevent this failure mode?

Figure.1

Figure.2

Figure.3

TMS320F28377D: TMS320F28377DPTPT：1.2V VDD 被钳位至 2.1V，怀疑 DSP 内核损坏或 DC-DC pre-bias 启动异常

Xu Jiasheng — Mon, 25 May 2026 04:36:38 GMT

Part Number: TMS320F28377D
Other Parts Discussed in Thread: TLV62568,

电源架构：

12V → LV2842XLVDDCR → 5V ─┬→ TLV62568DBVR → 3.3V (VDDIO)

└→ TLV62568DBVR → 1.2V (VDD)

DSP：TMS320F28377PTP
VREGENZ：接 VDDIO（禁用内部 VREG）

目前已累计测试 2 片 TMS320F28377DPTPT，故障现象完全一致。

上电时序（示波器实测）：

波形	电源轨	软启动时间	备注
图1	12V 输入	10ms	外部电源自带
图2	12V→5V (LV2842)	2.5ms	正常
图3(黄)	5V→3.3V (TLV62568)	<1ms	正常
图3(绿)	5V→1.2V (TLV62568)	<1ms	被钳位至 2.1V

3.3V 和 1.2V 均由同一型号 TLV62568DBVR 生成，斜坡时间均 <1ms，几乎同步启动
系统总功耗：输入 11.6V / 0.105A / 1.22W，未见异常
DSP 上电后5分钟微微发烫40~50度左右

图1 输入电源12V的波形，缓启动时间10ms

图2 LV2842XLVDDCR芯片，12V转5V波形，缓启动时间2.5ms

图3 TLV62568DBVR,黄色为3.3V,绿色为被钳位到2.1V的（本应该1.2V输出的）波形，缓启动时间都在1ms内

问题演变过程：

最初采用 PMOS 缓启动电路（499kΩ×2 分压 + 1μF 电容，≈16.6ms），12V 输入电源自带 25ms 软启动。整体上电偏慢，1.2V 被钳位至 ~2.1V
将缓启动电容改为 100nF（≈1.6ms），无效；缓启动波形出现振荡跌落。最终完全移除 PMOS 缓启动、短接供电
移除前端缓启动后，3.3V/1.2V 建立时间均缩短至 <1ms，但 1.2V 仍被钳位至 2.1V，后稳定在 2.0V
拆除 1.2V 的 TLV62568（U5），仅给板子供 3.3V——1.2V 轨仍被抬至 ~2.0V，说明电压来自 DSP 内部（ESD 二极管从 VDDIO 灌入 VDD）
在 1.2V 轨上并联 20Ω 假负载（2.0V ÷ 20Ω ≈ 100mA），1.2V 电压不被拉低——说明灌电流远大于 100mA，ESD 二极管行为已异常

已排除的疑点：

1.2V DC-DC 反馈电阻：Rtop=100kΩ / Rbottom=100kΩ，Vref=0.6V，空载输出 1.2V ✓
VREGENZ 已正确接 VDDIO（禁用内部 VREG）✓
电源时序已优化至两轨 <1ms 同步 ✓
原理图部分截图见图 4

问题：

TLV62568 在输出已被 DSP ESD 预偏置至 2.0V 的情况下，是否支持 pre-bias 启动？还是内部检测到 Vout > Vref 后会拒绝启动？
仅给 VDDIO 供电时，VDD 被抬升至 2.0V 并灌入超过 100mA（20Ω 假负载无法拉低），是否已足够判定 DSP 内部 VDD-VDDIO 之间发生栅氧击穿？
F28377 手册中 VDD 和 VDDIO 的轨间压差要求 ≤0.3V，但两路 TLV62568 在 <1ms 内同步——这种 sub-ms 级的微小启动延迟差是否仍可能导致长期的 ESD 结构退化？

TMS320F2800137: DCSM密码为何要将密码放到User OTP中？

Xiao Dong — Sat, 23 May 2026 06:50:06 GMT

Part Number: TMS320F2800137

之前的型号比如28035/28335这些芯片，CSM在FLASH中，设置密码以后可以重新擦除FLASHA，芯片恢复未加密状态。

新一些的型号比如2800137/280025/280049，CSM升级到DCSM，看了下文档，发现密码设置在User OTP中，以2800137为例，OTP尺寸为1k字，DCSM_Z1_OTP尺寸为512个字，地址从0x78000开始，长度0x200，LINKPOINTER有效位数为14位，代表15个ZSB，意味着密码最多只能设置15次？而且设置的密码无法擦除，只能修改LINKPOINTER位数？而且一旦修改User OTP开启加密以后，芯片无法恢复未加密状态？是这样的吗？

TMS320F28335: 编译错误的问题

ccb bcc — Fri, 22 May 2026 05:32:10 GMT

Part Number: TMS320F28335

我编译一个工程，提示出错：

undefined first referenced
symbol in file
--------- ----------------
_main C:/Program Files/Texas Instruments/ccsv4/tools/compiler/c2000/lib/rts2800_fpu32.lib<args_main.obj>

error: unresolved symbols remain
fatal error: cannot open file
"/DSP2833x_examples/gpio_toggle/Debug/Example_2833xGpioToggle.map": No such
file or directory

这个错误应该如何解决？谢谢

TMS320F28379D: FLASH写入问题

xue yu — Thu, 21 May 2026 06:55:48 GMT

Part Number: TMS320F28379D
Other Parts Discussed in Thread: C2000WARE

对Flash写入操作时，根据数据长度进行循环写入。仿真发现每次调用该函数，只有进入循环的第一次可以写完128位块，后续数据写入失败。

        EALLOW;

        HWREG(FLASH0ECC_BASE + FLASH_O_ECC_ENABLE) = 0x0;

        for(i = 0; i < u16Len; i += 8,u32Index += 8){

            Fapi_issueAsyncCommand(Fapi_ClearStatus);
            while (Fapi_checkFsmForReady() != Fapi_Status_FsmReady);

            oReturnCheck = Fapi_issueProgrammingCommand((uint32 *)u32Index,g_nModbusRegister+4+i,
                                                        8,  0,   0,
                                                        Fapi_AutoEccGeneration);
            while(Fapi_checkFsmForReady() == Fapi_Status_FsmBusy){}

            if(oReturnCheck != Fapi_Status_Success){
                u16UpgradeResult = 2;
            }

            oFlashStatus = Fapi_getFsmStatus();

            oReturnCheck = Fapi_doVerify((uint32 *)u32Index,
                                         4, Buffer32+(i/2),
                                         &oFlashStatusWord);

            if(oReturnCheck != Fapi_Status_Success){
                u16UpgradeResult = 2;
            }

        }
        EDIS;

TMS320F28P550SJ: I cannot perform NPU compilation for F28P55 devices using tinyml-tensorlab

chen hanwen — Thu, 21 May 2026 03:22:10 GMT

Part Number: TMS320F28P550SJ

I cannot perform NPU compilation for F28P55 devices using tinyml-tensorlab. No matter how I adjust the configurations, the tool always attempts CPU compilation by default. Meanwhile, the run log fails to indicate the specific reasons why the model falls back to CPU execution instead of being offloaded to the NPU.
My ONNX model is a fully-connected network with input shape 1×64×64×1.

class SimpleFCN(nn.Module):
    def __init__(self):
        super().__init__()
        self.layers = nn.Sequential(
            nn.Linear(1, 64),
            nn.ReLU(),
            nn.Linear(64, 64),
            nn.ReLU(),
            nn.Linear(64, 1)
        )

    def forward(self, x):
        return self.layers(x)

test.yaml:

common:
  target_module: 'timeseries'
  task_type: 'generic_timeseries_forecasting'
  target_device: F28P55
  run_name: '{date-time}/{model_name}'

dataset:
  enable: False
  dataset_name: test_model

feature_extraction:
  feature_extraction_name: None

data_processing_feature_extraction:
  feature_extraction_name: None

training:
  enable: False
  model_name: 'fcn'

compilation:
  output_int: false
  enable: True
  preset_name: 'compress_npu_layer_data'
  model_path: 'E:\study\code\tinyml\tinyml-tensorlab\tinyml-modeloptimization\fcn_sin_model_quantfx.onnx'

run.log

python tinyml_modelmaker\run_tinyml_modelmaker.py test.yaml
argv: ['tinyml_modelmaker\\run_tinyml_modelmaker.py', 'test.yaml']
Auto-detected data_dir='files' for task_category='timeseries_forecasting'
Run params is at: E:\study\code\tinyml\tinyml-tensorlab\tinyml-modelmaker\data\projects\test_model\run\20260521-111504/fcn\run.yaml
INFO: root : TinyVerse Toolchain Version: 01_03_00
INFO: root : Script: ..\..\..\..\..\desktop\python3.10\LightRAG\tinyml-tensorlab\lib\site-packages\tinyml_tinyverse\references\common\compilation.py
INFO: root : Target: c, ti-npu type=soft
INFO: root : Compilation settings - skip_normalize: False ('false' for float models, 'true' otherwise)
INFO: root : Compilation settings - output_int: False ('false' for float models, 'true/false' otherwise)
INFO: root : Compilation settings - ti-npu type: soft ('soft' for float models/generic quantized models, 'soft/hard' otherwise)
INFO: root.gen_artifacts : Changing directory to: E:\study\code\tinyml\tinyml-tensorlab\tinyml-modelmaker\data\projects\test_model\run\20260521-111504\fcn\compilation
INFO: root.gen_artifacts : Calling TVM to generate artifacts:
INFO: ti_mcu_nnc : ============================================================
INFO: ti_mcu_nnc : TI Optimized Software Library Offloading Report
INFO: ti_mcu_nnc : ============================================================
INFO: ti_mcu_nnc :
INFO: ti_mcu_nnc : LAYER/OPERATOR COUNT SUMMARY
INFO: ti_mcu_nnc : ============================================================
INFO: ti_mcu_nnc :
INFO: ti_mcu_nnc : Layer Patterns Offloaded
INFO: ti_mcu_nnc : ------------------------------------------------------------
INFO: ti_mcu_nnc : Layer Pattern Count
INFO: ti_mcu_nnc : ------------------------------------------------------------
INFO: ti_mcu_nnc :
INFO: ti_mcu_nnc : Operators not Offloaded
INFO: ti_mcu_nnc : ------------------------------------------------------------
INFO: ti_mcu_nnc : Operator Count
INFO: ti_mcu_nnc : ------------------------------------------------------------
INFO: ti_mcu_nnc : qnn.quantize 1
INFO: ti_mcu_nnc : qnn.dense 3
INFO: ti_mcu_nnc : cast 3
INFO: ti_mcu_nnc : nn.bias_add 2
INFO: ti_mcu_nnc : maximum 2
INFO: ti_mcu_nnc : qnn.requantize 3
INFO: ti_mcu_nnc : add 1
INFO: ti_mcu_nnc : qnn.dequantize 1
INFO: ti_mcu_nnc :
INFO: ti_mcu_nnc : ============================================================
INFO: ti_mcu_nnc :
INFO: ti_mcu_nnc :
INFO: ti_mcu_nnc : MODEL PARTITION - TOPOLOGICAL VIEW
INFO: ti_mcu_nnc : ============================================================
INFO: ti_mcu_nnc : Layer/Operator Offloaded
INFO: ti_mcu_nnc : ------------------------------------------------------------
INFO: ti_mcu_nnc : Input
INFO: ti_mcu_nnc : qnn.quantize [ ]
INFO: ti_mcu_nnc : qnn.dense [ ]
INFO: ti_mcu_nnc : cast [ ]
INFO: ti_mcu_nnc : nn.bias_add [ ]
INFO: ti_mcu_nnc : maximum [ ]
INFO: ti_mcu_nnc : qnn.requantize [ ]
INFO: ti_mcu_nnc : qnn.dense [ ]
INFO: ti_mcu_nnc : cast [ ]
INFO: ti_mcu_nnc : nn.bias_add [ ]
INFO: ti_mcu_nnc : maximum [ ]
INFO: ti_mcu_nnc : qnn.requantize [ ]
INFO: ti_mcu_nnc : qnn.dense [ ]
INFO: ti_mcu_nnc : cast [ ]
INFO: ti_mcu_nnc : add [ ]
INFO: ti_mcu_nnc : qnn.requantize [ ]
INFO: ti_mcu_nnc : qnn.dequantize [ ]
INFO: ti_mcu_nnc : Output
INFO: ti_mcu_nnc : ============================================================
INFO: ti_mcu_nnc :
INFO: ti_mcu_nnc : ============================================================
INFO: ti_mcu_nnc : TI Model Library Memory Usage (mod.a)
INFO: ti_mcu_nnc : ============================================================
INFO: ti_mcu_nnc : Code: 816 bytes ( 0.80 KB)
INFO: ti_mcu_nnc : RO Data: 6352 bytes ( 6.20 KB)
INFO: ti_mcu_nnc : RW Data: 178 bytes ( 0.17 KB)
INFO: ti_mcu_nnc : Total: 7346 bytes ( 7.17 KB)
INFO: ti_mcu_nnc : ============================================================
INFO: TVMC : TI memory calculation completed successfully
INFO: root.gen_artifacts : Changing directory back to: E:\study\code\tinyml\tinyml-tensorlab\tinyml-modelmaker
INFO: root.remove_intermittent_files: Removing intermittent files from: E:\study\code\tinyml\tinyml-tensorlab\tinyml-modelmaker\data\projects\test_model\run\20260521-111504\fcn\compilation
Compiled model is at: E:\study\code\tinyml\tinyml-tensorlab\tinyml-modelmaker\data\projects\test_model\run\20260521-111504\fcn\compilation

TMS320F28377D: 28377D：ADCIN14/15输入过压（通过外部二极管钳位在3.6V）导致所有ADC通道数据异常跳变。

tian chen — Wed, 20 May 2026 09:25:02 GMT

Part Number: TMS320F28377D
Other Parts Discussed in Thread: TMS320F28377S, TMS320F28374S

关于已关闭的案例编号：CS3357870 。在该编号案例中，在线技术支持人员表示超出能力范围，建议在论坛中寻找相似案例。

我在论坛中找到了比较类似的案例"TMS320F28377S: how does the negative voltage at ADC input pin affect ADC conversion results?"以及"TMS320F28374S: Questions for TMS320F28374s ADC peripheral"但我的疑惑是我采用相同的输入给其他ADC普通引脚（除ADCIN14/15外）却不会出现异常，我需要确定的是能否将ADCIN14/15引脚采样更换到其他普通引脚？以及在相同输入下普通引脚是否真的不会出现该异常。

TMS320F280049C: 280049 CLA内使用结构体数据问题

jun liu — Wed, 20 May 2026 01:00:20 GMT

Part Number: TMS320F280049C

1、在MUC中定义CPU->CLA使用的结构体，
2、结构体定义为这样时，CLA可以正常的赋值修改数据：
typedef struct
{
float data;
uint16_t data_buff[HS_DATA_NUM];
uint16_t data_count; //求和计数使用
int32_t data_buff_sum;
} float_data_buff ;
float_data_buff out_I ;

3、在2的基础上，如果定义结构体：
typedef struct
{
float_data_buff out_I;
float_data_buff out_V；
float_data_buff in_I;
float_data_buff in_V;
} run_data_t ;
run_data_t RunData;

此时在CLA中使用RunData，里面的数据不会被正确赋值。

这个情况，是配置问题？还是CLA不支持这种方式？原因是什么？

TMS320F28335: 需要一个2KW的方案

chao lu — Tue, 19 May 2026 06:57:09 GMT

Part Number: TMS320F28335

你好，

我这边要设计一个这样的电源：

输入直流电压：500V-850V，输出直流电压：28V，输出直流电流：60A。如有方案，请联系我。

E-mail:406883054@qq.com

C2000WARE: C2000ware下载一直被拒绝

q w — Tue, 19 May 2026 06:28:24 GMT

Part Number: C2000WARE

下载C2000ware一直失败，被拒绝下载无权限

TMS320F28335: 安装软件出错

ccb bcc — Mon, 18 May 2026 11:05:35 GMT

Part Number: TMS320F28335

我在CCS里的help菜单下安装软件，装到一半，出错：

An error occurred while collecting items to be installed
session context was:(profile=epp.package.cpp, phase=org.eclipse.equinox.internal.p2.engine.phases.Collect, operand=, action=).
Problems downloading artifact: org.eclipse.update.feature,com.ti.cgt.arm.clang.0.win32,5.0.0.
Error reading signed content:C:\Users\Administrator\AppData\Local\Temp\signatureFile7478010347091413581.jar
An error occurred while processing the signatures for the file: C:\Users\Administrator\AppData\Local\Temp\signatureFile7478010347091413581.jar
Problems downloading artifact: org.eclipse.update.feature,com.ti.cgt.c2000.21.win32,21.6.2.
Error reading signed content:C:\Users\Administrator\AppData\Local\Temp\signatureFile8256006985938102611.jar
An error occurred while processing the signatures for the file: C:\Users\Administrator\AppData\Local\Temp\signatureFile8256006985938102611.jar
Problems downloading artifact: org.eclipse.update.feature,com.ti.cgt.c2000.22.win32,22.6.3.
Error reading signed content:C:\Users\Administrator\AppData\Local\Temp\signatureFile6548456160186853514.jar
An error occurred while processing the signatures for the file: C:\Users\Administrator\AppData\Local\Temp\signatureFile6548456160186853514.jar
Problems downloading artifact: org.eclipse.update.feature,com.ti.cgt.c2000.25.win32,25.11.0.
Error reading signed content:C:\Users\Administrator\AppData\Local\Temp\signatureFile705245327729396695.jar
An error occurred while processing the signatures for the file: C:\Users\Administrator\AppData\Local\Temp\signatureFile705245327729396695.jar
Problems downloading artifact: org.eclipse.update.feature,com.ti.cgt.c6000.0.win32,8.5.0.
Error reading signed content:C:\Users\Administrator\AppData\Local\Temp\signatureFile1025717919326282071.jar
An error occurred while processing the signatures for the file: C:\Users\Administrator\AppData\Local\Temp\signatureFile1025717919326282071.jar
Problems downloading artifact: org.eclipse.update.feature,com.ti.cgt.c6000.8.3.win32,8.3.14.
Error reading signed content:C:\Users\Administrator\AppData\Local\Temp\signatureFile6514354186069111018.jar
An error occurred while processing the signatures for the file: C:\Users\Administrator\AppData\Local\Temp\signatureFile6514354186069111018.jar
Problems downloading artifact: org.eclipse.update.feature,com.ti.cgt.c7000.4.win32,4.1.2.
Error reading signed content:C:\Users\Administrator\AppData\Local\Temp\signatureFile7646555039196742214.jar
An error occurred while processing the signatures for the file: C:\Users\Administrator\AppData\Local\Temp\signatureFile7646555039196742214.jar
Problems downloading artifact: org.eclipse.update.feature,com.ti.cgt.c7000.5.win32,5.0.1.
Error reading signed content:C:\Users\Administrator\AppData\Local\Temp\signatureFile1097444364862458574.jar
An error occurred while processing the signatures for the file: C:\Users\Administrator\AppData\Local\Temp\signatureFile1097444364862458574.jar
Problems downloading artifact: org.eclipse.update.feature,com.ti.cgt.dmed.win32,1.3.0.
Error reading signed content:C:\Users\Administrator\AppData\Local\Temp\signatureFile835165421674795291.jar
An error occurred while processing the signatures for the file: C:\Users\Administrator\AppData\Local\Temp\signatureFile835165421674795291.jar
Problems downloading artifact: org.eclipse.update.feature,com.ti.cgt.msp430.21.win32,21.6.2.
Error reading signed content:C:\Users\Administrator\AppData\Local\Temp\signatureFile7479784734980214715.jar
An error occurred while processing the signatures for the file: C:\Users\Administrator\AppData\Local\Temp\signatureFile7479784734980214715.jar

请问如何解决？谢谢

TMS320F28335: projiect菜单变了

ccb bcc — Mon, 18 May 2026 09:30:22 GMT

Part Number: TMS320F28335

我的project工程出错了，没法导入工程了。

请高手指教，谢谢

TMS320F28335: 编译出错

ccb bcc — Mon, 18 May 2026 09:23:47 GMT

Part Number: TMS320F28335

我用CCS7调试TMS320F28335的程序，又出错了：

error: unresolved symbols remain
error: errors encountered during linking;
"E:/TMS320F28335_XC3S50AN/TMS320F28335_XC3S50AN/DAIMA/TMS320F28335/28335_sou
rce/DSP2833x_examples/adc_dma/Example_2833xAdcToDMA/../../../DSP2833x_exampl
es/adc_dma/Debug/Example_2833xAdcToDMA.out" not built
gmake: *** [E:/TMS320F28335_XC3S50AN/TMS320F28335_XC3S50AN/DAIMA/TMS320F28335/28335_source/DSP2833x_examples/adc_dma/Example_2833xAdcToDMA/../../../DSP2833x_examples/adc_dma/Debug/Example_2833xAdcToDMA.out] Error 1
gmake: Target 'all' not remade because of errors.

* Build Finished *

请问高手，如何解决？谢谢！

TMS320F28335: 导入工程出错

ccb bcc — Mon, 18 May 2026 09:06:01 GMT

Part Number: TMS320F28335

我用CCS7导入工程，提示出错，

See details below.
Error: Import failed for project 'Example_2833xGpioToggle' because its compiler definition is not available. Please install the C2000v22.6 compiler before importing this project - click 'View > CCS App Center' to check if compiler updates are available, or install the compiler manually and register it with CCS through 'Preferences > CCS > Build > Compilers'.

可是我已装了C2000V22.6 compiler，还是出错，却是为何？谢谢

TMS320F28335: 连接器件的问题

ccb bcc — Mon, 18 May 2026 05:29:35 GMT

Part Number: TMS320F28335

我用CCS7调试TMS320F28335程序，需要先连接器件才能加载程序。

可是连接期间失败

请高手指教，谢谢

TMS320F28335: 调试程序时无法LOAD可执行文件，界面是灰的。

ccb bcc — Mon, 18 May 2026 05:14:06 GMT

Part Number: TMS320F28335

我用CCCS7调试TMS320F28335程序，

无法加载.out文件，界面是灰的，如下图

请高手指教，谢谢

TMS320F28335: 加载程序的问题

ccb bcc — Mon, 18 May 2026 05:07:57 GMT

Part Number: TMS320F28335

我用CCS7调试TMS320F28335程序，加载程序，如下图：

请问偏移量如何填写？谢谢！

TMS320F28335: 导入工程的问题

ccb bcc — Mon, 18 May 2026 04:38:37 GMT

Part Number: TMS320F28335

我用CCS7导入TSM320F2835的工程·，提示出错；、See details below.
Error: Import failed for project 'Example_2833xGpioToggle' because its compiler definition is not available. Please install the C2000v22.6 compiler before importing this project - click 'View > CCS App Center' to check if compiler updates are available, or install the compiler manually and register it with CCS through 'Preferences > CCS > Build > Compilers'.

好像缺少编译器。

这个编译器哪里找呢？谢谢

C2000™︎ 微控制器论坛 - 最近的话题

F29H850TU: F29H850TU供货状况与替代料咨询

TMS320F28335: 再问编译的问题

请问使用TMS320F28335这颗DSP，TI是否能提供免费开源的LLC架构软件代码以供参考设计？以及提供一些库文件供使用。

TMS320F28388S: TMS320F28388D: EtherCAT Communication Failure on Custom Board Despite Success on ControlCARD

Hardware Differences on Custom Board:

Troubleshooting Conducted:

Questions:

TMS320F28388S: TMS320F28388S EtherCAT Slaver, Problems with custom hardware communication

TMS320F28035: Boot ROM芯片内部校验值与安全自检库中CRC校验结果不一致

TMS320F28335: 调试工具选择的问题

TMS320F28377D: Title: TMS320F28377 + TLV62568: 7 DSPs Damaged — 1.2V VDD Clamped to 2.0V on First Power-Up

TMS320F28377D: TMS320F28377DPTPT：1.2V VDD 被钳位至 2.1V，怀疑 DSP 内核损坏或 DC-DC pre-bias 启动异常

TMS320F2800137: DCSM密码为何要将密码放到User OTP中？

TMS320F28335: 编译错误的问题

TMS320F28379D: FLASH写入问题

TMS320F28P550SJ: I cannot perform NPU compilation for F28P55 devices using tinyml-tensorlab

TMS320F28377D: 28377D：ADCIN14/15输入过压（通过外部二极管钳位在3.6V）导致所有ADC通道数据异常跳变。

TMS320F280049C: 280049 CLA内使用结构体数据 问题

TMS320F28335: 需要一个2KW的方案

C2000WARE: C2000ware下载一直被拒绝

TMS320F28335: 安装软件出错

TMS320F28335: projiect菜单变了

TMS320F28335: 编译出错

TMS320F28335: 导入工程出错

TMS320F28335: 连接器件的问题

TMS320F28335: 调试程序时无法LOAD可执行文件，界面是灰的。

TMS320F28335: 加载程序的问题

TMS320F28335: 导入工程的问题

TMS320F280049C: 280049 CLA内使用结构体数据问题