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MSP430F427判断单片机是正常上电重启还是看门狗复位重启?

Other Parts Discussed in Thread: MSP430F427, MSP430F427A, MSP430G2553請問MSP430F427也有暫存器可以確認是否為看門狗復位嗎?
  • 首先MSP430F427 不推荐用于新设计,推荐使用MSP430F427A.

    另外MSP430F427的话,您可以查看WDTIFG这个中断标志位来确认是否看门狗产生的复位。 但是无法分别是软件复位还是正常看门狗复位。

    具体请查看 https://www.ti.com.cn/cn/lit/ug/slau056l/slau056l.pdf

    的12-10 IFG1, Interrupt Flag Register 1

  • 看門狗復位之後,我馬上檢查IFG1暫存器,但是WDTIFG並沒有設為1
    if((IFG1_ & WDTIFG) == WDTIFG) 用這樣的判斷式確認應該沒有錯吧?
  • In watchdog mode, WDTIFG remains set until reset by software. In interval mode, WDTIFG is reset automatically by servicing the interrupt, or it can be reset by software.

    WDTIFG在WDT模式下使CPU复位后,将保持为置位状态供程序查询处理.在WDT下,超时将使WDTIFG置位并保持在CPU重启后供软件测试

    您可以在CCS内使用 view--->register来查看该位的值

  • 我这边没有F4的板子,所以使用MSP430G2553开发板测试了一下

    可以发现WDTIFG置位的

    代码如下

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    //******************************************************************************
    //  MSP430G2xx3 Demo - WDT+ periodic reset
    //
    //  Description; Various reset intervals are configured in watchdog mode.
    //  To illustrate the speed of the reset time the LED flashes in accordance
    //  of the selected interval.
    //
    //  ACLK = 32khz, MCLK = SMCLK = default DCO
    //
    //        MSP430G2xx3
    //             -----------------
    //         /|\|              XIN|-
    //          | |                 |
    //          --|RST          XOUT|-
    //            |                 |
    //            |             P1.0|-->LED
    //
    //  D. Dang
    //  Texas Instruments Inc.
    //  February 2011
    //  Built with CCS Version 4.2.0 and IAR Embedded Workbench Version: 5.10
    //******************************************************************************
    #include <msp430.h>
    
    int main(void)
    {
                                                // WDT is clocked by fSMCLK (1MHz)
      WDTCTL = WDT_MRST_32;                       // ~32ms interval (default)
      //WDTCTL = WDT_MRST_8;                      // ~8ms
      //WDTCTL = WDT_MRST_0_5;                    // ~0.5ms
      //WDTCTL = WDT_MRST_0_064;                  // ~0.064ms
                                                // WDT is clocked by fACLK (32KHz)
      //WDTCTL = WDT_ARST_1000;                   // 1000ms
      //WDTCTL = WDT_ARST_250;                    // 250ms
      //WDTCTL = WDT_ARST_16;                     // 16ms
      //WDTCTL = WDT_ARST_1_9;                    // 1.9ms
      P1DIR |= 0x01;
      P1OUT ^=0x01;
    
      __bis_SR_register(LPM0_bits + GIE);       // Enter LPM3 w/interrupt
    }