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MSP430FR5994: MSP430FR5994高频时钟无法选择

Part Number: MSP430FR5994

使用了MSP430FR5994单片机,使用8MHz的晶体,连接至XT2OUT和XT2IN,作为高速时钟使用。通过配置PJSEL1.6=0,PJSEL0.6=1,并关闭HFXTOFF。在晶振错误标识为0,时,切换至HF,但是输出是4.MHz。通过CTL2可以正确设置MCLK和SMCLK为DCO、MODCLK、ACLk,但是就是无法使用HF。选择了HF后得到的依然是MODCLK时钟,也就是4.8MHz。不知何故?请指教!谢谢!

  • 请问您是否有测试下面的例程?在此例程中使用的是8Mhz的晶振

    // Description: Configure ACLK = LFXT, SMCLK = HFXT and MCLK = DCO
    // NOTE1: 32768Hz and 8MHz crystals required!

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     *                       MSP430 CODE EXAMPLE DISCLAIMER
     *
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    //******************************************************************************
    //   MSP430FR5x9x Demo - ACLK = XT1 = 32768Hz, SMCLK= XT2 = 8MHz, MCLK = DCO
    //
    //   Description: Configure ACLK = LFXT, SMCLK = HFXT and MCLK = DCO
    //   NOTE1: 32768Hz and 8MHz crystals required!
    //
    //           MSP430FR5994
    //         ---------------
    //     /|\|               |
    //      | |               |-LFXIN
    //      --|RST            |-LFXOUT
    //        |               |
    //        |               |-HFXIN
    //        |               |-HFXOUT
    //        |               |
    //        |           P1.0|---> LED
    //        |           P2.0|---> ACLK = 32768Hz
    //        |           P3.4|---> SMCLK = 8MHz
    //
    //   William Goh
    //   Texas Instruments Inc.
    //   October 2015
    //   Built with IAR Embedded Workbench V6.30 & Code Composer Studio V6.1
    //******************************************************************************
    #include <msp430.h>
    
    int main(void)
    {
        WDTCTL = WDTPW | WDTHOLD;
    
        // Configure GPIO
        P1OUT = 0;
        P1DIR = BIT0;                           // For LED
    
        P2DIR |= BIT0;
        P2SEL0 |= BIT0;                         // Output ACLK
        P2SEL1 |= BIT0;
    
        P3DIR |= BIT4;
        P3SEL1 |= BIT4;                         // Output SMCLK
        P3SEL0 |= BIT4;
    
        PJSEL0 |= BIT4 | BIT5 | BIT6 | BIT7;    // For XT1 and XT2
    
        // Disable the GPIO power-on default high-impedance mode to activate
        // previously configured port settings
        PM5CTL0 &= ~LOCKLPM5;
    
        CSCTL0_H = CSKEY_H;                     // Unlock CS registers
        CSCTL1 = DCOFSEL_6;                     // Set DCO to 8MHz
        CSCTL2 = SELA__LFXTCLK | SELS__HFXTCLK | SELM__DCOCLK;
        CSCTL3 = DIVA__1 | DIVS__1 | DIVM__1;   // Set all dividers to 1
        CSCTL4 |= LFXTDRIVE_3 | HFXTDRIVE_3;
        CSCTL4 &= ~(LFXTOFF | HFXTOFF);
        do
        {
            CSCTL5 &= ~(LFXTOFFG | HFXTOFFG);   // Clear XT1 and XT2 fault flag
            SFRIFG1 &= ~OFIFG;
        } while (SFRIFG1 & OFIFG);              // Test oscillator fault flag
        CSCTL0_H = 0;                           // Lock CS registers
    
        while (1)
        {
            P1OUT ^= 0x01;                      // Toggle LED
            __delay_cycles(8000000);            // Wait 8,000,000 CPU Cycles
        }
    }