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MSP430F2419: 管脚配置异常

Part Number: MSP430F2419

   

图所示为项目中MSP430F4219的初始化配置(XT2=8MHz),其中注释部分(P6)在调试时异常。

现象:

1、该段代码注释后系统正常运行;加入该段代码,系统无法完成管脚初始化配置;

2、将未注释的代码下载到另一个项目的板子(XT2=6MHz)上,管脚能正常初始化配置。

请教下大家,出现这种问题的原因以及解决的办法。谢谢!

  • q请问是否有直接测试TI例程?您现在测试的有问题的板子,P6的功能是什么?

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     *******************************************************************************
     * 
     *                       MSP430 CODE EXAMPLE DISCLAIMER
     *
     * MSP430 code examples are self-contained low-level programs that typically
     * demonstrate a single peripheral function or device feature in a highly
     * concise manner. For this the code may rely on the device's power-on default
     * register values and settings such as the clock configuration and care must
     * be taken when combining code from several examples to avoid potential side
     * effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
     * for an API functional library-approach to peripheral configuration.
     *
     * --/COPYRIGHT--*/
    //******************************************************************************
    //  MSP430x26x Demo - Basic Clock, MCLK Configured to Operate from XT2 HF XTAL
    //
    //  Description: Proper selection of an external HF XTAL for MCLK is shown
    //  using HF XT2 OSC. OFIFG is polled until the HF XTAL is stable; only then is 
    //  MCLK sourced by XT2.  MCLK is buffered on P5.4 and MCLK/10 is on P1.1 driven 
    //  by a software loop taking exactly 10 CPU cycles.
    //  ACLK = MCLK = LFXT1 = HF XTAL, SMCLK = default DCO ~1.045MHz
    //  //* XT2 HF XTAL NOT INSTALLED ON FET *//
    //  //* Min Vcc required varies with MCLK frequency - refer to datasheet *//
    //
    //              MSP430F261x/241x
    //             -----------------
    //         /|\|              XIN|-
    //          | |                 |
    //          --|RST          XOUT|-
    //            |                 |
    //            |                 |
    //            |            XT2IN|-
    //            |                 | HF XTAL (400kHz - 16MHz)
    //            |           XT2OUT|-
    //            |                 |
    //            |             P1.1|-->MCLK/10 = XT2 HFXTAL/10
    //            |        P5.4/MCLK|-->MCLK = XT2 HFXTAL
    //
    //  B. Nisarga
    //  Texas Instruments Inc.
    //  September 2007
    //  Built with CCE Version: 3.2.0 and IAR Embedded Workbench Version: 3.42A
    //******************************************************************************
    #include <msp430.h>
    
    volatile unsigned int i;
    
    int main(void)
    {
      WDTCTL = WDTPW + WDTHOLD;                 // Stop WDT
    
      P5DIR |= 0x10;                            // P5.4= output direction
      P5SEL |= 0x10;                            // P5.4= MCLK option select
      P1DIR |= 0x02;                            // P1.1 = output direction
    
      BCSCTL1 &= ~XT2OFF;                       // Activate XT2 high freq xtal
      BCSCTL3 |= XT2S_2;                        // 3 � 16MHz crystal or resonator
    
      do
      {
        IFG1 &= ~OFIFG;                         // Clear OSCFault flag
        for (i = 0xFF; i > 0; i--);             // Time for flag to set
      }
      while (IFG1 & OFIFG);                     // OSCFault flag still set?
    
      BCSCTL2 |= SELM_2;                        // MCLK = XT2 HF XTAL (safe)
    
      for (;;)                                  // Infinite loop
      {
        P1OUT |= 0x02;                          // P1.1 = 1
        P1OUT &= ~0x02;                         // P1.1 = 0
      }
    }
    

  • 不是TI的例程。P6.1、P6.6为普通IO输出配置,P6.4、P6.7为ADC输入配置。

  • 请看下面的参数

  • 不好意思,我刚又试了下,问题仍然没解决。

  • ADC12SSEL=MCLK=8MHz,ADC12DIV=1/4。

    另外我试了一下,将P6全配置为输出也是同样的问题。

  • P6.6是P6.4 ADC检测模块的电源控制键,常关状态。现先将P6.6配置,使ADC检测模块正常工作,再配置P6.4为ADC输入,程序运行正常。配置如下:

  • 谢谢反馈,刚刚正在看您的问题,很高兴您能解决问题

  • 刚才问题使解决了,但是好像不是根本原因。现在配置换了下也能正常运行了。

    再初始化配置的时候其实两种表达效果是一样的。而且之前这样设置也是没有问题。例如下图的代码段就能正常运行。

    不知道最根本的原因是啥。为了避免以后出问题,还是按照OK的那种方式来配置。

  • 谢谢您的反馈

    a |= b就是将a,b 做按位”或“运算,结果给a,相当于a = a | b;