其他微控制器论坛 - 最近的话题

TIDA-010231: 技术协助交流

Su YiKang — Sat, 15 Aug 2026 07:17:15 GMT

Part Number: TIDA-010231

我们关于Ti的电弧检测方案产品很感兴趣，目前有几个方面问题想与贵公司进行一下技术交流协助

UCC28711: internal lead-frame protrusions

yueliang Ma — Tue, 04 Aug 2026 06:52:47 GMT

Part Number: UCC28711

Hi TI team,

We are currently evaluating the UCC28711DR and during our X-ray inspection, we observed some anomalies that we would like to clarify.

As shown in the attached X-ray images, there appear to be internal lead-frame protrusions on the side of the body of the device. These protrusions extend outward from the main lead-frame structure and are visible on both the top and side views under inspection.

We have highlighted the areas of concern in the images for reference. Could you please help confirm:

Are these protrusions a normal characteristic of the lead-frame design for this device?
Could they potentially impact the mechanical or electrical reliability of the part, such as the risk of short circuits or die attach integrity?
Is there any known process variation that could cause such features, and do they fall within TI's standard acceptance criteria?

Any clarification or guidance would be greatly appreciated.

Thank you

UCC28711: internal lead-frame protrusions

yueliang Ma — Tue, 04 Aug 2026 06:47:30 GMT

Part Number: UCC28711

Hi TI team,

We are currently evaluating the UCC28711DR and during our X-ray inspection, we observed some anomalies that we would like to clarify.

We have highlighted the areas of concern in the images for reference. Could you please help confirm:

Are these protrusions a normal characteristic of the lead-frame design for this device?
Could they potentially impact the mechanical or electrical reliability of the part, such as the risk of short circuits or die attach integrity?
Is there any known process variation that could cause such features, and do they fall within TI's standard acceptance criteria?

Any clarification or guidance would be greatly appreciated.

Thank you

UCC28711: internal lead-frame protrusions

yueliang Ma — Tue, 04 Aug 2026 06:44:50 GMT

Part Number: UCC28711

Hi TI team,

We are currently evaluating the UCC28711DR and during our X-ray inspection, we observed some anomalies that we would like to clarify.

We have highlighted the areas of concern in the images for reference. Could you please help confirm:

Are these protrusions a normal characteristic of the lead-frame design for this device?
Could they potentially impact the mechanical or electrical reliability of the part, such as the risk of short circuits or die attach integrity?
Is there any known process variation that could cause such features, and do they fall within TI's standard acceptance criteria?

Any clarification or guidance would be greatly appreciated.

Thank you

AM2432: Continuous frame loss is observed with the Enhanced Link function enabled for AM2432 EtherCAT PRU.

yijin zhao — Thu, 30 Jul 2026 12:46:33 GMT

Part Number: AM2432

The topology comprises a TwinCAT software PLC and a single device equipped with one AM2432 chip. When the Enhanced Link function is enabled, continuous frame loss may occur probabilistically after power cycling the device (the Beckhoff master cannot receive the returning data frames). This frame loss issue does not occur when the Enhanced Link function is disabled.

Investigation results are listed below:
1、When the problem occurs, the Ethernet LED remains steadily on, which means the PHY link has been established.
2、We read the ESC Port Control register (0x100) and Port Status register (0x110). The value of Port Status register 0x110 is 0x5501, indicating that the port link is not up and the port is not opened. This suggests an issue with PRU processing.

TMS320F28335: TMS320F28335 MCBSP转SPI数据移位

user6159515 — Fri, 24 Jul 2026 07:55:06 GMT

Part Number: TMS320F28335
Other Parts Discussed in Thread: C2000WARE

TMS320F28335 MCBSP转SPI数据移位

TMS320F28335: F28335MCBSP配置SPI模式数据读取发生移位问题

Guo Dzai — Fri, 24 Jul 2026 07:37:22 GMT

Part Number: TMS320F28335

近期我在Ti F28335DSP芯片上使用McBSP作为SPI MASTER使用，和对端FLASH芯片进行通信，通过读取FLASH ID来验证软件读写配置，但是发现无论怎么改配置包括但不限于CLKSTP,SPI MODE等寄存器，回读到的Bit位相较于正确值总是发生移位（左右都会有，根据软件配置不一样），例如正确要读到的FLASH ID值为 C2 20 1B，但实际读到的值为：E1 10 0D。已经困扰很久，可否还有其他思路，万分感谢

CODE:

#include "ext_flash.h"

// ========== GPIO 初始化（CS/WP/HOLD 用普通 GPIO）==========
static void Flash_GpioInit(void)
{
EALLOW;

// CS (GPIO23) - 普通 GPIO 输出
#if 1
GpioCtrlRegs.GPAPUD.bit.GPIO23 = 0;
GpioCtrlRegs.GPAMUX2.bit.GPIO23 = 0;
GpioCtrlRegs.GPADIR.bit.GPIO23 = 1;
#else
GpioCtrlRegs.GPAPUD.bit.GPIO24 = 0; // 使能上拉
GpioCtrlRegs.GPAMUX2.bit.GPIO24 = 0; // GPIO 模式
GpioCtrlRegs.GPADIR.bit.GPIO24 = 1; // 输出
#endif
// WP (GPIO25) - 输出高
GpioCtrlRegs.GPAPUD.bit.GPIO25 = 0;
GpioCtrlRegs.GPAMUX2.bit.GPIO25 = 0;
GpioCtrlRegs.GPADIR.bit.GPIO25 = 1;

// HOLD (GPIO26) - 输出高
GpioCtrlRegs.GPAPUD.bit.GPIO26 = 0;
GpioCtrlRegs.GPAMUX2.bit.GPIO26 = 0;
GpioCtrlRegs.GPADIR.bit.GPIO26 = 1;

EDIS;

FLASH_WP_H();
FLASH_HOLD_H();
FLASH_CS_H();
}

// ========== McBSP-A GPIO 复用配置 ==========
static void Mcbspa_GpioInit(void)
{
EALLOW;

// MDXA (GPIO20) - 发送数据 → Flash DI
GpioCtrlRegs.GPAPUD.bit.GPIO20 = 0;
GpioCtrlRegs.GPAMUX2.bit.GPIO20 = 2;

// MDRA (GPIO21) - 接收数据 ← Flash DO
GpioCtrlRegs.GPAPUD.bit.GPIO21 = 0;
GpioCtrlRegs.GPAMUX2.bit.GPIO21 = 2;

// MCLKXA (GPIO22) - 发送时钟
GpioCtrlRegs.GPAPUD.bit.GPIO22 = 0;
GpioCtrlRegs.GPAMUX2.bit.GPIO22 = 2;

// GpioCtrlRegs.GPAPUD.bit.GPIO23 = 0;
// GpioCtrlRegs.GPAMUX2.bit.GPIO23 = 2; // McBSP-A FSX

EDIS;
}

// ========== 延时函数（复制 TI 官方）==========
static void delay_loop(void)
{
volatile long i;
for (i = 0; i < 1000; i++)
{
asm(" NOP");
}
}

// ========== McBSP-A 配置为 SPI 主模式（Mode 0, 32-bit）==========
// 完全复制回环测试通过的配置，只改 DLB=0
static void Mcbspa_SpiInit(void)
{
EALLOW;

// 使能 McBSP-A 时钟
SysCtrlRegs.PCLKCR0.bit.MCBSPAENCLK = 1;

// 软件复位
McbspaRegs.SPCR2.all = 0x0000;
McbspaRegs.SPCR1.all = 0x0000;
//asm(" RPT #2 || NOP");
DELAY_US(10);

McbspaRegs.PCR.all = 0x0F08;

// 关闭数字回环（外部模式）
McbspaRegs.SPCR1.bit.DLB = 0;

// SPI Mode 0: CLKSTP = 2 (bit12:11)
McbspaRegs.SPCR1.bit.CLKSTP = 3;
McbspaRegs.PCR.bit.CLKXP = 1;
McbspaRegs.PCR.bit.CLKRP = 1;

// 数据延迟
McbspaRegs.RCR2.bit.RDATDLY = 1;
McbspaRegs.XCR2.bit.XDATDLY = 1;

// ========== 32-bit 字长（和回环测试一致）==========
McbspaRegs.RCR1.bit.RWDLEN1 = 0;
McbspaRegs.XCR1.bit.XWDLEN1 = 0;

// 采样率发生器
McbspaRegs.SRGR2.all = 0x2000;
McbspaRegs.SRGR1.all = 0x0008;

// 退出复位（和回环测试完全一致）
McbspaRegs.SPCR2.bit.GRST = 1;

// Enable the sample rate generator
DELAY_US(10);
McbspaRegs.SPCR2.bit.XRST = 1;
McbspaRegs.SPCR1.bit.RRST = 1;
McbspaRegs.SPCR2.bit.FRST = 1;

EDIS;
}

Uint8 ExtFlash_SwapByte(Uint8 txData)
{
// 等 XRDY
while(McbspaRegs.SPCR2.bit.XRDY == 0);

McbspaRegs.DXR1.all = (Uint16)txData;

// 等 RRDY
while(McbspaRegs.SPCR1.bit.RRDY == 0);

volatile Uint16 dummy = McbspaRegs.DRR2.all;
return (Uint8)(McbspaRegs.DRR1.all & 0xFF);
}

// ========== 初始化入口 ==========
void ExtFlash_Init(void)
{
Flash_GpioInit();
Mcbspa_GpioInit();
Mcbspa_SpiInit();
}

// ========== 读 JEDEC ID ==========
void ExtFlash_ReadID(Uint8 *pBuf, Uint8 len)
{
Uint8 i;
char buf[64];

FLASH_CS_L();
DELAY_US(10);

ExtFlash_SwapByte(FLASH_CMD_RDID);
//ExtFlash_SwapByte(0xFF);
for(i = 0; i < len; i++)
pBuf[i] = ExtFlash_SwapByte(0xFF);

FLASH_CS_H();

sprintf(buf, "JEDEC ID: %02X %02X %02X\r\n", pBuf[0], pBuf[1], pBuf[2]);
UARTa_SendString(buf);
}

TIDA-010210: Hardware Development

xuanxuan cheng — Thu, 16 Jul 2026 09:21:39 GMT

Part Number: TIDA-010210

尊敬的TI官方：

在该款产品中，我想知道SW处的连接端子是如何焊在PCB上的，端子型号为3620-2-32-15-00-00-08-0，同时与其配套的连接器Mill-Max_0312-0-15-15-34-27-10-0，又是如何焊接在主功率板上的，二者又是如何连接的

TMS320F28377D: TMS320F28377D地址配置

Rosenberg Chris — Thu, 16 Jul 2026 07:11:08 GMT

Part Number: TMS320F28377D

TMS320F28377D外接外部异步SRAM存储器时？地址线是不是需要

SRAM地址              F28377 EMIF
A0    ←────────────── EM1BA1
A1    ←────────────── EM1A0
A2    ←────────────── EM1A1
...
A18   ←────────────── EM1A17这样映射？而不是A0对EM1A0以此类推？

TIDA-010062: signal isolation

yufei feng — Wed, 08 Jul 2026 14:01:53 GMT

Part Number: TIDA-010062

I plan to build a totem-pole PFC converter on my own, referring to the design TIDA-010062. I have removed the LLC part from the original design and only kept the PFC section, and I would like to use my LaunchPad-F280049c instead of the original control daughter card for control. I currently have two puzzles:
1. I am not sure whether my current schematic is complete.
2. I consulted an AI before, and it told me that all signals that need to be sent to my control board require high-low voltage isolation. However, I am not sure how to modify my circuit, because I noticed that the original design does not add much signal isolation.

I would really appreciate it if you could help me out. If it's convenient for you, could you please offer me some suggestions and reference materials? Thank you so much for your kindness!

TPS3820: TPS3820-The watchdog failed to recognize the feeding signal, causing the system to keep resetting and preventing it from operating normally.

RuiPing Wu — Tue, 16 Jun 2026 09:52:38 GMT

Part Number: TPS3820

The test revealed that the abnormal watchdog failed to recognize the dog-feeding signal, causing the system to keep resetting and thus unable to operate. The level and width of the dog-feeding signal met the requirements specified in the manual.The defect rate is 47.5%. Could you please help me figure out where the problem lies?

TIDM-02002: CLLLC中励磁电感参数设计公式

建繁刘 — Sun, 07 Jun 2026 06:18:39 GMT

Part Number: TIDM-02002

上述两个公式都是针对全桥CLLLC的励磁电感上限计算公式，为什么论文中的系数是8，TI给出的是16，TI是如何计算的？期待您的回复

TIDM-02013: Functions of Boost Inductor in PFC

Wang Xuesong — Sat, 06 Jun 2026 10:51:55 GMT

Part Number: TIDM-02013

Hello, Dear Expert：

What are the differences between this coupled inductor and conventional discrete inductors? Can it achieve a higher inductance under the same core volume and thus improve power density?

In Lab 3, the PH1 branch operates normally, yet the PH2 branch suffers intermittent drive loss. What are the potential root causes for this fault? Previously, the PFC performance was excellent with an input voltage of 90 V, yielding a power factor above 0.99. The missing drive fault on PH2 only emerged after the input voltage was raised to 200 V.

After proceeding to Lab 4, the Hall-effect sensor on the PH2 branch was damaged. Following replacement of this Hall sensor, the maximum achievable power factor dropped to merely 0.91, and the PH2 drive becomes lost even at 90 V input.

Is it feasible to disconnect one winding of the coupled inductor to test a single branch independently? Are there published papers validating the design of this coupled boost inductor? Can we substitute the coupled inductor with two discrete inductors for subsequent testing? I have exhausted troubleshooting ideas and have no clear direction for further debugging. Your prompt assistance would be highly appreciated.

TIDM-02002: TIDM-02002仿真模型

Jiatong Zhan — Wed, 03 Jun 2026 01:49:40 GMT

Part Number: TIDM-02002

各位TI的工程师，我们公司最近有个双向DC/DC的项目，现在对比DAB、CLLLC等方案，在TI参考设计栏目找到了一些资料，请问能提供一些仿真文件吗？

TCAN1146-Q1: TCAN1146使用问题咨询。

Xu Large — Mon, 01 Jun 2026 00:46:41 GMT

Part Number: TCAN1146-Q1

您好，我有两个TCAN1146的使用问题需要咨询：

1.控制器下电时，唤醒芯片通过SPI指令设置为sleep模式，INH拉低后，此时CAN总线上一直有非唤醒报文或者唤醒报文，则总线INH会被拉高，原因是什么呢。

2.CAN总线上现在有两个唤醒CAN，下电时，将一个控制器的唤醒CAN设置为sleep模式，INH会正常拉低，但是休眠后，无法再次唤醒。只有经过一次断总电，才能重新进行唤醒。该问题原因可能是什么？进入了故障模式？如果是进入故障模式，需要如何处理才能不断总电就可以被唤醒？

以上问题困扰我好几天了，希望可以得到快速的回复，十分感谢。

RM57L843: we are going to use this chip , can you help to release the related software development kit and software user guide ,thanks

blank hu — Sat, 30 May 2026 07:38:11 GMT

Part Number: RM57L843

we are going to use this chip , can you help to release the related software developmentkit and software user guide ,

first we wants to bootup RM57L843 EVK(Which we are desgining the hardware now )

pls kindly help to release the related software developmentkit and user guide ,thanks

AM2754-Q1: AM275x 自制板 UART0 启动无输出，疑似 PMIC 启动使能 / RESETSTATZ / BOOTMODE 引脚电平异常

Feiyang Zhang — Tue, 26 May 2026 10:57:21 GMT

Part Number: AM2754-Q1

器件型号：
AM275x / AM2754

PMIC：
与 AM275x EVM 上使用的 PMIC 型号一致

板卡：
AM275x 自制硬件板

问题概述：

我们正在调试一块基于 AM275x 的自制板。该板使用的 PMIC 型号与 AM275x EVM 一致，当前配置为 UART0 启动，但上电后 UART0 没有任何输出。

同时我们观察到 BOOTMODE 引脚电平和 RESETSTATZ 行为异常。

在我们的自制板上，BOOTMODE 高电平只有约 1.3 V，理论上应为 1.8 V。断开 ADC 芯片后无变化。但是断开 AM275x SoC 后，BOOTMODE 高电平恢复到 1.8 V。

对比 AM275x EVM，EVM 上 BOOTMODE 信号通过缓冲器/收发器接入 SoC，并且缓冲器受 RESETSTATZ 信号控制。我们可以在 AM275x EVM 上测到正常的 RESETSTATZ 复位波形，但在我们的自制板上没有测到预期的 RESETSTATZ 波形。

由于 PMIC 型号与 AM275x EVM 一致，因此我们目前重点排查自制板与 EVM 在 PMIC 外围电路和启动时序上的差异。我们怀疑问题可能与 PMIC 外围使能电路、VIO 供电来源、电源时序、RESETSTATZ 行为、BOOTMODE 缓冲器/控制逻辑有关，而不是 PMIC 型号选择错误。

测试结果：

1. 输入电源

设备上电后，输入电源为 12 V。

测得输入电流约为 8–11 mA，电流稳定。不同 BOOT 引脚电阻焊接配置下，电流会有轻微变化。

2. 常供电电源轨

宽压转 5 V 的 DCDC 输出正常。

以下常供电电源轨测量正常：

SOC_VDDSHV_CANUART = 1.8 V
VDD_CANUART = 0.85 V

3. PMIC VIO 接到 VCC_1V8_SYS 时的现象

当 PMIC 的 VIO 接到 VCC_1V8_SYS 时，BUCK 输出异常。

一次测试中：

BUCK1 / BUCK2 / BUCK4：没有输出
BUCK3：没有振荡波形，但输出端有约 0.85 V

另一次测试中：

BUCK1 / BUCK2 / BUCK3：没有输出
BUCK4：没有振荡波形，但输出端有约 1.0 V

这些现象说明 PMIC 似乎没有正常进入启动/开关工作状态。

4. PMIC VIO 接到常供电 VDD_3V3 时的现象

当 PMIC 的 VIO 接到常供电的 VDD_3V3 时，BUCK1 / BUCK2 / BUCK3 / BUCK4 都可以观察到间歇性振荡输出。

这表明 PMIC 的启动状态可能与 VIO 供电来源有关。

5. VMON 与 EN 引脚测量

测得：

VMON = 0.65 V
EN pin voltage = VIO

因此，当 VIO 接到 VCC_1V8_SYS 或 VDD_3V3_SYS 时，PMIC 都没有正常起振。

我们初步判断，U15 和 Q1 的供电可能接错了，不应该接到 PMIC 启动之后才出现的电源轨，而应该接到常供电电源轨。

6. PMIC_LPM_EN0 信号异常

来自 AM275x SoC 的 PMIC_LPM_EN0 始终为低电平。

目前不确定这是因为：

PMIC 尚未启动
→ SoC 没有正常上电或释放复位
→ PMIC_LPM_EN0 保持低电平

还是因为：

PMIC_LPM_EN0 本身需要先变高
→ PMIC 才能启动

如果是后者，就会形成类似循环依赖：

PMIC 不启动
→ SoC 不工作
→ PMIC_LPM_EN0 不拉高
→ PMIC 仍然无法启动

希望 TI 协助确认的问题：

1. 我们的自制板使用了与 AM275x EVM 相同型号的 PMIC。请问 TI 能否确认 EVM 上 PMIC 外围电路中，哪些部分是 AM275x 正常启动所必须的？特别是 PMIC 的 VIO、使能控制逻辑以及相关 U15/Q1 电路，是否必须由常供电电源轨供电？

2. 在 AM275x EVM 上，PMIC 启动、PMIC_LPM_EN0 和 RESETSTATZ 之间的预期关系是什么？PMIC_LPM_EN0 在 PMIC 电源时序完成前保持低电平是否正常？还是外部 PMIC 电路应当在 SoC 驱动该信号之前就能独立启动？

3. 如果 PMIC_LPM_EN0 在 PMIC 启动前保持低电平，硬件设计上是否需要提供外部上拉或默认使能路径，让 PMIC 能先启动？

4. 在 AM275x EVM 上，BOOTMODE 信号通过缓冲器/收发器接入 SoC，并受 RESETSTATZ 控制。这个缓冲/控制方案是否是必须或推荐的？是否用于避免 SoC 在复位未释放或电源未完整建立时拉低 BOOTMODE 引脚？

5. 我们测得 BOOTMODE 高电平只有约 1.3 V，断开 SoC 后恢复到 1.8 V。这是否说明 SoC 因为部分电源轨未上电或时序错误，导致 BOOTMODE 引脚被内部钳位、漏电或反向供电？

6. 对于这种情况，推荐的硬件调试顺序是否应该是：

强制 PMIC 使能
→ 确认所有 PMIC 输出电源轨正常
→ 检查 RESETSTATZ 波形
→ 检查 BOOTMODE 引脚电平
→ 再检查 UART0 启动输出

补充说明：

UART0 的物理连接已经检查过，暂不认为是串口线或 UART 接错的问题。

当前更主要的症状是：板子似乎没有进入正常启动状态，因此 UART0 没有任何启动输出。

希望 TI 能帮助确认 AM275x 的 PMIC 启动时序、PMIC_LPM_EN0 的作用，以及 EVM 上 BOOTMODE 缓冲器和 RESETSTATZ 控制逻辑是否建议在自制板中参考实现。

MSPM0-SDK: MSPM0G3507 串口DMA进行不定长数据收发

biza inc — Wed, 06 May 2026 15:28:32 GMT

Part Number: MSPM0-SDK
Other Parts Discussed in Thread: MSPM0G3507

HI，我在基于MSPM0G3507的串口+DMA实现不定长数据的收发，由于MSPM0G3507的寄存器特殊性，当使用DMA时，因为DMA及时半空FIFO所以超时中断无法触发，如果引入定时器轮询会浪费外设的同时效率不高，频繁的接收中断也会拉低CPU的效率。

我看到并参考：https://e2e.ti.com/support/microcontrollers/msp-low-power-microcontrollers-group/msp430/f/msp-low-power-microcontroller-forum/1220244/faq-uart-rx-ms-level-timeout-realization-based-on-event-for-mspm0?tisearch=e2e-sitesearch&keymatch=UART%20timeout%20MSPM0 来进行设计，但是发现偶尔会出现字节多收，理论上此拓扑应该能行的通，但是我试验多次，发现一旦数据多了还是会多收字节，表现为DMASZ的数量跟实际发送不一致。

对于MSPM0G3507的架构特殊性，我严重怀疑TI的芯片设计是否有用过串口。

此问题依然存在，最后我只能使用串口中断+超时中断，使用仅仅4字深的FIFO来接收数据。

各位如果有更好的建议，还请让我知道，谢谢！

TIDM-02013: 需要定制两套TIDM-02013电源模块。

Bo Zhao — Fri, 01 May 2026 03:10:08 GMT

Part Number: TIDM-02013

我们想要两套TIDM-02013进行学习，查找你们商城没有成品进行购卖的，不知道能否定制两套。

TDA4VM: Inquiry About Online Debugging Support for DCCSetup_2023_10_10.exe and Alternative ISP Tuning Tools

tang yuanzheng — Fri, 10 Apr 2026 02:46:47 GMT

Part Number: TDA4VM

Hi TI Team,

I’m currently working with the TDA4VM ISP pipeline and using the DCCSetup_2023_10_10.exe tool to generate DCC configuration files for image tuning.

I have two questions:

Does DCCSetup_2023_10_10.exe support online (real-time) debugging?
Specifically, can I adjust ISP parameters (e.g., GLBCE, noise reduction, color correction) in real time while the system is running, and see the changes reflected immediately in the output video stream?
Are there other recommended tools or methods for online ISP tuning on TDA4VM?
I’ve heard about the TI Image Tuning Tool (ITT) and ti_tuning_app, but I’m not sure if they are compatible with this version of DCCSetup or the latest Processor SDK (e.g., PSDK 8.x or 9.x). Could you please clarify the current best practice for real-time ISP parameter tuning?

Any guidance or documentation links would be greatly appreciated!

Best regards,
Shenzhen Jueming Artificial Intelligence Co., Ltd.

TIDM-02013: Voltage distortion across the switching transistor under sub-resonant operation

Wang Xuesong — Tue, 07 Apr 2026 11:32:27 GMT

Part Number: TIDM-02013

Dear expert.

When the frequency is below 400 kHz, the voltage Vds across the secondary-side switches exhibits sudden rises and falls. As the frequency decreases, the peak values of these sudden changes become larger. What is this related to? Is this a normal phenomenon?

Purple waveform: drain-source voltage Vds across the switching transistor.

Blue waveform: secondary-side current.

TMS320C6713B: tms320c6713 dsk gerber

LI LI — Thu, 02 Apr 2026 07:46:06 GMT

Part Number: TMS320C6713B

你好。我现在正基于TMS320C6713 DSK 开发板进行TMS320C6713的应用。需要gerber文件进行参考。

LMZ14203H: LMZ14203HTZ/NOPB need COD or CCO information

Lily Jiang — Tue, 17 Mar 2026 05:37:46 GMT

Part Number: LMZ14203H

LMZ14203HTZ/NOPB TEXAS INSTRUMENTS need COD or CCO information

TIDM-02013: Issues of Relay Closing and Overcurrent Protection Triggering on the Circuit Board Caused by Driver Loss in the PFC Stage

Wang Xuesong — Tue, 10 Mar 2026 12:32:14 GMT

Part Number: TIDM-02013
Other Parts Discussed in Thread: SFRA

Hello,

I am currently validating Experiment 3 of the PFC stage, with TTPLPFC_ac_cur_ref_pu set to 0.02.

The boost routine initiates when TTPLPFC_vBus_sensed_Volts > 110 V.

At no-load condition:

TTPLPFC_vBus_sensed_Volts can rise to 175 V; however, gate drive loss occurs as the input AC voltage enters its positive half-cycle.
With a 500 Ω load:

TTPLPFC_vBus_sensed_Volts can boost up to 135 V, but after maintaining this level for a few seconds, it begins to decline, eventually dropping below 110 V.

Throughout this process, the input AC voltage remains stable at 78 V.
Relay closing during boost:

Closing the relay during the boost phase triggers overcurrent protection (OCP) on the PCB.

Consequently, the relay remained open in all the aforementioned tests. Freewheeling was implemented via a bypassed thermistor, with each power-on duration strictly controlled within 10 seconds.
Waveform analysis & query:

From the measured waveforms, a definite phase difference between the voltage and current is still observable.

Is it feasible to eliminate this phase discrepancy and achieve phase alignment by adjusting the compensation capacitor?

I look forward to your prompt reply.

MSPM0G3507: BCR configuration

mao junjie — Sat, 28 Feb 2026 02:21:13 GMT

Part Number: MSPM0G3507
Other Parts Discussed in Thread: UNIFLASH

Q1: I would like to know the correct procedure for burning the out file with the NOMAIN area using Uniflash. Should I select "erase main and nomain necessary sectors only" in the erase configuration, or is there a specific process using CCS?
Q2: I configured SW-DP/MASS ERASE/FACORY ERASE with PW, but I couldn't find any place to input the password in CCS or UNIFLASH.

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