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DRA821U: J7200

Part Number: DRA821U

Hi Yong:

       I need the chip to output a high level during sleep;

       Here is my test for the C14 pin: 

Hardware conditions: This pin cuts off all inputs and outputs on the board, and The pin is connected to a 10k resistor and is left floating

PIN C14   Test voltage Test current after sleep    
WKUP_PADCONFIG_54 before sleep after sleep External resistor to ground External resistor to 3.3V Does it meet expectations  
1 0X00040000 0V 0v 0mA 0.1mA yes  
2 0X00060000 3.3v 3.3v 0.1mA 0mA yes  
3 0X13040000 0V 3.3v 0.1mA 0mA yes  
4 0X03060000 3.3v 0 0mA 0.1mA yes  
5 0X0D040000 0V 3.3v 0.1ma 0 no  
6 0X09060000 3.3v 3.3v 0.1ma 0 no  

step5: I want the output to be high, The theoretical value of output current to ground is 0.33mA, but the test current is 0.1ma;so this port is not output high, it just pulls up

step6: I want the output to be low, The result of this test is a high level

1/I need the chip to output a high level during sleep, how should i set the register?

2/Port Input Pull-Up/Down During Sleep, Is the above configuration correct?

  • Hi we've got the issue and escalated to e2e, please expect the response. Thanks.

  • Hi,

    Sorry for the delay in response.

    In the PADCONFIG, there are bits that are prepended with DS (e.g. DS_PULLTYPE_SEL or DSOUT_DIS). These bits control the pad when in deep-sleep mode. There are equivalent bits that control the pad when NOT in deep-sleep mode (e.g. PULLTYPESEL or TX_DIS to select the complementary bits).

    In Deep-Sleep mode, the output driver is weakened so that may account for your current not being as expected. 

    One thing you might try is this:

    Clear DSOUT_DIS = 0

    Set DSOUT_VAL = 1

    and this is just for testing -- Set Force_DS_EN = 1

    This last bit is an override for this pad, and it would make sure that you are really in Deep-Sleep at least from the perspective of this pad.

    -2-

    0x0004_0000 --> receiver is active, transmit is active if the muxmode has set it, There is no defined pull enabled

    0x0006_0000 --> receiver is active, transmit is active if the muxmode has set it, There is no defined pull enabled 

    0x1304_0000 --> receiver is active, transmit is NOT active, There is no defined pull enabled. 

    0x0306_0000 --> receiver is active, transmit is NOT active, There is no defined pull enabled 

    0x0D04_0000 --> receiver is active, output high and pull low.

    0x0906_0000 --> receiver is active, output low and pull low

    Thanks.

  • HI:

    1/0x0D04_0000 --> receiver is active, output high and pull low.

    normal mode : receiver is active and pull low.

    deepsleep mode : output high and pullup/pulldown is disable

    In deepsleep mode this setting should be output high,I tested his drive current is only 0.1ma,Indicates that this setting is incorrect

    2/Set Force_DS_EN = 1   Setting this bit has no effect on the port;

    I want to output high level in deepsleep mode, how to configure this padconfig

  • Hi, we've updated to the E2E and please expect the response.

  • Hi,

    Sorry for the delay in response.

    C14 is WKUP_GPIO0_6 and is controlled by WKUP_PADCONFIG_54
    0x0D04_0000 sets bits 27, 26, 24, and 18
    bit 28 configures the deep sleep pull type; cleared it sets a pull-down
    bit 27 configures the deep sleep pull enable; set it enables the pull (-down)
    bit 26 sets the output value in deep sleep; set it enables a high value
    bit 25 configures the pin to allow / disallow it to drive; cleared, the pin may drive an output in deep sleep
    bit 24 sets the deep sleep enable for this pin qualified by deep sleep being properly entered in the rest of the device
    -- notice that bits 28 - 24 are in contradiction driving high and pulling down in deep sleep does not make sense to me
    bit 21 configures the transmit portion of the pin; cleared it allows the pin to drive
    bit 18 configures the pin to receive; set the pin will be in a receive mode when not in deep sleep
    bits 3:0 configure the mux mode; cleared to all 0s, the mode is WKUP_UART0_CTSn

    Can you try the following:
    -1- 0x04048000 -- again forcing deep sleep but removing the conflict between drive high and pull low.
    -2- 0x00040007 -- not deep sleep; drive the pin with the GPIO0
    WKUP_GPIO0_GPIO_DIR01 &= ~0x40
    WKUP_GPIO0_GPIO_SET_DATA01 |= 0x40
    read value on WKUP_GPIO0_GPIO_IN_DATA01

    The expert has run through these options in the attached gel file. On his board, he measures a valid HIGH in both Deep Sleep and functional mode.

    Kevinrandom_stuff.gel

    Hope this will help.

  • HI:

    0x04048000 这个配置并没有用,我这边测试出来依旧是一个输入上拉的结果

    测试方法,端口接一个10k电阻,sleep后对地短路,测试电流为0.1ma,推测端口状态为输入上拉

  • 0x04048000 This configuration is useless. The result of my test is still an input pull-up.

    Test method, this port is connected to a 10k resistor, short-circuit to ground after sleep, the test current is 0.1ma, it is speculated that the port state is input pull-up

  • Hi,

    We gave you a second setting as well -- what current do you measure there? The reason for our question is that a 3.3V signal through 10K should be about 0.3mA. You are not off by a huge amount. 

  • -2- 0x00040007 -- not deep sleep; drive the pin with the GPIO0
    WKUP_GPIO0_GPIO_DIR01 &= ~0x40
    WKUP_GPIO0_GPIO_SET_DATA01 |= 0x40
    read value on WKUP_GPIO0_GPIO_IN_DATA01

    before sleep:C14 output 3.3v;current is 0.33ma

    after sleep:output 3.3v;current is 0.1ma

    0x00040007 This configuration is useless.

    my guess:

    Why is 0.1ma:The pull-up resistor for the input pull-up is 23k,3.3v/(23k+10k)=0.1ma

  • Hi,

    Thanks for running the experiment. The expert will look for an answer to the question.

  • Hi,

    In Deep Sleep, the driver becomes a pull-up through 20K. The resulting 100uA is exactly right.

    Obviously, a 20K pull up will not be able to pull a 10K resistor to ground to a logic rail.

    The results may not meet the needs of you, but they are consistent with what is occurring in the device.

  • you mean there is no way to output high ;only pull up

  • Hi,

    Please let me confirm with experts and get back to you.

    Thanks.

  • Hi,

    The expert is not so much sure... The only way to possibly work around this is to NOT put this pin into Deep Sleep.

  • How to make this pin not enter deepsleep , Can you give me the configuration parameters of this pin?

  • Hi,

    I've confirmed with expert and please expect the response. Below is the post on E2E, you could take a look at it:

    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1078518/dra821u-j7200

  • Hi Dear,

    Dose the response from the email answer your follow up question? If so, please click "this resolved my issue" and let us know. Thanks!