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RE: AFE7950: AFE7950: ddcFactorRx = 2 with LMFSHdRx = 42220 in 2T2R mode for 1.2 GHz RX BW shows RX DDC-JESD async FIFO status 0x50

user5953526 — Mon, 03 Aug 2026 02:18:44 GMT

As an additional question related to the previous async FIFO discussion:

In our 4T4R hopping configuration, both TX and RX multi-NCO hopping via NCOSEL pins work correctly.

But in our 2T2R configuration:

TX hopping still works
RX hopping does not work

Details:

RX multi-NCO table load succeeds
RX NCOSEL pin values change correctly
Direct RX NCO update also works
However, the actual RX LO does not follow the selected RX multi-NCO slot

So it looks like only RX hopping via multi-NCO + NCOSEL pins fails in 2T2R.

Is this related to the earlier RX async FIFO / DDC-JESD configuration issue? Or is there any extra bringup requirement for RX NCOSEL pin control in 2RX mode?

Thanks.

RE: AFE7950: AFE7950: ddcFactorRx = 2 with LMFSHdRx = 42220 in 2T2R mode for 1.2 GHz RX BW shows RX DDC-JESD async FIFO status 0x50

Taylor — Sun, 02 Aug 2026 22:48:35 GMT

您好，

已经收到了您的案例，调查需要些时间，感谢您的耐心等待。

AFE7950: AFE7950: ddcFactorRx = 2 with LMFSHdRx = 42220 in 2T2R mode for 1.2 GHz RX BW shows RX DDC-JESD async FIFO status 0x50

user5953526 — Fri, 31 Jul 2026 11:10:44 GMT

Part Number: AFE7950

Hi TI team,

I am working on an AFE7950 custom board and would like to confirm whether my use case is officially supported, and how to correctly close the remaining RX async FIFO issue.

Application goal
I need to achieve ~1.2 GHz RX bandwidth on AFE7950, but I am limited by the FPGA GTH maximum lane rate (~16.3 Gbps).

Because of this lane-rate limit, I cannot use a configuration that would require a higher JESD rate. My current target is:

2T2R-style sparse channel usage
only RXA + RXC used
RX bandwidth target = 1.2 GHz
JESD204C / 64b66b
LMFSHdRx = 42220
ddcFactorRx = 2
With this setup, Latte calculates RX lane rate around 12.16512 Gbps, which fits my FPGA GTH limit.
If I use ddcFactorRx = 4, lane rate is only about 6.08256 Gbps, but RX bandwidth is no longer sufficient.

Relevant configuration
My key RX-side settings are approximately:

sysParams.FadcRx = 2949.12
sysParams.rxEnable = [True, False, True, False] # RXA and RXC only
sysParams.ddcFactorRx = [2, 2, 2, 2]
sysParams.RRFMode = 5 # TDD non-shared
sysParams.jesdSystemMode = [3, 3]
sysParams.LMFSHdRx = ["42220"] * 4
sysParams.jesdTxProtocol = [2, 2] # ADC JESD TX = 64b66b
sysParams.fbEnable = [False, False]
TX side is not the main issue here.

What I observe
4RX enabled configurations are much more likely to work
Sparse 2T2R RX usage (RXA + RXC only) is where I see problems
Latte/CAFE link bring-up can complete and the captured RX waveform can look normal
However, checkAsyncFifoStatus() still reports:
ret, raw = setupParams.CAFE.checkAsyncFifoStatus(0)
# ret = 0
# raw = 0x0000000000000050
From the CAFE bit definition, 0x50 means:

bit4 = RXA DDC-JESD Async FIFO
bit6 = RXC DDC-JESD Async FIFO
So the issue appears to be specifically the RXA / RXC DDC-to-JESD async FIFO.

Additional observation
The RX waveform can still appear correct, so this looks more like a startup margin / FIFO boundary issue rather than a complete JESD link failure.

When I manually inspect FIFO pointers after bring-up, the result is not always cleanly centered. For example:

RXC:
(11.0, 11, 5, 12, 8.0)
RXA:
(3, 11, 3, 13, 10.0)
This suggests the FIFO pointer relationship is marginal/unstable, especially on RXA.

My questions
Is ddcFactorRx = 2 with LMFSHdRx = 42220 in this TDD / sparse 2T2R-style RX usage officially supported on AFE7950 for ~1.2 GHz RX bandwidth?

For RXA + RXC only usage, is there any TI-recommended setting for:

RX data mux
TDD mode / override
async FIFO offset
JESD mapper usage
startup sequence
If checkAsyncFifoStatus() returns 0x50 but the RX waveform looks normal, should this be treated as:

only a startup-margin warning, or
a real functional risk that can later affect repeatability / deterministic latency / temperature robustness?
Is there any TI-validated example script for:

AFE7950
ddcFactorRx = 2
LMFSHdRx = 42220
64b66b
preferably 1.2 GHz-class RX bandwidth
If sparse RX usage is not recommended in this mode, is TI’s recommended workaround to:

enable all 4 RX chains internally,
but only use RXA / RXC data in the system?
Why I am asking
My system bottleneck is the FPGA JESD lane rate, so I am trying to find the highest-confidence TI-supported way to achieve 1.2 GHz RX BW without exceeding ~16.3 Gbps lane rate.

Any clarification on whether this is a supported mode, and what TI recommends for the RX async FIFO issue in this exact case, would be greatly appreciated.

Thanks.

ADS127L18EVM-PDK: ADS127L18 EVM: Irreducible ~100 fs Floor in Dual-Channel Residual Phase Noise Measurement.

C.H. Hsueh — Sun, 26 Jul 2026 08:44:13 GMT

Part Number: ADS127L18EVM-PDK

Hi TI team,

We are measuring the residual phase noise / relative timing drift between two channels of ADS127L18 EVM.

Setup: a single tone (frequency) from a source is split into two, fed into two ADC channels independently. After digital IQ demodulation per channel, we compute the phase difference (φ_ch1 − φ_ch2) to reject common-mode noise (source phase noise, clock jitter). The differential phase is converted to delay (τ = φ/2πf) and analyzed via Allan deviation.

Observations that confuse us:

1. Regardless of input frequency or amplitude, the relative delay Allan deviation always converges to a floor of ~100 fs. Higher frequencies converge to this floor faster, but the floor value is the same.

2. Injecting a pilot tone before the splitter does NOT improve the ~100 fs floor. The residual noise appears to be frequency-independent and not removable by common-mode correction.

Since common-mode noise (source, clock) is already rejected by the differential measurement, and pilot tone fails to help, the floor must originate from something inside each ADC channel that is both channel-independent and pilot-insensitive.

What could cause this ~100 fs irreducible floor? Is this a known behavior of ADS127L18 in dual-channel relative timing applications?

We can share Allan deviation plots and raw data if needed. Thank you.

Best regards,
C.H. Hsueh

RE: ADS127L18EVM-PDK: ADS127L18 EVM: Irreducible ~100 fs Floor in Dual-Channel Residual Phase Noise Measurement.

Daniel — Tue, 28 Jul 2026 06:55:59 GMT

您好

https://www.ti.com/lit/an/slyt705/slyt705.pdf?ts=1785217982131

https://www.ti.com/lit/an/slyt237/slyt237.pdf?ts=1785218006488

https://www.ti.com/lit/an/slyt090/slyt090.pdf?ts=1785218013427

以上是相关文档资料请您参考。

RE: ADS127L18EVM-PDK: ADS127L18 EVM: Irreducible ~100 fs Floor in Dual-Channel Residual Phase Noise Measurement.

Lydia — Mon, 27 Jul 2026 00:00:56 GMT

Hello, we have received your case and the investigation will take some time. Thank you for your patience.

RE: LMX8410L: 技术咨询

Vivian Gao — Wed, 22 Jul 2026 09:46:33 GMT

数据手册第10部分有写layout要求，详见10.1.1 High Frequency Trace Routing和10.1.2 Power Trace Routing。

评估板展示的最佳实践，建议按照评估板去做。

主要目的：

抑制高频噪声耦合
隔离数字噪声对射频电路的影响
降低电源引脚的高频阻抗

TI没有公开gerber文件。

LMX8410L: 技术咨询

Xu Allen — Wed, 22 Jul 2026 04:34:43 GMT

Part Number: LMX8410L

你好，

在使用LMX8410RGZT是遇到两个问题，请帮忙解答一下，谢谢！

1、官网没有LMX8410LEVM的gerber，请提供一下。

2、参考设计中有三根电源线走线特意绕长，这是出于什么考虑？是否可以不用这么做？

RE: LMX8410L: 技术咨询

Vivian Gao — Wed, 22 Jul 2026 04:46:33 GMT

感谢您对TI产品的关注。
我们正在核实您的问题，请等待我们的答复。

RE: AFE7799: 库存订阅推送 API返回403状态码，麻烦看一下,谢谢。

Eirwen — Tue, 16 Jun 2026 23:35:32 GMT

您好，

E2E技术论坛旨在解决客户在使用TI产品过程中遇到的技术问题。
建议您请按照以下方式联系客户支持部门，会有客服为您提供帮助。
www.ti.com/.../customer-support.html

AFE7799: 库存订阅推送 API返回403状态码，麻烦看一下,谢谢。

huixin an — Tue, 16 Jun 2026 09:49:07 GMT

Part Number: AFE7799

在TI store API 套件中设置了库存订阅推送 API，但是在postman用POST请求的时候，返回403错误，截图如下所示，麻烦看一下，给出一个解决方案，谢谢了。

RE: AFE7799: 库存订阅推送 API返回403状态码，麻烦看一下,谢谢。

Eirwen — Tue, 16 Jun 2026 23:31:16 GMT

已经收到了您的案例，调查需要些时间，感谢您的耐心等待。

RE: AFE7903: Can AFE7903 work for wifi 6E 5G and 6G frequency band? which IC can support wifi 6E frequency band?

Vivian Gao — Fri, 15 May 2026 09:39:22 GMT

感谢您对TI产品的关注！由于 AFE7903 产品属于信息受限制产品，为更加有效地解决您的问题，请您将问题发布在E2E英文技术论坛上（英文论坛对应子论坛链接：https://e2e.ti.com/support/rf-microwave-group/rf-microwave/f/rf-microwave-forum），将由资深的英文论坛工程师为您提供帮助。

AFE7903: Can AFE7903 work for wifi 6E 5G and 6G frequency band? which IC can support wifi 6E frequency band?

Xiaodong Yu — Fri, 15 May 2026 08:59:52 GMT

Part Number: AFE7903

Dear Sir/Madam

we want to make a product to work on Wifi 6E frequency band especially the 5G and 6GHz band. We checked AFE7900 adc/dac, we find the maxim ADC rate is 3Gsps. SinceWIFI 6E 5G and 6GHz band are very close we can not seperate them. So the total bandwidth of 5G+6G band is 2GHz, it seams 3Gsps ADC can not work on the 2GHz bandwith. is it correct? How can we solve the issue. any other TI's IC can work on Wifi 6E?

Regards

AWR2188-SAFETY: AWR2188 document download access denied

zhaoyu xiong — Sun, 03 May 2026 14:37:00 GMT

Part Number: AWR2188-SAFETY

AWR2188 technical documentation access denied. Please approve my download request.

RE: AWR2188-SAFETY: AWR2188 document download access denied

Alice — Sun, 03 May 2026 23:54:45 GMT

Hello,

Please try to request using a TI account that is bounded with a company email.

If you have further concern, please contact customer support center to get support.

RE: AWR2188-SAFETY: AWR2188 开发软件资料下载

Taylor — Sun, 03 May 2026 22:48:27 GMT

我们这里并没有审批权限，请联系客服部门进行咨询

客户支持中心 | TI.com.cn

AWR2188-SAFETY: AWR2188 开发软件资料下载

zhaoyu xiong — Sun, 03 May 2026 14:30:19 GMT

Part Number: AWR2188-SAFETY

hi, AWR2188 芯片开发软件相关资料下载被拒，请麻烦通过一下

RE: AWR2188-SAFETY: AWR2188 开发软件资料下载

Taylor — Sun, 03 May 2026 22:47:31 GMT

您好，

已经收到了您的案例，调查需要些时间，感谢您的耐心等待。

RE: AFE7769D: 输出GSM信号时该如何配置CFR_DPD文件

Links — Mon, 20 Apr 2026 02:07:03 GMT

我认为这是一个我已为 Spiderradio 客户解答过的疑问。

AFE7769D: 输出GSM信号时该如何配置CFR_DPD文件

jiang xiansheng — Sat, 11 Apr 2026 15:01:34 GMT

Part Number: AFE7769D

采用的是 CFR Mode = pc cfr mod, PC waveform is Carrier profile based waveform, 如果我们的配置是20MHz的LTE信号与3个GSM载波信号，请问number of carriers 应该选4还是选1，如果是选4个载波，那么GSM载波的带宽该选多少？（配置文件里面可以选择的最小带宽是1.4MHz LTE载波）；或者针对有GSM的载波的情况下，你们有推荐的更合适的CFR配置方式。

AFE7769D: AFE7769D输出单音上有杂散

jiang xiansheng — Sat, 11 Apr 2026 14:54:16 GMT

Part Number: AFE7769D

AFE7769D自己产生单音时，在单音左右频偏496KHz处有65dBc的杂散，改变单音的评论，杂散跟随单音走。
已经排除了射频参考信号和系统参考上频偏496KHz处有杂散的可能；已经排除了7769D 几个电源上携带496KHz电源纹波的可能；排除了板子上其它电源携带496KHz电源纹波的可能。现在怀疑是7769D自己产生了该杂散，请问能否通过修改锁相环的环路滤波器带宽来优化这个杂散，且如何修改环路滤波器带宽？

RE: AFE7769D: AFE7769D输出单音上有杂散

Links — Tue, 14 Apr 2026 00:51:01 GMT

我认为这是一个我已为 Spiderradio 客户解答过的疑问。能否请您确认一下？如果是这样的话，我可以将邮件内容告知您，以便您关闭此工单。请确认 Spiderradio 的客户是否已收到我的反馈。谢谢你！

RE: AFE7769D: AFE7769D输出单音上有杂散

Lydia — Sun, 12 Apr 2026 23:37:11 GMT

您好，已经收到了您的案例，调查需要些时间，感谢您的耐心等待。

RE: AFE7769D: 输出GSM信号时该如何配置CFR_DPD文件

Lydia — Sun, 12 Apr 2026 23:36:39 GMT

您好，已经收到了您的案例，调查需要些时间，感谢您的耐心等待。

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Danish	Japanese	Spanish
Dutch	Klingon	Swedish
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Arabic	Hebrew	Polish
Bulgarian	Hindi	Portuguese
Catalan	Hmong Daw	Romanian
Chinese Simplified	Hungarian	Russian
Chinese Traditional	Indonesian	Slovak
Czech	Italian	Slovenian
Danish	Japanese	Spanish
Dutch	Klingon	Swedish
English	Korean	Thai
Estonian	Latvian	Turkish
Finnish	Lithuanian	Ukrainian
French	Malay	Urdu
German	Maltese	Vietnamese
Greek	Norwegian	Welsh
Haitian Creole	Persian